JPH0671244B2 - フレームチエツクシーケンス更新方法 - Google Patents

フレームチエツクシーケンス更新方法

Info

Publication number
JPH0671244B2
JPH0671244B2 JP63271090A JP27109088A JPH0671244B2 JP H0671244 B2 JPH0671244 B2 JP H0671244B2 JP 63271090 A JP63271090 A JP 63271090A JP 27109088 A JP27109088 A JP 27109088A JP H0671244 B2 JPH0671244 B2 JP H0671244B2
Authority
JP
Japan
Prior art keywords
fcs
frame
polynomial
byte
bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP63271090A
Other languages
English (en)
Japanese (ja)
Other versions
JPH01149631A (ja
Inventor
ジヤン・カルビイナ
ミツシエル・ドフアン
レイモンド・ルノアール
ジヤン−ルイ・ピカール
Original Assignee
インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン filed Critical インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン
Publication of JPH01149631A publication Critical patent/JPH01149631A/ja
Publication of JPH0671244B2 publication Critical patent/JPH0671244B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
    • H03M13/093CRC update after modification of the information word
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/0078Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
    • H04L1/0083Formatting with frames or packets; Protocol or part of protocol for error control

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Communication Control (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP63271090A 1987-10-30 1988-10-28 フレームチエツクシーケンス更新方法 Expired - Lifetime JPH0671244B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP87480017.0 1987-10-30
EP87480017A EP0313707B1 (de) 1987-10-30 1987-10-30 Mittel für Datenintegritätssicherung

Publications (2)

Publication Number Publication Date
JPH01149631A JPH01149631A (ja) 1989-06-12
JPH0671244B2 true JPH0671244B2 (ja) 1994-09-07

Family

ID=8198330

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63271090A Expired - Lifetime JPH0671244B2 (ja) 1987-10-30 1988-10-28 フレームチエツクシーケンス更新方法

Country Status (4)

Country Link
US (1) US5046069A (de)
EP (1) EP0313707B1 (de)
JP (1) JPH0671244B2 (de)
DE (1) DE3785211T2 (de)

Families Citing this family (42)

* Cited by examiner, † Cited by third party
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US5121396A (en) * 1988-10-27 1992-06-09 International Business Machines Corp. Preservation of crc integrity upon intentional data alteration during message transmission
GB2242104B (en) * 1990-02-06 1994-04-13 Digital Equipment Int Method and apparatus for generating a frame check sequence
JPH04142844A (ja) * 1990-10-03 1992-05-15 Nec Corp エコーフレームのフレームチェックシーケンス算出方式
JP2780503B2 (ja) * 1991-01-30 1998-07-30 日本電気株式会社 パリティチェック検出回路
DE69124743T2 (de) * 1991-11-29 1997-08-14 Ibm Vorrichtung zur Speicherung und Durchschaltung und Verfahren zur Datensicherung während der Speicherung
GB9312136D0 (en) * 1993-06-11 1993-07-28 Inmos Ltd Transmission of messages
GB9312135D0 (en) * 1993-06-11 1993-07-28 Inmos Ltd Generation of checking data
JPH0787090A (ja) * 1993-06-30 1995-03-31 Toyo Commun Equip Co Ltd 巡回符号検出方法及び装置
FR2719177B1 (fr) * 1994-04-22 1996-07-05 Matra Transport Procédé de transmission de bits d'information à codage redondant, réseau local comportant application de ce procédé, et équipement périphérique à utiliser dans un tel réseau local.
EP0681381A1 (de) * 1994-05-06 1995-11-08 International Business Machines Corporation Verfahren und Anordnung zur Modifizierung von Rahmenkontrollwörtern in Zwischenknoten von Hochgeschwindigkeitsnetzwerken
EP0735711A1 (de) * 1995-03-31 1996-10-02 International Business Machines Corporation Verfahren und Anordnung zur Modifizierung von Rahmenprüfmusterfolgen (FCS)
US6272108B1 (en) * 1997-03-05 2001-08-07 Paradyne Corporation Apparatus and method to allow a frame check sequence to determine the updating of adaptive receiver parameters of a high speed communication device
US6128760A (en) * 1998-10-13 2000-10-03 Lsi Logic Corporation Method and apparatus for calculating a CRC remainder
SE519003C2 (sv) * 1998-10-23 2002-12-17 Ericsson Telefon Ab L M Anordningar och förfarande relaterande till felkorrigerade transmission av digital data
US7298691B1 (en) 2000-08-04 2007-11-20 Intellon Corporation Method and protocol to adapt each unique connection in a multi-node network to a maximum data rate
US6987770B1 (en) 2000-08-04 2006-01-17 Intellon Corporation Frame forwarding in an adaptive network
US6909723B1 (en) 2000-08-04 2005-06-21 Intellon Corporation Segment bursting with priority pre-emption and reduced latency
US7469297B1 (en) * 2000-08-04 2008-12-23 Intellon Corporation Mechanism for using a quasi-addressed response to bind to a message requesting the response
US6907044B1 (en) 2000-08-04 2005-06-14 Intellon Corporation Method and protocol to support contention-free intervals and QoS in a CSMA network
US7352770B1 (en) 2000-08-04 2008-04-01 Intellon Corporation Media access control protocol with priority and contention-free intervals
US6868516B1 (en) 2000-12-21 2005-03-15 Emc Corporation Method for validating write data to a memory
US6779150B1 (en) * 2000-12-21 2004-08-17 Emc Corporation CRC error detection system and method
US7826466B2 (en) 2002-06-26 2010-11-02 Atheros Communications, Inc. Communication buffer scheme optimized for VoIP, QoS and data networking over a power line
US8149703B2 (en) 2002-06-26 2012-04-03 Qualcomm Atheros, Inc. Powerline network bridging congestion control
US7120847B2 (en) 2002-06-26 2006-10-10 Intellon Corporation Powerline network flood control restriction
US6981195B2 (en) * 2002-08-02 2005-12-27 Analog Devices, Inc. Cyclic redundancy check with efficient re-computation of error detection code
AU2003284317A1 (en) 2002-10-21 2004-05-13 Intellon Corporation Contention-free access intervals on a csma network
US7281187B2 (en) 2003-11-20 2007-10-09 Intellon Corporation Using error checking bits to communicated an address or other bits
US8090857B2 (en) 2003-11-24 2012-01-03 Qualcomm Atheros, Inc. Medium access control layer that encapsulates data from a plurality of received data units into a plurality of independently transmittable blocks
KR20050057698A (ko) * 2003-12-10 2005-06-16 삼성전자주식회사 체크섬을 생성하는 장치 및 방법
US7660327B2 (en) 2004-02-03 2010-02-09 Atheros Communications, Inc. Temporary priority promotion for network communications in which access to a shared medium depends on a priority level
US7715425B2 (en) 2004-02-26 2010-05-11 Atheros Communications, Inc. Channel adaptation synchronized to periodically varying channel
US7636370B2 (en) 2005-03-03 2009-12-22 Intellon Corporation Reserving time periods for communication on power line networks
US8175190B2 (en) 2005-07-27 2012-05-08 Qualcomm Atheros, Inc. Managing spectra of modulated signals in a communication network
US7822059B2 (en) 2005-07-27 2010-10-26 Atheros Communications, Inc. Managing contention-free time allocations in a network
WO2008141165A1 (en) 2007-05-10 2008-11-20 Intellon Corporation Managing distributed access to a shared medium
FR2912525A1 (fr) * 2007-05-25 2008-08-15 Siemens Vdo Automotive Sas Procede de controle d'integrite de donnees par redondance cyclique incrementale.
WO2010114058A1 (ja) 2009-03-31 2010-10-07 株式会社日本触媒 粒子状吸水性樹脂の製造方法
US8660013B2 (en) 2010-04-12 2014-02-25 Qualcomm Incorporated Detecting delimiters for low-overhead communication in a network
US8891605B2 (en) 2013-03-13 2014-11-18 Qualcomm Incorporated Variable line cycle adaptation for powerline communications
CN103269226B (zh) * 2013-04-19 2016-02-10 荣成市鼎通电子信息科技有限公司 共享存储机制的近地通信中准循环ldpc串行编码器
CN103236859B (zh) * 2013-04-19 2016-04-20 荣成市鼎通电子信息科技有限公司 共享存储机制的准循环ldpc串行编码器

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE417760B (sv) * 1979-05-15 1981-04-06 Ellemtel Utvecklings Ab Sett att vid dataoverforing mellan en sendande dator och en mottagande dator overvaka fel och anordning for genomforande av settet
US4723244A (en) * 1985-10-01 1988-02-02 Harris Corporation Method and apparatus for preserving the integrity of the error detection/correction word in a code word

Also Published As

Publication number Publication date
DE3785211T2 (de) 1993-10-07
US5046069A (en) 1991-09-03
EP0313707B1 (de) 1993-03-31
EP0313707A1 (de) 1989-05-03
DE3785211D1 (de) 1993-05-06
JPH01149631A (ja) 1989-06-12

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