JPH0670964B2 - Method for manufacturing semiconductor device - Google Patents

Method for manufacturing semiconductor device

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Publication number
JPH0670964B2
JPH0670964B2 JP59086633A JP8663384A JPH0670964B2 JP H0670964 B2 JPH0670964 B2 JP H0670964B2 JP 59086633 A JP59086633 A JP 59086633A JP 8663384 A JP8663384 A JP 8663384A JP H0670964 B2 JPH0670964 B2 JP H0670964B2
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JP
Japan
Prior art keywords
layer
insulating film
polycrystalline silicon
region
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59086633A
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Japanese (ja)
Other versions
JPS60231319A (en
Inventor
良一 向井
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Fujitsu Ltd
Original Assignee
Fujitsu Ltd
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Priority to JP59086633A priority Critical patent/JPH0670964B2/en
Publication of JPS60231319A publication Critical patent/JPS60231319A/en
Publication of JPH0670964B2 publication Critical patent/JPH0670964B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H01L21/02683—Continuous wave laser beam
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/0245—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02488—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02505—Layer structure consisting of more than two layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H01L21/02598—Microstructure monocrystalline
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02689—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using particle beams
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02691—Scanning of a beam

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Materials Engineering (AREA)
  • Recrystallisation Techniques (AREA)

Description

【発明の詳細な説明】 （ａ）発明の技術分野 本発明は半導体装置の製造方法に係り、特に非晶質の絶
縁物基体上に、半導体装置を形成するための単結晶半導
体層を形成する工程を含む半導体装置の製造方法の改良
に関する。Description: (a) Technical Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and in particular, a single crystal semiconductor layer for forming a semiconductor device is formed on an amorphous insulating substrate. The present invention relates to improvement of a semiconductor device manufacturing method including steps.

（ｂ）技術の背景 近時、分離耐圧が高く且つ寄生容量が小さい利点を持つ
誘電体（絶縁層）分離構造の半導体集積回路装置（IC）
が提供されている。又半導体ICの高集積化を図るため
に、半導体IC上に絶縁膜を介して更に半導体ICを積層す
る三次元ICが注目され始めている。(B) Background of technology Recently, a semiconductor integrated circuit device (IC) having a dielectric (insulating layer) isolation structure having advantages of high isolation breakdown voltage and small parasitic capacitance.
Is provided. Further, in order to achieve high integration of the semiconductor IC, attention has been given to a three-dimensional IC in which a semiconductor IC is further stacked on the semiconductor IC via an insulating film.

（ｃ）従来技術と問題点 上記誘電体分離構造及び三次元構造の半導体ICにおいて
は、非晶質の絶縁物基体即ち絶縁膜上に単結晶半導体島
状領域が設けられ、この単結晶半導体島状領域上に半導
体装置が形成される。(C) Prior Art and Problems In the semiconductor IC having the dielectric isolation structure and the three-dimensional structure, a single crystal semiconductor island region is provided on an amorphous insulator base, that is, an insulating film. A semiconductor device is formed on the striped region.

上記単結晶半導体島状領域は絶縁膜上に成長せしめられ
た多結晶半導体層を単結晶化することによって形成さ
れ、この際用いられるが、レーザ，電子線，熱線等のエ
ネルギー線照射による単結晶化技術である。The single crystal semiconductor island region is formed by single crystallizing a polycrystalline semiconductor layer grown on an insulating film, and is used in this case, the single crystal by irradiation of energy rays such as laser, electron beam and heat ray. Technology.

この単結晶化技術において重要なのは形成された単結晶
島状領域が結晶粒界を持たない完全な単結晶層よりなる
ことであり、其の為には多結晶半導体島状領域をエネル
ギー線照射によって加熱溶融し再結晶させる際の冷却
が、溶融された半導体層の一個所からその周囲に向かっ
て順次なされて行くことである。What is important in this single crystallization technique is that the formed single crystal island region is composed of a complete single crystal layer having no grain boundary. Therefore, the polycrystalline semiconductor island region is irradiated by energy beam irradiation. Cooling when heating and melting and recrystallizing is performed sequentially from one part of the melted semiconductor layer toward its periphery.

初期の単結晶化技術においては、多結晶半導体層に直に
エネルギー線を照射する方法が用いられていた。即ち例
えば多結晶シリコン層に対して吸収効率の高いアルゴン
（Ar）レーザ・ビームで該多結晶シリコン層上を走査
し、該多結晶シリコン層を順次溶融し再結晶させていた
が、この方法においては溶融されたシリコン層の冷却が
その周囲からも多くなされるので、生成された単結晶シ
リコン層の周辺部に結晶粒界が多発し、半導体装置を形
成することが可能な領域が極めて狭く制限されるという
問題があった。In the early single crystallization technique, a method of directly irradiating the polycrystalline semiconductor layer with energy rays was used. That is, for example, an argon (Ar) laser beam having a high absorption efficiency for a polycrystalline silicon layer is scanned over the polycrystalline silicon layer to sequentially melt and recrystallize the polycrystalline silicon layer. Since the melted silicon layer is cooled much from its surroundings, crystal grain boundaries frequently occur in the peripheral portion of the generated single crystal silicon layer, and the region where a semiconductor device can be formed is extremely narrow. There was a problem of being done.

そこで上記問題を解消するべく提供されたのが傍熱型レ
ーザ・ヒーティング（Indirect Laser Heating）法等と
呼ぶ間接加熱の方法である。Therefore, an indirect heating method called an indirect laser heating method or the like is provided to solve the above problem.

第１図は従来の傍熱型レーザ・ヒーティング法による単
結晶シリコン島状領域の形成方法を示す模式断面図であ
る。FIG. 1 is a schematic cross-sectional view showing a method for forming a single crystal silicon island region by a conventional indirectly heated laser heating method.

この図に示すように従来は、 0.5〜１〔μｍ〕程度の厚さを有する非晶質の絶縁物基
体例えば二酸化シリコン（SiO2）絶縁膜基体１上に、単
結晶化しようとする4000〜5000〔Å〕程度の厚さ，所望
の幅及び長さを有する多結晶シリコン島状領域２を形成
し、 該多結晶シリコン島状領域の表面に、例えば窒化シリコ
ン（Si3N4）膜とSiO2膜との積層構造よりなる分離用絶
縁膜（セパレーション・キャップと称する）３を形成
し、 該SiO2絶縁膜基体１上にレーザ吸収層として、前記多結
晶シリコン島状領域２を覆う厚さ2000〜2500〔Å〕程度
の多結晶シリコン層４を形成し、 該多結晶シリコン層４における前記多結晶シリコン島状
領域２の上部領域を該多結晶シリコン島状領域２の幅よ
りも大きいビーム・スポット径を有する所望強度のArレ
ーザ・ビームＬで走査して該多結晶シリコン層４を高温
に加熱し、該高温に加熱された多結晶シリコン層４を熱
源にして該多結晶シリコン島状領域２を間接的に加熱溶
融して単結晶化し、 しかる後図示しないが多結晶シリコン層４及び分離用絶
縁膜３を除去して、該絶縁膜１上に単結晶シリコン島状
領域を形成していた。As shown in this figure, conventionally, it is attempted to form a single crystal on an amorphous insulator substrate having a thickness of about 0.5 to 1 [μm], for example, a silicon dioxide (SiO 2 ) insulating film substrate 1 A polycrystalline silicon island region 2 having a thickness of about 5000 [Å] and a desired width and length is formed, and, for example, a silicon nitride (Si 3 N 4 ) film is formed on the surface of the polycrystalline silicon island region. A separation insulating film (referred to as a separation cap) 3 having a laminated structure with an SiO 2 film is formed, and a thickness for covering the polycrystalline silicon island region 2 as a laser absorption layer on the SiO 2 insulating film substrate 1. The polycrystalline silicon layer 4 having a thickness of about 2000 to 2500 [Å] is formed, and the upper region of the polycrystalline silicon island region 2 in the polycrystalline silicon layer 4 is larger than the width of the polycrystalline silicon island region 2. Ar laser beam of desired intensity with beam spot diameter The polycrystalline silicon layer 4 is heated to a high temperature by scanning with L, and the polycrystalline silicon island region 2 is indirectly heated and melted by using the polycrystalline silicon layer 4 heated to the high temperature as a heat source to form a single crystal. Then, although not shown, the polycrystalline silicon layer 4 and the isolation insulating film 3 were removed to form a single crystal silicon island region on the insulating film 1.

かかる傍熱型レーザ・ヒーティング法においては、溶融
されたシリコン島状領域の上部及び側面が加熱源となっ
た多結晶シリコン層４で覆われていることによって、該
シリコン島状領域２の冷却がその中心近傍から優先して
行われるので、周辺部から発生する結晶粒界をなくして
良質の単結晶シリコン島状領域が形成される。In such an indirectly heated laser heating method, the upper and side surfaces of the melted silicon island region are covered with the polycrystalline silicon layer 4 serving as a heating source, so that the silicon island region 2 is cooled. Is preferentially performed from the vicinity of the center thereof, so that the crystal grain boundaries generated from the peripheral portion are eliminated and a high quality single crystal silicon island region is formed.

然しながら上記従来方法においては、単結晶化しようと
する多結晶シリコン島状領域２が、レーザ・ビームの吸
収効率が悪いために高温に加熱されない絶縁膜１上に直
接載設されているために、冷却が他部より比較的速く行
われる該島状領域の下面の周辺部５を含む全体に溶融さ
れたシリコン島状領域が再結晶する際の該が発生し勝ち
であり、そのため一基板上に完全な単結晶シリコン島状
領域の形成歩留りが80〜100〔％〕の範囲でばらつくと
いう問題があった。However, in the above-mentioned conventional method, since the polycrystalline silicon island region 2 to be single-crystallized is directly mounted on the insulating film 1 which is not heated to a high temperature due to poor laser beam absorption efficiency, This is liable to occur when re-crystallizing the melted silicon island region including the peripheral portion 5 on the lower surface of the island region in which the cooling is performed relatively faster than other portions, and therefore, it is likely to occur on one substrate. There has been a problem that the yield of formation of a complete single crystal silicon island region varies in the range of 80 to 100 [%].

（ｄ）発明の目的 本発明は上記傍熱型レーザ・ヒーティング法等の間接加
熱方式の単結晶化技術において、完全な単結晶半導体島
状領域の形成歩留りのばらつきをさらに減少せしめる目
的でなされたものである （ｅ）発明の構成 上記目的は本発明により絶縁物基体上の熱伝導体として
機能する第１の層、第１の層における島状領域面上の第
１の絶縁膜、第１の絶縁膜上の単結晶化のための半導体
島状領域よりなる積層と、半導体島状領域の上表面及び
側面を覆う分離用絶縁膜と保温膜として機能する第２の
絶縁膜とを形成し、さらに第２の絶縁膜を含む基体面上
をエネルギー線吸収体として機能する第２の層で覆い、
第２の層上からエネルギー線を照射し、結晶核が半導体
島状領域の中心部近傍にのみ発生するように第１、第２
の層及び第１、第２の絶縁膜の厚さが選ばれ、第２の層
中に発生された熱が第２の絶縁膜を介し、また第１の層
と第１の絶縁膜とを介し半導体島状領域に供給されるよ
うにして半導体島状領域が単結晶化されることを特徴と
する半導体装置の製造方法によって達成される。(D) Object of the Invention The present invention has been made for the purpose of further reducing the variation in the yield of formation of complete single crystal semiconductor island regions in the indirect heating type single crystallization technique such as the indirectly heated laser heating method. (E) Structure of the Invention The above object is to provide a first layer functioning as a heat conductor on an insulating substrate according to the present invention, a first insulating film on an island region surface in the first layer, and A stack of semiconductor island regions for single crystallization on the first insulating film, a separation insulating film covering the upper surface and side surfaces of the semiconductor island region, and a second insulating film functioning as a heat insulating film. And further covering the surface of the base body including the second insulating film with a second layer functioning as an energy ray absorber,
Irradiation with energy rays from above the second layer so that crystal nuclei are generated only near the center of the semiconductor island region.
And the thicknesses of the first and second insulating films are selected so that the heat generated in the second layer passes through the second insulating film, and the heat is generated between the first layer and the first insulating film. This is achieved by a method for manufacturing a semiconductor device, which is characterized in that the semiconductor island-shaped region is single-crystallized so as to be supplied to the semiconductor island-shaped region.

即ち本発明においては、単結晶化しようとする半導体島
状領域と該島状領域が載設される絶縁物基体との間に熱
伝導層と第１の絶縁膜を介在せしめ、該半導体島状領域
をさらに第２の絶縁膜を覆い、かつこの第２の絶縁膜を
含む基体上をエネルギー線吸収層で覆い、この吸収層上
をエネルギー線で照射することにより、そこに発生した
熱が半導体島状領域に上部から供給されるばかりでなく
熱伝導層を介して下部からも供給されることによって、
間接的に加熱溶融された該半導体島状領域が冷却単結晶
化される際の結晶核が、該半導体島状領域の中心近傍の
みに発生するようにしたものである。That is, in the present invention, the heat conduction layer and the first insulating film are interposed between the semiconductor island-shaped region to be single-crystallized and the insulator base on which the island-shaped region is mounted, and the semiconductor island-shaped region is formed. The region is further covered with the second insulating film, the substrate including the second insulating film is covered with the energy ray absorbing layer, and the energy layer is irradiated with the energy ray. By being supplied not only from the top to the island region but also from the bottom through the heat conduction layer,
The crystal nuclei generated when the semiconductor island-shaped region indirectly heated and melted is cooled into a single crystal are generated only near the center of the semiconductor island-shaped region.

かくして単結晶半導体島状領域周辺部から結晶粒界が発
生することが防止され、完全な単結晶半導体島状領域の
形成歩留りのばらつきが殆ど無くなる。Thus, generation of crystal grain boundaries from the peripheral portion of the single crystal semiconductor island-shaped region is prevented, and variations in the formation yield of complete single crystal semiconductor island-shaped regions are almost eliminated.

（ｆ）発明の実施例 以下本発明の要旨を、単結晶シリコン島状領域を形成す
る際の実施例について、図を参照して具体的に説明す
る。(F) Examples of the Invention Hereinafter, the gist of the present invention will be specifically described with reference to the drawings regarding the examples of forming the single crystal silicon island region.

第２図（ａ）〜（ｅ）は一実施例の工程断面図、第３図
は他の一実施例の工程断面図である。2 (a) to (e) are process cross-sectional views of one embodiment, and FIG. 3 is a process cross-sectional view of another embodiment.

第２図（ａ）参照 第１の実施例においては、図示しないシリコン基板面等
に通常の方法で形成された0.5〜１〔μｍ〕程度の厚さ
の例えばSiO2絶縁膜基体11上に、通常の減圧化学気相成
長法で熱伝導層として機能する例えば厚さ500〜1000
〔Å〕程度の第１の多結晶シリコン層12を形成し、次い
で同じく減圧化学気相成長法により該第１の多結晶シリ
コン層12上に第１の絶縁膜として機能し、且つ熱の伝導
率が比較的大きい100〔Å〕程度の窒化シリコン膜13を
形成し、次いで同じく減圧化学気相成長法により該窒化
シリコン膜13上に例えば厚さ4000〜5000〔Å〕程度の第
２の多結晶シリコン層を形成し、次いで通常ドライ・エ
ッチング手段により該第２の多結晶シリコン層のパター
ンニングを行って、単結晶化しようとする例えば幅20
〔μｍ〕長さ60〔μｍ〕程度の多結晶シリコン島状領域
14を形成する。See FIG. 2 (a) In the first embodiment, for example, on a SiO 2 insulating film substrate 11 having a thickness of about 0.5 to 1 μm, which is formed on a silicon substrate surface (not shown) by a normal method, It functions as a heat conduction layer in a normal low pressure chemical vapor deposition method, for example, a thickness of 500 to 1000
The first polycrystalline silicon layer 12 having a thickness of about [Å] is formed, and then it also functions as a first insulating film on the first polycrystalline silicon layer 12 by the low pressure chemical vapor deposition method and conducts heat. A silicon nitride film 13 having a relatively large rate of about 100 [Å] is formed, and then a second multi-layer having a thickness of, for example, about 4000 to 5000 [Å] is formed on the silicon nitride film 13 by the same low pressure chemical vapor deposition method. A crystalline silicon layer is formed, and then the second polycrystalline silicon layer is patterned, usually by dry etching means, to obtain a single crystal, for example, a width of 20.
[Μm] Polycrystalline silicon island region with a length of approximately 60 [μm]
Forming 14

第２図（ｂ）参照 次いで熱酸化法により、該多結晶シリコン島状領域14の
表面に分離用絶縁膜（セパレーション・キャップ）とし
て機能する厚さ例えば350〜400〔Å〕程度のSiO215膜を
第２の絶縁膜として形成し、次いで所定の選択エッチン
グ手段により表出している窒化シリコン膜13を除去す
る。See FIG. 2 (b). Then, by thermal oxidation, SiO 2 15 having a thickness of, for example, about 350 to 400 [Å] that functions as an insulating film for separation (separation cap) is formed on the surface of the polycrystalline silicon island region 14. A film is formed as a second insulating film, and then the exposed silicon nitride film 13 is removed by a predetermined selective etching means.

第２図（ｃ）参照 次いで前記同様減圧化学気相成長法により該多結晶シリ
コン島状領域14が配設されている第１の多結晶シリコン
層12上に、Arレーザ吸収層として機能する厚さ例えば20
00〜2500〔Å〕程度の第２の層としての第３の多結晶シ
リコン層16を形成する。See FIG. 2 (c). Then, the thickness that functions as an Ar laser absorption layer is formed on the first polycrystalline silicon layer 12 in which the polycrystalline silicon island regions 14 are arranged by the low pressure chemical vapor deposition method as described above. For example 20
A third polycrystalline silicon layer 16 as a second layer having a thickness of about 00 to 2500 [Å] is formed.

第２図（ｄ）参照 次いで該第３の多結晶シリコン層16上に図示しない反射
防止膜を形成した後、該第３の多結晶シリコン層16にお
ける該多結晶シリコン島状領域14の上部領域を、該多結
晶シリコン島状領域14の幅よりも大きなビーム・スポッ
ト径例えば50〔μｍ〕程度のビーム・スポット径を有し
10〔Ｗ〕程度の出力を有するArレーザ・ビームＬで、該
多結晶シリコン島状領域14の長さ方向に順次走査する。See FIG. 2D. Next, after forming an antireflection film (not shown) on the third polycrystalline silicon layer 16, an upper region of the polycrystalline silicon island region 14 in the third polycrystalline silicon layer 16 is formed. Has a beam spot diameter larger than the width of the polycrystalline silicon island region 14, for example, about 50 [μm].
An Ar laser beam L having an output of about 10 [W] is sequentially scanned in the length direction of the polycrystalline silicon island region 14.

（走査速度は10〔cm/sec〕程度） 上記構造においては、シリコン島状領域14の上部及び側
面がレーザ吸収層である第３の多結晶シリコン層16に覆
われ且つ下部に熱伝導率の大きい第１の多結晶シリコン
層12が配設されているので、上記レーザ・ビーム照射に
よって溶融されたシリコン島状領域14は該島状領域２を
包むこれら給熱部から離れた中心部近傍から周辺部に向
かって順次冷却され単結晶化されて行く。かくして結晶
粒界が存在しない完全な単結晶島状領域24が形成され
る。(The scanning speed is about 10 [cm / sec]) In the above structure, the upper and side surfaces of the silicon island region 14 are covered with the third polycrystalline silicon layer 16 which is a laser absorption layer, and the lower part has a thermal conductivity of Since the large first polycrystalline silicon layer 12 is provided, the silicon island region 14 melted by the laser beam irradiation is located near the center part away from these heat-supplying parts that surround the island region 2. It gradually cools toward the periphery and becomes a single crystal. Thus, a complete single crystal island region 24 having no grain boundary is formed.

なお該実施例において完全な単結晶島状領域の形成歩留
りの変動は、一基板当たり95〜100〔％〕の範囲に抑え
られた。In this example, the variation of the formation yield of the complete single crystal island region was suppressed to the range of 95 to 100 [%] per substrate.

第２図（ｅ）参照 次いで通常のドライ・エッチング手段により図示しない
反射防止膜，第３の多結晶シリコン層16及びSiO2膜（分
離用絶縁膜）15を除法し、次いで単結晶島状領域24の周
囲に表出している第１の多結晶シリコン層12を除去し、
SiO2絶縁膜基体11上に窒化シリコン絶縁膜13及び第１の
多結晶シリコン層12を下部に有する単結晶シリコン島状
領域24を形成する。See FIG. 2 (e). Then, the antireflection film, the third polycrystalline silicon layer 16 and the SiO 2 film (separation insulating film) 15 (not shown) are removed by a normal dry etching means, and then the single crystal island region is formed. Removing the first polycrystalline silicon layer 12 exposed around 24,
On the SiO 2 insulating film substrate 11, a single crystal silicon island region 24 having a silicon nitride insulating film 13 and a first polycrystalline silicon layer 12 underneath is formed.

以後図示しないが、このようにして一SiO2絶縁膜基体11
上に多数個形成された単結晶シリコン島状領域24に通常
の方法で半導体装置が形成される。Although not shown in the drawings, the SiO 2 insulating film substrate 11
A semiconductor device is formed in the single crystal silicon island region 24 formed in large numbers on the upper surface by a usual method.

第３図は第２の実施例における単結晶化に際しての構造
を示したものである。同図において11はSiO2絶縁膜基
体、12は厚さ500〔Å〕程度の第１の層としての第１の
多結晶シリコン層、14は単結晶化される厚さ4000〜5000
〔Å〕，幅20〔μｍ〕，長さ60〔μｍ〕程度の多結晶シ
リコン島状領域、16は第２の層としての第３の多結晶シ
リコン層、21は厚さ300〔Å〕程度の第１のSiO2絶縁
膜、22は厚さ350〜400〔Å〕程度の第２のSiO2絶縁膜、
23は厚さ800〔Å〕程度の窒化シリコン膜、ＬはArレー
ザ・ビームを表している。FIG. 3 shows the structure during single crystallization in the second embodiment. In the figure, 11 is a SiO 2 insulating film substrate, 12 is a first polycrystalline silicon layer as a first layer having a thickness of about 500 [Å], and 14 is a single crystallized thickness of 4000 to 5000.
[Å], a polycrystalline silicon island region having a width of 20 [μm] and a length of 60 [μm], 16 is a third polycrystalline silicon layer as a second layer, and 21 is a thickness of 300 [Å] the first SiO 2 insulating film, 22 thick 350-400 [Å] about the second SiO 2 insulating film,
Reference numeral 23 denotes a silicon nitride film having a thickness of about 800 [Å], and L denotes an Ar laser beam.

なおここで第１の多結晶シリコン層12は前記実施例同様
熱伝導層として機能し、第1,第２のSiO2絶縁膜21,22は
分離絶縁層及び保温層として機能し、窒化シリコン膜23
は第３の多結晶シリコン層の剥離防止層として機能し、
第３の多結晶シリコン層16は前記実施例同様レーザ吸収
層として機能する。かかる構造においても、溶融したシ
リコン島状領域14は、周囲が保温層として機能する第1,
第２のSiO2絶縁膜21,22を介して第１の多結晶シリコン
層12,第３の多結晶シリコン層16等よりなる給熱層によ
って囲まれているので、冷却は該シリコン島状領域14の
中心部近傍から始まり、該中心部近傍を核にして周辺部
に向かって単結晶層が成長する。従って結晶粒界のない
完全な多結晶シリコン島状領域が形成される。Here, the first polycrystalline silicon layer 12 functions as a heat conduction layer, the first and second SiO 2 insulating films 21 and 22 function as isolation insulating layers and heat insulating layers, and the silicon nitride film is used. twenty three
Functions as a peeling prevention layer for the third polycrystalline silicon layer,
The third polycrystalline silicon layer 16 functions as a laser absorption layer as in the above embodiment. Even in such a structure, the molten silicon island region 14 has the first and
Since it is surrounded by the heat supply layer composed of the first polycrystalline silicon layer 12, the third polycrystalline silicon layer 16 and the like via the second SiO 2 insulating films 21 and 22, cooling is performed in the silicon island region. Starting from the vicinity of the central part of 14, the single crystal layer grows toward the peripheral part with the vicinity of the central part as a nucleus. Therefore, a complete polycrystalline silicon island region having no grain boundary is formed.

なお上記実施例においては、シリコンよりなるエネルギ
ー線吸収層と該シリコン層に高効率で吸収されるArレー
ザとの組合せでシリコン島状領域の加熱を行ったが、該
エネルギー線吸収層とエネルギー線との組合せは上記実
施例に限られるものではない。但し吸収効率は出来るだ
け高い事が望ましい。In the above example, the silicon island region was heated by the combination of the energy ray absorption layer made of silicon and the Ar laser that is absorbed in the silicon layer with high efficiency. The combination with is not limited to the above embodiment. However, it is desirable that the absorption efficiency is as high as possible.

又エネルギー線にはレーザ以外に、電子線，熱線等も用
いられる。Besides the laser, an electron beam, a heat ray or the like may be used as the energy ray.

なお又本発明は、絶縁物基体上にシリコン以外の半導体
単結晶島状領域を形成する際にも適用される。The present invention is also applied when forming a semiconductor single crystal island region other than silicon on an insulator substrate.

（ｇ）発明の効果 以上説明したように本発明によれば、絶縁物基体上に、
周辺部に結晶粒界が形成されない完全な単結晶半導体島
状領域を極めて変動の少ない高歩留りで形成できる。(G) Effect of the Invention As described above, according to the present invention, on the insulator substrate,
It is possible to form a complete single crystal semiconductor island-shaped region in which no crystal grain boundary is formed in the peripheral portion with a high yield with very little fluctuation.

従って本発明は、誘電体分離構造あるいは三次元構造の
半導体集積回路装置を製造する際に有効である。Therefore, the present invention is effective in manufacturing a semiconductor integrated circuit device having a dielectric isolation structure or a three-dimensional structure.

【図面の簡単な説明】[Brief description of drawings]

第１図は従来の単結晶島状領域形成方法を示す模式断面
図、第２図は本発明の方法における一実施例の工程断面
図で、第３図は同じく他の一実施例の工程断面図であ
る。 図において、11はSiO2絶縁膜基体、12は第１の多結晶シ
リコン層、13は窒化シリコン膜、14は多結晶シリコン島
状領域、15はSiO2膜、16は第３の多結晶シリコン層、Ｌ
はArレーザ・ビームをしめす。FIG. 1 is a schematic cross-sectional view showing a conventional method for forming a single crystal island region, FIG. 2 is a process cross-sectional view of an embodiment of the method of the present invention, and FIG. 3 is a process cross-section of another embodiment. It is a figure. In the figure, 11 is a SiO 2 insulating film substrate, 12 is a first polycrystalline silicon layer, 13 is a silicon nitride film, 14 is a polycrystalline silicon island region, 15 is a SiO 2 film, and 16 is a third polycrystalline silicon. Layer, L
Shows the Ar laser beam.

Claims (1)

【特許請求の範囲】[Claims] 【請求項１】絶縁物基体上の熱伝導体として機能する第
１の層、第１の層における島状領域面上の第１の絶縁
膜、第１の絶縁膜上の単結晶化のための半導体島状領域
よりなる積層と、半導体島状領域の上表面及び側面を覆
う分離用絶縁膜と保温膜として機能する第２の絶縁膜と
を形成し、さらに第２の絶縁膜を含む基体面上をエネル
ギー線吸収体として機能する第２の層で覆い、第２の層
上からエネルギー線を照射し、結晶核が半導体島状領域
の中心部近傍にのみ発生するように第１、第２の層及び
第１、第２の絶縁膜の厚さが選ばれ、第２の層中に発生
された熱が第２の絶縁膜を介し、また第１の層と第１の
絶縁膜とを介し半導体島状領域に供給されるようにして
半導体島状領域が単結晶化されることを特徴とする半導
体装置の製造方法。1. A first layer functioning as a heat conductor on an insulator substrate, a first insulating film on a surface of an island region in the first layer, and a single crystallization on the first insulating film. Of the semiconductor island-shaped region, a separation insulating film covering the upper surface and the side surface of the semiconductor island-shaped region, and a second insulating film functioning as a heat insulating film, and a substrate including the second insulating film. Covering the body surface with a second layer that functions as an energy ray absorber, and irradiating with energy rays from above the second layer so that crystal nuclei are generated only near the center of the semiconductor island region, The thickness of the second layer and the thicknesses of the first and second insulating films are selected, heat generated in the second layer passes through the second insulating film, and the heat of the first layer and the first insulating film A method for manufacturing a semiconductor device, wherein the semiconductor island-shaped region is monocrystallized so that the semiconductor island-shaped region is supplied to the semiconductor island-shaped region.
JP59086633A 1984-04-28 1984-04-28 Method for manufacturing semiconductor device Expired - Lifetime JPH0670964B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59086633A JPH0670964B2 (en) 1984-04-28 1984-04-28 Method for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59086633A JPH0670964B2 (en) 1984-04-28 1984-04-28 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPS60231319A JPS60231319A (en) 1985-11-16
JPH0670964B2 true JPH0670964B2 (en) 1994-09-07

Family

ID=13892425

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59086633A Expired - Lifetime JPH0670964B2 (en) 1984-04-28 1984-04-28 Method for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JPH0670964B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5264072A (en) * 1985-12-04 1993-11-23 Fujitsu Limited Method for recrystallizing conductive films by an indirect-heating with a thermal-conduction-controlling layer

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
Ａｐｐｌ．Ｐｈｙｓ．Ｌｅｔｔ．，［４４（１０），１５Ｍａｙ１９８４，ＰＰ．９９４−９９６
第３０回応物学会連合講演会予稿集Ｐ．５１８Ｎｏ．７ａ−Ｎ−６

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