JPH065938B2 - Video signal recording method, video signal recording apparatus, and recording / reproducing apparatus - Google Patents

Description

Description: FIELD OF THE INVENTION The present invention relates to a video signal recording method for recording a video signal of a predetermined period T by dividing it into a plurality of parallel slant tracks of a tape during the period of T. The present invention relates to a video signal recording device and a recording / reproducing device.

[Background of the Invention]

As a conventional example of a so-called segment recording type magnetic recording / reproducing apparatus for dividing one vertical scanning period of a video signal, for example, one field period into a plurality of sets and recording them on a magnetic tape, there is a four-head VTR for commercial use such as a broadcasting station. The details are described, for example, in the literature (edited by Japan Broadcast Publishing Association, Television Society, edited by Minoru Inazu, Takeshi Iwasawa, VTR technology). In the segment recording system VTR, 1 of the video signal
Since the field is recorded by dividing it into multiple sets of tracks,
In the reproduction, a time axis correction circuit for correcting a so-called skew (a sudden change in the time axis) that occurs when the tracks are switched due to a mounting error of the rotary head, expansion and contraction of the tape, etc. is essential. As a method for correcting this skew, as described in detail in the above-mentioned document (Chapter 7), the delay time of the video signal is made variable through a variable delay line or the like according to the skew amount, A method of correcting the time axis is known in which the phase of the video signal and the horizontal synchronizing signal is made continuous by expanding or contracting the horizontal blanking period of the signal, more specifically, the period of the front porch immediately before the horizontal synchronizing signal. Is.

According to the above-mentioned conventional method, the amount of skew that can be corrected is determined by the time width of the front porch included in the video signal, and the current television system has a limit of about 1 to 2 μsec.

On the other hand, in the current home VTR, a so-called one-field one-segment type (two-segment type for one frame) helical scan type that generally records one field of a video signal in one track is generally used. However, in order to further reduce the size and weight of the VTR by reducing the diameter of the rotating drum, or by increasing the number of rotations of the rotating drum to improve the image quality, it is much more significant than the current TV system. In order to realize a new VTR capable of recording a video signal having a band several times wider than the conventional one, such as a so-called high-definition television which can obtain high definition and high image quality, an attempt to record the above segment in a home VTR as well. Is being done. However, in a helical scan type domestic VTR, due to manufacturing restrictions, the finishing accuracy of the rotary head system, the tape running system, and other mechanical systems is not always sufficient, and if the tape storage conditions for general households are taken into consideration. The amount of skew generation is as long as several μsec, and in consideration of compatibility reproduction, it is necessary to allow for a further margin in the above value.

In addition, according to a system partially proposed as the above high-definition television, there is a document (Technical Report of the Television Society VOL.
7, NO.44, March 1984; "High-definition television satellite 1-channel transmission system MUSE"), the horizontal blanking period assigned to a video signal is short (1 μsec or less).

Therefore, considering the actual situation of the amount of skew generation in the above-mentioned home VTR, the conventional method described above is applicable to both the current television system and the high-definition television system.
It is very difficult to completely eliminate skew,
It was difficult to put a VTR to achieve the above purpose into practical use.

Another conventional example of the segment recording is a so-called digital VTR which converts a video signal into a digital signal and records the digital signal in the form of a PCM signal. However, the quantization accompanying the digitization of the video signal is possible. Since it is necessary to reduce the error, the number of quantized bits increases, which significantly increases the transmission rate of the PCM signal recorded on the magnetic tape, significantly lowers the recording density of the tape, and provides sufficient recording time. In addition, the signal to be handled becomes extremely wide band, which is technically difficult, which is a major obstacle to popularization for household use. In order to secure a sufficient recording time and obtain a sufficient image quality, it is an important issue for those skilled in the art to realize the segment recording by the analog method instead of the digital method.

[Object of the Invention]

In view of the above, an object of the present invention is to provide a magnetic recording / reproducing apparatus capable of taking a large enough amount of skew correction and completely removing the skew in a stable and reliable manner to easily realize the above segment recording. To provide.

[Outline of Invention]

For the above-mentioned purpose, in the present invention, a video signal including luminance information Y and color information C and including a number N of horizontal scanning lines at a period T is n sets (n is an integer of 2 or more) in the period T. In a recording method of a video signal divided into segments and divided into a plurality of parallel diagonal tracks of a tape by a rotary head, at least a part of the signal in the vertical blanking period is removed from the input video signal. Then, the remaining video signal is [N
/ N] (maximum integer not exceeding N / n), the signals of n sets of segments so as to include a signal obtained by time-division multiplexing the luminance information Y and the color information C in effective horizontal scanning line units. Signal blocks of each set are recorded on the tracks of each set by making the signals of the segments of each set correspond to one parallel set of tracks on the tape, and an arbitrary period is provided between the signal blocks. Performing time-axis conversion for each signal block so as to generate a recorded video signal having a redundant signal of
At least the recorded video signal is sequentially recorded together with the redundant signal for each of the signal blocks on the corresponding tracks of each set, and the redundant signal is recorded at a predetermined position of the track for the entire period. To do. Also,
An audio signal input along with the video signal is recorded in a track in an area different from the area in which the recording video signal is recorded.

Example of Invention

 Hereinafter, the present invention will be described in detail with reference to Examples.

FIG. 1 is a block diagram showing an embodiment of a video signal recording apparatus when the present invention is applied to a single-channel two-head helical scan type VTR, and FIG. 2 is a waveform diagram for explaining its operation. FIG. 3 is a diagram showing a track pattern obtained by this.

In FIG. 1, the magnetic tape 1 is a capstan motor 20.
The capstan motor 20 is rotationally controlled at a constant speed by the capstan servo circuit 21. The magnetic heads 4a and 4b have different azimuth angles and are mounted on the disk 2 at an angle of 180 °.
Is rotated together with the disk 2. Tape 1 is wrapped around disk 2 more than 180 °, so head 4a
And 4b simultaneously contact each other on the tape 1, that is, on the track, so-called overlap portions shown by Q ₁ and Q ₂ in FIG. 3 are formed. Two magnets 3a and 3b are attached to the disk 2 at an angle of 180 ° to each other. A tack pulse detected by the tack head 5 and synchronized with the rotation of the heads 4a and 4b (c in FIG. 2). From the tack head 5. The tack pulse from the tack head 5 receives the phase adjustment circuit 7
The heads 4a, 4b and the tape 1 are phase-adjusted so that the tape 1 has a predetermined relative positional relationship with each other. Specifically, the output is delayed by a time τ _{0 as} shown in FIG. 8 are supplied. The pulse forming circuit 8 outputs a pulse having a duty ratio of 50% (d in FIG. 2, hereinafter referred to as a head switching signal) in synchronization with the rotation of the heads 4a and 4b. 140 is a synchronization information output circuit,
From the input video signal (a in FIG. 2) from the terminal 200, a signal based on the vertical synchronization information included therein (eg, a signal shown in a hatched portion included in the vertical blanking period τ _B in FIG. 2a) VS, and A signal HS based on horizontal synchronization information such as a synchronization signal or a burst signal is output. The circuit 140
The vertical synchronization information VS (b in FIG. 2) is supplied to the disk servo circuit 9 as a servo reference signal for recording.
In the disk servo circuit 9, the vertical synchronization information VS from the circuit 140 and the head switching signal from the circuit 8 are compared in phase, and an error signal corresponding to the phase difference between the two is output and supplied to the disk motor 6. As a result, both the vertical synchronization information VS and the head switching signal are phase-synchronized with each other, more specifically, as shown in FIG. 2, the vertical synchronization information VS (b in FIG. 2) and the head switching signal. Signal (second
The rotation of the disk motor 6 is controlled so that the phase difference time from d) in the figure becomes τ ₁ .

Here, in general, when n segment recording is performed, that is, when one field of a video signal is divided into n sets and divided into n sets of tracks, the field frequency of the video signal is set to f _0. , The rotational speed M of the disk motor 6 in the two-head type VTR shown in FIG.
Is determined by the disk servo circuit 9 so as to satisfy the following equation.

In the embodiment shown in FIG. 1, NTSC, PAL, SE
When the present invention is applied to the current television system such as CAM, f ₀ = 60 Hz, n = 4. Therefore, from the above formula (1), M =
The operation of the 4-segment recording with 120 rps will be described below.

In this case, the number X of horizontal scanning lines (lines) of the video signal which can be recorded in the 180 ° period in the track longitudinal direction (the period shown by T in FIGS. 2 and 3) is one field of the video signal. Let N be the number of lines in 262.5 horizontal scanning lines per field (5 per frame
In case of the current TV system (NTSC system) of 25),
X is given by the following equation.

X = 65.625 (3) In the present invention, as will be described later, in the period T of 180 ° in the longitudinal direction of each track, [X] (a maximum integer not exceeding X, expressed by the above formula (3)) In this case, the video signal of [X] = 65) lines or less is recorded.

In the embodiment shown in FIG. ₁ , the number of lines N ₁ recorded in the period T is [X] ≧ N ₁ = 64 (4).

The subscripts 1 to 256 shown in FIGS. 2 and 3 indicate the line numbers of the video signals recorded on the tape.

Next, a block 100a shown by a dashed line in FIG. 1 shows a time axis converter for recording according to the present invention. In the figure, 200
Is an input terminal for a video signal, and 300 is an output terminal for a video signal to be recorded which is time-axis converted by the time-axis converter 100a.
101 is an A / D conversion circuit for converting a video signal from the terminal 200 into a digital signal, 102 is a memory including a RAM,
103 is a D / A conversion circuit, 104 is a blanking signal insertion circuit, 1
10 is a write clock generation circuit, 111 is a write address control circuit, 120 is a read clock generation circuit, 121 is a read address control circuit, 122 is a read start pulse generation circuit, and 130 is a blanking signal generation circuit.

The write clock generation circuit 110 generates and outputs the write clock CP ₁ synchronized with the horizontal synchronization information HS from the circuit 140. The write clock CP ₁ is supplied to the write address control circuit 111 and the A / D conversion circuit 101. The write address control circuit 111 is composed of a counter and the like,
Counting is started by the horizontal synchronization information HS from the circuit 140, the write clock CP ₁ from the circuit 110 is counted, and an address signal corresponding to the counted value is output,
It is supplied as a write address signal for the memory 102. This address signal is sequentially updated by the horizontal synchronization information HS every horizontal scanning cycle. Therefore, the input video signal (a in FIG. 2) from the terminal 200 is synchronized with the write clock CP ₁ output from the circuit 110, and the A / D conversion circuit
It is sequentially converted into a digital signal in 101, and its output is sequentially written in the memory 102 in units of horizontal scanning period in accordance with the address from the circuit 111.

It should be noted that the storage capacity of the memory 102 can be obtained by determining the necessary minimum amount according to the generation amount of the redundant period τ described later, but as a rough value, it is sufficient if information of several lines of the input video signal can be stored. The feature of the present invention is that a relatively small capacity is required.

Here, as an example, the storage capacity of the memory 102 is set to 8H (the storage capacity for one line of the input video signal is set to 1H), and the memory 102 is composed of eight line units M1, M2, ..., M8. In the above embodiment, the video signals of line numbers 1, 9, 17, ..., 249 are stored in the first memory M1 and the line signals 2, 10, 18, 18 are stored in the second memory M2. …, 250
Similarly, the video signals of line numbers 8, 16, 24, ..., 256 are sequentially and cyclically written in the eighth memory M8 in the time series order.

In order to make sure that the above writing operations are performed in chronological order,
The vertical synchronization information VS from the circuit 140 is supplied to the write address control circuit 111, and the vertical synchronization information VS controls so that, for example, the video signal of line number 1 is always written in the memory M1 for each field. .

Next, the read clock generation circuit 120 outputs the read clock CP ₂ synchronized with the write clock CP ₁ from the circuit 110.
Is generated and output. An embodiment of the read clock generation circuit 120 is shown in FIG.

In FIG. 4, reference numeral 310 is an input terminal of the write clock CP ₁ from the circuit 110, and 320 is an output terminal of the read clock CP ₂ . The write clock CP ₁ from the terminal 310 is appropriately divided into 1 / k (k is an integer of 1 or more) by the divider circuit 301,
The output is supplied to one of the phase comparison circuits 302. To the other input of the phase comparison circuit 302, an output obtained by appropriately dividing the output from the voltage controlled oscillation circuit 304 by the frequency dividing circuit 305 into 1 / m (m is an integer of 1 or more) is supplied. This phase comparison circuit 30
At 2, the outputs from the circuits 301 and 305 are compared in phase, and a phase error signal corresponding to the phase difference between the two is output from the circuit 302. The output from this circuit 302 is supplied as a control voltage for the voltage controlled oscillator circuit 304 via the phase compensation circuit 303.
The output from the circuit 304 is the terminal as the read clock CP _2.
It is output to 320. A PLL circuit is constituted by the above circuits, and the read clock CP ₂ from the circuit 304 is
Phase-locked to the write clock CP ₁ from 310.
The frequency f ₂ of the read clock CP ₂ from the read clock generation circuit 120 configured as described above is given by the following equation, where f ₁ is the frequency of the write clock CP ₁ from the circuit 110.

The read clock CP ₂ from the above read clock generation circuit 120 is used for the read address control circuit 121 and the D / A conversion circuit 1.
Supplied to 03.

11 is a delay circuit, which is triggered by both edges of rising and falling of the output (d of FIG. 2) from the circuit 8, and outputs a predetermined duration tau ₂ of the pulse (e of FIG. 2) . The output from the delay circuit 11 is a read start pulse generation circuit.
It is supplied to 122, and a pulse (f in FIG. 2) is generated and output from the trailing edge of the output from the circuit 11 in this circuit 122. The output pulse from the circuit 122 is synchronized with the tack pulse from the tack head 5 (c in FIG. 2), and thus with the rotation of the heads 4a and 4b, and the scanning of the heads 4a and 4b. It is supplied to the read address control circuit 121 as a read stard pulse RS for instructing the start of reading of the memory 102 every cycle (the cycle shown by T in FIG. 2).

The read address control circuit 121 is composed of a counter or the like, and starts counting by the read start pulse RS from the circuit 122, counts the read clock CP ₂ from the circuit 120, and outputs an address signal corresponding to the count value. And is supplied as a read address signal of the memory 102.

An example of the read address control circuit 121 is shown in FIG.

In FIG. 5, 420 is an input terminal of the read clock CP ₂ from the circuit 120, 421 is an input terminal of the read start pulse RS from the circuit 122, and 422 is an output terminal of the read address signal. The read start pulse RS from the terminal 421 is synchronized with the read clock CP ₂ from the terminal 420 by the latch circuit 401. The output from the circuit 401 is
It is input to the reset input R of the counter 404 via the OR gate 402, which resets the counter 404.
Further, the clock input CK of the counter 404 is supplied with the read clock CP ₂ from the terminal 420 via the AND gate 403. An R / S flip-flop circuit 408 is set by the output from the circuit 401, and its output Q (i in FIG. 2) becomes a high level "H". This allows AN
The D gate 403 opens, and the clock CP ₂ from the terminal 420 is supplied to the counter 404 to start counting. 405 is a counter
The counter 404 is a decoder for decoding the count value of 404, and the count value of the counter 404 is N ₀ (in this embodiment, the write clock C within one horizontal scanning period of the video signal (a in FIG. 2)).
The value of N ₀ is set to be equal to the number of clocks of P ₁ . )Became. Sometimes it outputs a pulse. The output pulse (g in FIG. 2) from the decoder 405 is supplied to the reset input R of the counter 404 via the OR gate 402, which resets the counter 404 again and restarts counting. The above operation is repeated based on the output pulse from the decoder 405. The count output from the counter 404 is supplied as a read address signal of the memory 102 via the terminal 422. Since N ₀ is set to be equal to the number of write clocks in one horizontal scanning period of the video signal, the video signal written in the memory 102 is not lost during the horizontal scanning period. All of them are read sequentially.

Next, the output from the decoder 405 is input to the clock input CK of the counter 406. The output from the circuit 401 is supplied to the reset input R of the counter 406,
This resets the counter 406 and the decoder 405.
The output pulse from is started to be counted. The decoder 407 decodes the count value of the counter 406, and outputs a pulse when the count value of the counter 406 becomes N ₁ (in this embodiment, N ₁ = 64 is set).

The count output from the counter 406 is supplied as a read address signal of the horizontal scanning unit of the memory 102 via the terminal 422.

The flip-flop circuit 408 is reset by the output from the decoder 407, and its output Q (i in FIG. 2) becomes the low level "L". This causes the AND gate 403 to close, thus temporarily stopping the counting of the counters 404 and 406.

The above operation is the read start pulse RS from the terminal 421.
Is repeated in the cycle. Therefore, the video signal sequentially read from the memory 102 by the read address signal output from the terminal 422, converted into an analog signal by the D / A conversion circuit 103, and output is as shown in FIG. Becomes That is, the head in the first vertical scanning period
In the first scanning period T of 4a, line numbers 1, 2, 3, ...
A continuous video signal is output in the order of 64, and the next head
In the scanning period T of 4b, continuous video signals are output in the order of line numbers 65, 66, ..., 128. Similarly, in the scanning period T of the next head 4a, line numbers 129, 130, ...
Further, in the next scanning period T of the head 4b, line numbers 193, 194,
…, 256 are sequentially output. The above-described output form is exactly the same in the next vertical scanning period, and is repeated in the feed cycle and output in the same form.

On the other hand, since the value of N ₁ is determined so as to satisfy the equation (4), no video signal is output (or is output) at the transition of scanning of each head as shown in k of FIG. However, it is possible to generate a redundant period τ during reproduction, which is not particularly necessary. This redundancy period τ is the horizontal scanning period T of the original video signal (a in FIG. 2).
_{Using H} and the above equations (3), (4) and (5), it is given by the following equation.

Here, m / k is the frequency dividing circuits 301 and 305 shown in FIG.
It corresponds to the ratio of the frequency division values (k, m). As is clear from this, the redundancy period τ can be generally increased. Specifically, in the above embodiment, Then, the redundancy period τ can be made larger than T _H.

In the present invention, the above-mentioned values of m and k can be set arbitrarily, and in particular, when m = k, the frequency (f ₁ ) of the write clock CP ₁ and the read clock CP _{2 are} immediately recognized. May have the same frequency (f ₂ ) and in this case, the read clock generation circuit 120 does not particularly need to supply the write clock CP ₁ from the circuit 110 directly to the circuit 121 and the circuit 103. This is the main purpose of the present invention.

From the circuit 408 of the read address control circuit 121 shown in FIG. 5, as shown by i in FIG. 2, it corresponds to the above redundancy period τ (specifically, it becomes “L” in the redundancy period τ, Output of "H") is obtained. The output from this circuit 408 is supplied to the bun-ranking signal generation circuit 130 shown in FIG. In the circuit 130, a predetermined blanking signal (for example, D /
A signal corresponding to a constant level such as a black level or a gray level of the video signal output from the A conversion circuit 103 (second
The signal S1) of FIG. J or a signal (S2 of FIG. 2j) in which an arbitrary signal such as synchronization information for indicating the location of the redundant period τ is added to the constant level is generated and output.
In the blanking signal insertion circuit 104, the D / A conversion circuit 10
Circuit 1 during the redundant period τ of the video signal output from 3
A blanking signal from 30 is inserted. Thus, the video signal (j in FIG. 2) output from the circuit 104 is supplied to the recording video processing circuit 30a via the output terminal 300, and after the circuit 30a appropriately performs the recording process, the output is the head. It is supplied to 4a and 4b and sequentially recorded on the tape 1.

The read address control circuit 121 shown in FIG.
In the above, the case where the count output of the counter 406 is also used as the read address signal in the horizontal scanning unit is shown. However, the present invention is not limited to this, and as shown by a broken line path in FIG. A counter 409 for counting output pulses from 405 is separately provided, and the counter 406 is provided.
Instead of the count output from the counter 409, the count output of the counter 409 is used as the read address signal of the horizontal scanning unit at the terminal 42
You may output to 2. In this case, in order to surely perform the operation of starting the reading of the field cycle of the memory 102 (specifically, as described above, the line number 1 of the line number 1 written in the first memory M ₁ of the memory 102 is In order to start reading from the video signal), the vertical synchronizing information VS from the circuit 140 is supplied to the reset pulse selection circuit 410 via the terminal 424, and the circuit 410 outputs the original video from the output pulse from the circuit 401. Pulses (pulses indicated by P ₁ , P ₂ , ... In FIG. 2f) included in the vertical blanking period τ _{B of the} signal are selectively separated and are output by the output pulse (k in FIG. 2) from the circuit 410. The counter 409 is reset. As described above, according to the latter method, it is possible to arbitrarily set the number of line memories that constitute the memory 102, and it is possible to reliably perform the series of writing and reading operations without excess or deficiency of lines. can get.

FIG. 3 shows a pattern diagram of tracks on the tape 1 obtained by the recording method of the present invention.

In FIG. 3, T _a1 , T _a2 , T _a3 , ... _Are the heads 4a.
_Shows tracks formed by scanning of T _b1 , T _b1 , T
_b2 , _Tb3 , ... _Denote tracks formed by scanning by the head 4b. Further, broken lines A and B in the figure indicate positions where the rising and falling phases of the head switching signal (d in FIG. 2) output from the pulse forming circuit 8 correspond on the tape 1. Further, the period τ shown by the shaded portion corresponds to the above-mentioned redundant period τ. The subscript for each track (1 to 25
6) indicates the line number of the recorded video signal described above.

In the present invention, the above-mentioned redundant period τ is provided by the time axis converter 100a shown in FIG. 1 so that the skew during reproduction caused by the segment recording can be completely eliminated. Further, as is apparent from the above description, the number of lines of the video signal output and recorded from the time axis converter 100a is insufficient (specifically, the number of lines from 1 to 256 is 256 lines per field). Although the video signal is recorded, the number of lines per field contained in the original video signal input from the terminal 200 is 262.5, which is insufficient by 6.5 lines. However, in the present invention, the above-mentioned recording caused by the above recording method. The shortage of the number of lines of the video signal is compensated within the period of vertical blanking τ _B included in the original video signal.

In the latter case, particularly at the time of recording, the position where the number of lines is missing (the position indicated by x ₁ , x ₂ , ... In FIG. ₂ ) is the original image by the disk servo circuit 9 in FIG. The rotational phases of the heads 4a and 4b are controlled so that they are positioned within the vertical blanking period τ _{B of the} signal (a in FIG. 2). By doing so, even if the number of lines is lost, the lines that are dropped are within the vertical blanking period of the original video signal, and are therefore displayed on the playback screen obtained by playing back them. There is no problem because the video information should not be lost.

Next, FIG. 6 shows an embodiment of a reproducing apparatus according to the present invention for reproducing the video signal recorded as described above to restore the original original video signal, and FIG. Shown in the figure.

In FIG. 6, since it can be shared with a part of the recording apparatus of FIG. 1, the common parts are denoted by the same reference numerals.
Since the operation of these common parts is the same as the above, the description thereof is omitted.

The video signal alternately reproduced from the tape 1 by the heads 4a and 4b is appropriately reproduced by the reproduction video processing circuit 30b, and the output (a in FIG. 7) is supplied to the time axis converter 100b. In the sync information output circuit 140 ', the vertical sync information VS' (c in FIG. 7) and the horizontal sync information HS '(d in FIG. 7) are separately output from the reproduced video signal from the time 30b. 'In, the circuit 140' a write clock generation circuit 110 'write clock CP ₂ in synchronism with the' horizontal sync information HS from is generated and outputted.

As a method of generating the write clock CP ₂ ′, a clock which is instantaneously phase-synchronized with the horizontal synchronizing information HS ′ such as a horizontal synchronizing signal or a burst signal included in the reproduced video signal and which is continuous for at least one horizontal scanning period. Is used. The write clock CP ₂ ′ is the read clock CP _{2 of} FIG.
Is generated to have the same frequency (f ₂ ) as. The circuit 11
By the write clock CP ₂ ′ from 0 ', the above circuit 30b
The reproduced video signal from is sequentially converted into a digital signal by the A / D conversion circuit 101. The write address control circuit 111 'is constituted by a counter, the circuit 140' are counted initiated by, the circuit 110 'a horizontal synchronizing information HS from counting the write clock CP _2' from, corresponding to the count value An address signal is output and supplied as a write address signal for the memory 102. This address signal is sequentially updated in the horizontal scanning cycle unit by the horizontal synchronizing information HS ', and therefore, the output from the circuit 101 is sequentially and cyclically written in the memory 102 in the horizontal scanning unit.

Here, as described in FIG. 1, the head 4a and the head 4a
4b corresponds to the transition of scanning, that is, the rising and falling phases of the head switching signal (b in FIG. 7) from the circuit 8, and the redundancy is provided at the positions shown by the broken lines A and B in FIG. Since the recording is performed so that the period τ is positioned, the position of the redundant period τ can be detected by the head switching signal. Therefore, in the circuit 30b, the video signals reproduced from the heads 4a and 4b are alternately switched by the head switching signal from the circuit 8 so that the video signals included in the scanning period T of the heads 4a and 4b can be made to have sufficient lines. Everything can be played reliably. Ie the head
In the first scanning period T of 4a, line numbers 1, 2, 3, ...
64 are reproduced in the order of line numbers 65, 66, ..., 128 in the scanning period T of the next head 4b, and in the order of line numbers 129, 130, ..., 192 in the scanning period T of the next head 4a. In the scanning period T of the next head 4b, line numbers 193, 194, ..., 256 are sequentially reproduced in sequence, and the above operation is repeated in the field cycle to produce a continuous video signal (a in FIG. 7). It is output from the circuit 30b.

On the other hand, in the circuit 111 ', a predetermined number (64 in this embodiment) of horizontal synchronization information HS' (d in FIG. 7) from the circuit 140 'is counted every scanning period T of the heads 4a, 4b, The output of the write address signal is temporarily stopped during the period after the end of counting until the next horizontal synchronization information HS 'is input, that is, the period corresponding to the redundant period τ.

Therefore, the signal is not written in the memory 102 during the redundancy period τ, and the memory 102 does not generate a blank portion where the signal is not written during the period τ, and the output from the circuit 101 is not generated. All lines (line numbers 1 to 256) are sequentially written into the memory 102 cyclically in horizontal scanning units without excess or deficiency of lines.

As a method of counting the horizontal synchronizing information HS 'in the circuit 111', as shown by a broken line in FIG. 6, a head switching signal is supplied from the circuit 8 to raise the head switching signal. The horizontal synchronization information H at each falling edge
It is also possible to start the counting of S'and count a predetermined number of horizontal synchronizing information HS 'inputted thereafter, but instead of using this head switching signal, the vertical synchronizing information VS from the circuit 140' is used. '(C in FIG. 7) is used to start the counting of the horizontal synchronizing information HS' by the vertical synchronizing information VS ', and thereafter, the horizontal synchronizing information HS' is sequentially repeated every predetermined number (64). You may do it.

According to the latter counting method, the position of the redundant period τ can be self-detected based on the vertical synchronization information VS ′ without using the head switching signal. Further, a predetermined number of the horizontal synchronizing information HS 'is counted by this counting method, a counting end pulse (e in FIG. 7) obtained by the end of the counting is obtained from the circuit 111', and this counting end pulse is delayed by the delay circuit. A predetermined time τ '(= τ / 2) is delayed at 141, and the head switching signal from the circuit 8 is delayed by the latch circuit 142 (f) in FIG. 7 to output the output (f in FIG. 7) from the circuit 141. If the downlink is synchronized, the circuit 142
As shown in g of the figure, a signal whose rising and falling phases are included in the redundancy period τ is obtained.

Therefore, the output from the circuit 142 is replaced by the circuit 30b instead of the head switching signal as shown by the broken line path in FIG.
Alternatively, the output from the heads 4a and 4b may be alternately switched by this signal, and all of them can be continuously reproduced and output without excess or deficiency of lines in the same manner as described above.

Next, 'read clock CP ₁ of the first diagram of the write clock CP ₁ and the same frequency at (f _1)' read clock generation circuit 120 is generated and outputted. In the reference signal generation circuit 131, the clock from the circuit 120 'is appropriately divided,
A blanking signal (including synchronization information) BLK having the same format and the same frequency as the original video signal (a in FIG. 2), horizontal synchronization information H, vertical synchronization information V (i in FIG. 7), and A reference signal REF (h in FIG. 7) at a timing that precedes the vertical synchronization information V by a predetermined time τ ₃ is generated and output. Read address control circuit 121 'is composed of a counter, initiated counted by the horizontal synchronization information H from the circuit 131, the circuit 120' are counted read clock CP ₁ 'from the address signal corresponding to the count value Is output and supplied as a read address signal of the memory 102. This address signal is sequentially updated at every horizontal scanning cycle by the horizontal synchronization information H, and the horizontal synchronization information H of the parentheses is updated by a predetermined number (in this embodiment, in this embodiment).
256) After counting, the output of the read address signal is temporarily stopped. Vertical synchronization information V from the circuit 131
The above-described series of counting operations is restarted, and the same operation is repeated thereafter.

Therefore, the video signal sequentially read from the memory 102 by the read address signal from the circuit 121 ', converted into an analog signal by the D / A conversion circuit 103, and output is the seventh signal.
As shown in j of the figure, all of them (that is, all line numbers 1 to 256 per field) are obtained in time continuous form without excess or deficiency of lines. The output from the D / A conversion circuit 103 (j in FIG. 7) is supplied to the blanking signal insertion circuit 105 by the blanking signal B from the circuit 131.
LK is inserted.

The reference signal REF from the circuit 131 is supplied to the disk servo circuit 9 as a servo reference signal at the time of reproduction, and the circuit 9 performs the same servo control as that described with reference to FIG. In order that both of the head switching signals from the circuit 8 are in phase synchronization with each other, more specifically, as shown in FIG. 7, the reference signal REF
The disk motor 6 is rotationally controlled so that the phase difference time between (h in FIG. 7) and the head switching signal (b in FIG. 7) becomes τ ₁ .

The capstan motor 20 is a capstan servo circuit.
The rotation of the capstan servo circuit 21 'is controlled by 21'. The capstan servo circuit 21 'is composed of a tracking control system for controlling the relative phase of the tape 1 and the heads 4a and 4b to reproduce the signal correctly. Known ones are used.

By the above servo control, the write operation to the memory 102 is controlled so as to precede the read operation by time. Therefore, the video signal written in the memory 102 is correctly read on a stable time axis with no fluctuations, and the blanking and synchronization information deleted during recording as described above are stored in the circuit 105. And the blanking signal BLK on the same stable time axis as the reading.

Therefore, the skew and time-axis fluctuation of the reproduced video signal (a in FIG. 7) are removed from the terminal 400, and a stable video signal that faithfully restores the original video signal is output.

As is clear from the above, the correctable amount of skew obtained by the present invention is equal to the redundancy period τ,
As shown in the equation (6), it is possible to secure a sufficient skew correction margin.

Since the redundant period τ is generated in synchronization with the rotation of the head, the redundant period τ is recorded at a fixed position on the tape as shown in FIG. It does not change.

Therefore, compatible playback becomes easy and reliable, and the performance of the device
The reliability can be significantly improved.

Further, in the embodiment of FIG. 1 described above, the delay time of the delay circuit 11 (τ ₂ shown in FIG. 2e) is appropriately changed for each scanning cycle T of the heads 4a and 4b. As shown in the track pattern diagram of FIG. 2, the relative recording pattern in units of horizontal scanning lines between the phosphorus contact track and the adjacent track can be easily changed, and the track is determined according to the relative speed of the tape 1 and the heads 4a, 4b. Without being restricted by the amount of horizontal scanning line misalignment at the end (a _H shown in FIG. 8), it is possible to obtain an arbitrary recording pattern and reduce interference due to crosstalk from adjacent and adjacent tracks. As a result, it is possible to obtain a secondary effect such as providing a device that can obtain excellent image quality.

Further, as apparent from the above, according to the recording method of the present invention, all the video signals to be recorded and reproduced are completely processed within the scanning period T of the head (within 180 ° on the track), Further, according to the present invention, the recording position on the tape during the redundant period τ can be easily detected, and the recording position can be determined from the reproduced video signal or the predetermined synchronization information (the first synchronization information recorded during the redundant period τ). It is necessary to record a video signal in the overlap areas Q ₁ and Q ₂ shown in FIG. 3, which is indispensable in the conventional analog recording method, because the self-detection can be surely performed based on S2) in FIG. 2j. In other words, the recording density of the tape can be increased by that amount, and a secondary effect that the recording time can be increased is also obtained. Furthermore, for tracking control of signals other than video signals (for example, PCM audio signals obtained by converting the pervallap regions Q ₁ and Q ₂ into conventionally known digital signals and time-axis compression, or pilot signals). It can be used as an auxiliary track for recording signals, etc., and also has the effect of enabling high-density recording of various signals. FIG. 9 shows an example of a track pattern according to the present invention when another signal is recorded in the overlap area Q. In FIG. 9, A indicates the recording area of the PCM audio signal, and P indicates the recording area.
Indicates a recording area of the tracking control signal, and V indicates a recording area of the video signal. The shaded area corresponds to the redundancy period τ.

In order to prevent the video signal from being recorded in the overlap area Q, the head switching signal from the circuit 8 is sent to the circuit 30a as shown by the broken line in FIG.
The video signal from the circuit 100a may be alternately switched by the head switching signal to be supplied to the heads 4a and 4b alternately, whereby the above object can be easily achieved.

In the embodiments of FIGS. 1 and 6 described above, the case of the current television system such as NTSC, PAL, SECAM or the like is shown as the video signal to be recorded, but the present invention is not limited to this, and the above-mentioned examples are provided. It can also be applied to a television system having a different number of scanning lines from the current system (for example, a high-definition television system having 1125 horizontal scanning lines). Also, as the synchronization information of the video signal, the case where the horizontal synchronization information (horizontal synchronization signal and burst signal) in the conventional horizontal scanning unit and the vertical synchronization information (vertical synchronization signal) in the vertical scanning unit are used is illustrated. The invention is not limited to this. For example, as shown in FIG. 10A, instead of the conventional sync signal, sync information (a negative horizontal sync signal HX and a positive burst signal BX) separately multiplexed on a part of the horizontal blanking T _B is used. ) Is also applicable, and as shown in a of the same figure, one set of horizontal synchronization information (horizontal synchronization information Y and chromaticity information C in one horizontal scanning period T _H (horizontal Sync signal H
X and burst signals BX) and time-division multiplexing, or as shown in FIG. 10b, one set of horizontal synchronization information (HX and HX) for a plurality of (for example, two) horizontal scans.
BX), or when only the burst signal BX is allocated without allocating the horizontal synchronizing signal HX as the horizontal synchronizing information as shown in FIG. 10C, or the vertical synchronizing information is not shown. Instead of allocating every field cycle as in the above embodiment, for example, when allocating every frame cycle, and further including only the vertical blanking period, especially when no vertical synchronization information is allocated, it can be applied. In any case, by applying the time axis conversion based on the horizontal synchronization information included in each of the video signals, the desired redundant period can be generated, and the object of the present invention can be achieved. Is.

Further, in the embodiment shown in FIG. 1, the write clock C
By P ₁ of the frequency (f ₁₎ and the frequency CP ₂ of the frequency (f ₂₎ of the read clock was different from each other and f ₁ <f ₂ (more specifically, in the above (5) m / k> 1), the redundancy period τ as described in the above equation (6).
However, according to the present invention, another effect other than this can be obtained. That is, f ₁
By setting <f ₂ , the horizontal scanning cycle T _H of the original video signal
On the other hand, the horizontal scanning period T _H ′ of the recording video signal whose time axis is converted by the circuit 100a becomes T _H ′ <T _H , which means that the time axis is compressed, and vice versa. The time axis is expanded by the time axis conversion device 100b. As described above, according to the present invention, it is possible to easily achieve time-axis compression and expansion of a video signal without increasing the circuit scale, and in particular, the above-mentioned document partially proposed as the high-definition television system. High-quality MUS described
With respect to the E system, the effect of facilitating the segment recording can be obtained by the time axis compression / expansion.

That is, as described in the above document, the high quality M
In the USE system, as shown in d of FIG. 10, a so-called positive horizontal sync signal HD having an amplitude that does not exceed the maximum amplitude of the video signal is used as horizontal sync information. A vertical sync signal FP having a positive polarity is also used as information, and when recording a video signal of such a signal format, the time axis converter 100a is used as shown in FIG. 10a in advance. Original video signal (10th
The horizontal synchronizing signal of negative polarity having a level exceeding the maximum amplitude of the video signal during the blanking period (the period of T _B shown in FIG. 10a) of the video obtained by compressing the time axis d) of the figure HX, or a burst signal BX of positive polarity together with this HX, or these synchronization information HX, B (not shown).
In addition to X, the negative polarity vertical synchronization information VX is further appropriately generated, inserted, and then recorded, and the reproduced video signal (a in FIG. 10) is reproduced by the device 100b at the time of reproduction. The original original video signal (d in FIG. 10) can be restored by expanding the original time axis and appropriately deleting the synchronization information HX, BX, VX. The above synchronization information H
When generating X, BX, and VX, for example, the output pulse from the decoder 405 in FIG. 5 is output at the timing corresponding to the blanking period T _B , so the output pulse from the decoder 405 is appropriately delayed. It is possible to generate the desired synchronization signal HX, and to appropriately divide the clock from the terminal 420 based on the synchronization signal HX to generate the desired burst signal BX having a predetermined frequency and a predetermined number of cycles. Furthermore, the output pulse from the circuit 410 (k in FIG. 2) is the vertical blanking period τ.
_Since it is located in _B , based on the output from the circuit 410,
(Or the vertical sync information V from the circuit 140 obtained by separating the positive sync signal FP included in the original video signal.
It is possible to generate the desired vertical synchronization information VX (based on S), and by supplying and inserting the synchronization information HX, BX, VX thus generated into the circuit 104, the desired recording video signal ( It is possible to obtain a) in FIG.

Even in the case where the high-definition television system has positive polarity sync information and therefore the separation is difficult during reproduction in the segment recording, the recording method of the present invention described above facilitates the sync separation. Then, the skew caused by the segment recording can be completely removed, and a stable video signal without time axis fluctuation can be correctly restored, so that the segment recording can be easily realized even in the high definition television system. .

In the above embodiments, the case where the present invention is applied to the single-channel two-head type helical scan type VTR and four segment recording is shown, but the present invention is not limited to this and should be used. The number of heads is 1 or more,
The number of segments to be recorded is two or more, and none of them deviates from the gist of the present invention.

〔The invention's effect〕

As described above, according to the present invention, it is possible to provide a magnetic recording / reproducing apparatus capable of completely eliminating skew and time-axis fluctuation, and performing good and stable segment recording and reproduction of a video signal. In addition, segment recording can be realized for a video signal having a positive polarity synchronizing signal, which has been partially proposed as a high-definition television system, and the recording density of the tape can be increased. Compared with the digital recording system of, it is possible to easily realize higher recording density and longer recording time. Together with improved compatibility, the cost, performance and reliability of the device can be greatly improved. The effect can be obtained.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a video signal recording apparatus according to the present invention, FIG. 2 is a waveform diagram of respective parts, FIG. 3 is a tape pattern diagram thereof, and FIG. 4 is a read clock according to the present invention. FIG. 5 is a block diagram showing an embodiment of a generation circuit, FIG. 5 is a block diagram showing an embodiment of a read address control circuit according to the present invention, and FIG. 6 is an embodiment of a video signal reproducing apparatus according to the present invention. FIG. 7 is a block diagram showing the waveforms of respective parts, FIGS. 8 and 9 are diagrams showing other tape patterns according to the present invention, and FIG. 10 are waveforms showing other video signal formats according to the present invention. It is a figure. (Description of symbols) 100a, 100b ... Time axis converter 101 ... A / D converter circuit 102 ... Memory 103 ... D / A converter circuit 104, 105 ... Blanking signal insertion circuit 110, 110 '... Write clock generation circuit 111, 111' ... Write address control Circuits 120, 120 '... Read clock generation circuit 121, 121' ... Read address control circuit

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Katsuo Mohri 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Inside the Home Appliance Research Laboratory, Hitachi, Ltd. (56) Reference JP-A-58-1807 (JP, A) JP JP-A-49-131107 (JP, A) JP-A-59-111484 (JP, A) JP-A-61-29283 (JP, A)

Claims (10)

[Claims] 1. A video signal containing luminance information Y and color information C and containing N horizontal scanning lines in a period T is divided into n sets (n is an integer of 2 or more) of segments in the period of T. In a recording method of a video signal divided into a plurality of parallel oblique tracks of a tape by a rotary head and recording, at least a part of the signal of the vertical blanking period is removed from the input video signal, and the rest Of the video signal of [N / n] (N
Divided into n sets of segment signals so as to include a time-division-multiplexed signal of the luminance information Y and the color information C in effective horizontal scanning line units within a maximum integer not exceeding / n). A signal block for recording the signals of the segments of each set to one parallel set of diagonal tracks of the tape is formed, and a redundant signal of an arbitrary period is provided between the signal blocks. A time axis conversion is performed for each of the signal blocks so as to generate a recorded video signal, and at least the recorded video signal is sequentially recorded on each of the signal tracks for each of the signal blocks together with the redundant signal. The video signal recording method is characterized in that the redundant signal is recorded at a predetermined position of the track for the entire period. 2. A video signal including luminance information Y and color information C and including N horizontal scanning lines at a period T is divided into n sets (n is an integer of 2 or more) of segments during the period T. , In a device having a structure in which a rotary head divides into a plurality of parallel diagonal tracks of a tape for recording, at least a part of the signal in the vertical blanking period is removed from the input video signal, and the rest Of the video signal of [N / n] (N
Divided into n sets of segment signals so as to include a time-division-multiplexed signal of the luminance information Y and the color information C in effective horizontal scanning line units within a maximum integer not exceeding / n). A signal block for recording the signals of the segments of each set to one parallel set of diagonal tracks of the tape is formed, and a redundant signal of an arbitrary period is provided between the signal blocks. A time axis conversion unit that performs time axis conversion for each signal block so as to generate a recorded video signal; and at least the recorded video signal for each signal block, together with the redundant signal, of the corresponding set of tracks. And a signal recording means for sequentially recording the redundant signal at a predetermined position of the track for the entire period thereof, and a video signal recording apparatus. 3. The time axis conversion means includes tack signal generation means for generating a tack signal synchronized with the rotation of the rotary head; and time axis conversion is started for each of the signal blocks in response to the tack signal. A video signal recording apparatus according to claim 2, comprising: means. 4. The time axis conversion means is arranged such that the recording position of each signal block between the tracks adjacent to the track on which the recording video signal is recorded is a unit of the horizontal scanning line when viewed in the direction perpendicular to the longitudinal direction of the track. Claim 2 configured to perform time axis conversion so that
Item 5. The video signal recording device according to Item 3 or Item 3. 5. The time axis conversion means is configured to include means for multiplexing additional information such as a signal of a predetermined potential, predetermined synchronization information, or a predetermined reference signal during the period of the redundant signal. The video signal recording device according to the second or third range. 6. The signal recording means forms a recording audio signal based on an audio signal input separately from the input video signal, and the recording audio signal is defined as an area in which the recording video signal is recorded. The video signal recording device according to claim 2 or 3, wherein the video signal recording device comprises audio signal recording means for occupying and recording on tracks in different areas. 7. The audio signal recording means forms a recording audio signal which is time-axis compressed in a PCM code format based on the input audio signal, and combines the recording audio signal and the signal block of the recording video signal. 7. The video signal recording device according to claim 6, wherein the recording audio signal is recorded at a timing at which at least a part of the redundant signal is located therebetween. 8. The signal recording means generates a predetermined tracking control signal for controlling the relative position between the rotary head and the track, and the tracking control signal is recorded in the recording video signal. The video signal recording apparatus according to claim 2 or 3, wherein the recording apparatus occupies a track in an area different from the area to be recorded. 9. A video signal including luminance information Y and color information C and including a number N of horizontal scanning lines at a period T is divided into n sets (n is an integer of 2 or more) of segments during the period T. , In a device equipped with a structure in which a rotary head divides into a plurality of parallel diagonal tracks of a tape for recording and reproduces it, at least a part of the signal in the vertical blanking period is input from the input video signal. The remaining video signal is removed and the remaining video signal is [N / n] (N
Divided into n sets of segment signals so as to include a time-division-multiplexed signal of the luminance information Y and the color information C in effective horizontal scanning line units within a maximum integer not exceeding / n). A signal block for recording the signal of the segment of each set to one parallel set of diagonal tracks of the tape is formed, and a redundant signal of an arbitrary period is provided between the signal blocks. Time axis conversion means for performing time axis conversion for each of the signal blocks so as to generate a recorded video signal; at least the recorded video signal for each of the signal blocks, together with the redundant signal, in the corresponding set of tracks. Signal recording means for sequentially recording and recording the redundant signal at a predetermined position of the track for the entire period thereof; and at least reproducing the recorded video signal recorded by the signal recording means. Signal reproduction means for switching the reproduction of the signal blocks within the period of the redundant signal between the signal blocks of the reproduced video signal from the signal reproduction means, and then performing time-axis conversion for each signal block. A video signal recording / reproducing apparatus, comprising: a video signal processing means for removing the redundant signal and restoring and outputting a signal of the same format as the input video signal. 10. A video signal including luminance information Y and color information C and including a number N of horizontal scanning lines at a period T is n during the period T.
In an apparatus having a structure in which the tape is divided into a plurality of groups (n is an integer of 2 or more) and divided into a plurality of parallel slant tracks of the tape by a rotary head and recorded, a vertical block of the video signal is input. At least a part of the signal in the ranking period is removed, and the remaining video signal is [N / n] (N
Divided into n sets of segment signals so as to include a time-division-multiplexed signal of the luminance information Y and the color information C in effective horizontal scanning line units within a maximum integer not exceeding / n). A signal block for recording the signals of the segments of each set to one parallel set of diagonal tracks of the tape is formed, and a redundant signal of an arbitrary period is provided between the signal blocks. A time axis conversion unit that performs time axis conversion for each signal block so as to generate a recorded video signal; and at least the recorded video signal for each signal block, together with the redundant signal, of the corresponding set of tracks. And a signal recording means for recording the redundant signal at a timing such that at least a part of the redundant signal is located in the overlap portion of the track. Signal of the recording device.