JPH0645538A - Semiconductor device and its manufacture - Google Patents

Abstract

PURPOSE:To monolithically form a plurality of semiconductor elements different in withstand characteristics on the same substrate. CONSTITUTION:A buried layer 3 is formed between a high withstand voltage element 16 for output and a substrate 1. A buried layer 4 is formed between a low withstand voltage element 15 for control and the substrate 1. The buried layers are formed by using materials different in the diffusion coefficient. The buried layer 4 formed by using material whose diffusion coefficient is thick, and the buried layer 3 is thin. Thereby the interval between the buried 4 and the low withstand voltage lement 15 for control becomes larger than the other, and the collector resistance can be reduced. Since the buried 3 is formed so as to be thinner than the buried layer 4, the distance between the high withstand voltage element 16 for output and the buried layer 3 can be made large, and high withstand voltage can be ensured.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device using buried diffusion and its manufacturing method.

[0002]

2. Description of the Related Art Conventionally, when a monolithic IC is manufactured, a collector resistance of a transistor is reduced or generated in a resistance portion. For example, a base layer 8 / epitaxial layer 2 /
In order to reduce the influence of parasitic elements on the substrate 1, the buried layer 3 is inserted between the epitaxial layer 2 and the substrate 1.

Further, the output high breakdown voltage element 16 is made thicker by lowering the impurity concentration of the epitaxial layer 2 in order to increase the breakdown voltage, and the diffusion distances of the separation layer 6, the collector 10, the base 8 and the emitter 7 are sufficient. To increase the device area.

On the other hand, the control element 15 does not require a higher breakdown voltage than the output element, so the diffusion distance is made as small as possible for the purpose of reducing the chip size.

[0005]

However, since the output element is required to have a high breakdown voltage, the impurity concentration of the epitaxial layer is low and the thickness is large, so that the collector resistance of the control element becomes large. However, there is a problem that it becomes difficult to design because it becomes a constraint when designing a circuit.

The present invention has been made in view of such a situation, and by using various kinds of buried layers having the same conductivity type as that for diffusing impurities such as antimony and phosphorus and having different diffusion coefficients, An element having different collector resistance and ON resistance is configured.

[0007]

In order to solve such a problem, the first invention is that at least two kinds of semiconductor elements are monolithically formed on the same substrate, and each semiconductor element has a different breakdown voltage. In the semiconductor device described above, an embedded layer is provided between each semiconductor element and the substrate, and the thickness of the embedded layer corresponding to the semiconductor element having the higher breakdown voltage is smaller than that of the other.

According to a second aspect of the present invention, at least two types of semiconductor elements are monolithically formed on the same substrate, and a buried layer is provided below the semiconductor elements to make the breakdown voltage of each semiconductor element different. In the method of manufacturing the device,
It is characterized in that each buried layer is formed by diffusion using materials having different diffusion coefficients.

[0009]

Since the buried layers 3 and 4 are formed between the substrate 1 and the high breakdown voltage element 16 for output and the low breakdown voltage element 15 for control, and the buried layers are made of materials having different diffusion coefficients, diffusion is performed. The buried layer 4 formed of a material having a large coefficient becomes thicker and the other becomes thinner. As a result, the distance between the buried layer 4 and the control low breakdown voltage element 15 becomes thicker than the other, and the collector resistance can be reduced. Since the buried layer 3 is formed thinner than the buried layer 4, the distance between the output high breakdown voltage element 16 and the buried layer 3 can be made large, and a high breakdown voltage can be secured.

[0010]

1 is a sectional view showing an embodiment of the present invention, in which an output high breakdown voltage element 16 is arranged on the left side and a control low breakdown voltage element 15 is arranged on the right side. The output high breakdown voltage element 16 is below the planar semiconductor composed of the P type base diffusion layer 8 and the N + emitter diffusion layer 7 and is buried between the N type epitaxial layer 2 and the P type substrate 1. Is provided. In addition, the collector wall 10 is the epitaxial layer 2
From the surface to the buried layer 3.

On the other hand, the control low breakdown voltage element 15 is below the planar semiconductor composed of the P type base diffusion layer 8, the N + emitter diffusion layer 7 and the N + collector diffusion layer 9 and is the N type epitaxial layer 2. A buried layer 4 is provided between the P type substrate 1 and the buried layer 4.

The buried layer 3 of the output high breakdown voltage element 16 is diffused by using an impurity having a small diffusion constant such as antimony at the time of formation thereof to reduce the rise to the epitaxial layer 2 so that the buried layer 3 is removed from the base layer. Epitaxial layer 2 up to 8
The long distance is secured to realize a high breakdown voltage element.

The buried layer 4 of the control low breakdown voltage element 15 is diffused by using an impurity having a large diffusion constant such as phosphorus at the time of its formation to increase the swelling to the epitaxial layer 2 so that the buried layer 4 becomes a base layer. The collector resistance is reduced by shortening the length of the epitaxial layer 2 up to 8.

FIG. 2 is a sectional view showing a manufacturing process for manufacturing such a device. First, as shown in FIG. 2A, an oxide film 5a is formed on the surface of the P-type substrate 1, a window 5b is opened in the oxide film 5a, and diffusion is performed using antimony having a small diffusion constant by using the window 5b as a mask. . By this treatment, antimony diffuses and permeates through the window 5b into the substrate 1 to form the N + buried layer 3 over a slightly larger area than the window 5b.

Next, the oxide film 5a is removed to form an oxide film 5c as shown in FIG. 2B, and the window 5d is formed in the oxide film 5c.
Then, diffusion is performed using phosphorus having a large diffusion constant as a mask. By this treatment, phosphorus diffuses and permeates through the window 5d into the substrate 1 to form an N + buried layer 4 having the same conductivity type as the buried layer 3 over a slightly larger area than the window 5d. At this time, since phosphorus has a larger diffusion coefficient than antimony, the embedded layer 4 penetrates deeper into the substrate 1 than the embedded layer 3, and the embedded layer 4 becomes thicker than the embedded layer 3.

Then, the oxide film 5c is removed, and after that, as shown in FIG.
The N-type epitaxial layer 2 is formed as shown in (c). If heat treatment is performed at this time, antimony and phosphorus that have previously diffused into the substrate 1 are diffused again into the epitaxial layer 2, and the buried layers 3 and 4 permeate into the epitaxial layer 2 and rise up.

Next, as shown in FIG. 2D, an oxide film 5e is formed on the surface of the epitaxial layer 2, and the oxide film 5e is formed.
A window is provided at a predetermined position of e, and the oxide film 5e is used as a mask.
The P + isolation diffusion layer 6 is formed from the surface of the N type epitaxial layer 2 to the P type substrate 1. Similarly, the N + collector wall diffusion layer 10 is formed from the surface of the N type epitaxial layer 2 to the P type substrate 1.

Then, as shown in FIG. 2E, a base diffusion layer 8 and an emitter diffusion layer 7 are formed, and then respective electrodes are formed to complete the semiconductor having the structure shown in FIG.

[0019]

As described above, according to the present invention, when a plurality of embedding layers are formed below a monolithically formed semiconductor element, diffusion is performed using materials having different diffusion coefficients. The layers can have different thicknesses due to the difference in diffusion coefficient, and the distance from the buried layer to the planar semiconductor can be arbitrarily formed. This has the effect that the characteristics of each semiconductor can be controlled independently and each semiconductor can obtain the desired characteristics.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a configuration of a semiconductor device formed by applying the present invention.

FIG. 2 is a diagram showing a process of manufacturing the semiconductor device of FIG.

FIG. 3 is a diagram showing an example of a conventional semiconductor device.

[Explanation of symbols]

 1 Substrate 2 Epitaxial Layer 3, 4 Buried Layer 5 Oxide Film 6 Separation Layer 7 Emitter 8 Base Layer 9 Collector Diffusion Layer 10 Collector 15 Control Low Voltage Element 16 Output High Voltage Element

Claims (2)

[Claims] 1. In a semiconductor device in which at least two kinds of semiconductor elements are monolithically formed on the same substrate and the breakdown voltage of each semiconductor element is different, an embedded layer is provided between each semiconductor element and the substrate. A semiconductor device provided, wherein a thickness of an embedded layer corresponding to a semiconductor element having a higher breakdown voltage is smaller than that of the other semiconductor element. 2. A method of manufacturing a semiconductor device, wherein at least two kinds of semiconductor elements are monolithically formed on the same substrate, and an embedded layer is provided below the semiconductor elements to make the breakdown voltage of each semiconductor element different. 2. The method for manufacturing a semiconductor device according to, wherein each buried layer is formed by diffusion of materials having different diffusion coefficients.