JPH0637438A - Hybrid integrated circuit - Google Patents
Hybrid integrated circuitInfo
- Publication number
- JPH0637438A JPH0637438A JP18951192A JP18951192A JPH0637438A JP H0637438 A JPH0637438 A JP H0637438A JP 18951192 A JP18951192 A JP 18951192A JP 18951192 A JP18951192 A JP 18951192A JP H0637438 A JPH0637438 A JP H0637438A
- Authority
- JP
- Japan
- Prior art keywords
- solder
- integrated circuit
- hybrid integrated
- chip
- conductive path
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は混成集積回路に関し、特
に厳しい温度サイクル条件が要求される混成集積回路に
関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid integrated circuit, and more particularly to a hybrid integrated circuit which requires severe temperature cycle conditions.
【０００２】[0002]
【従来の技術】従来の混成集積回路を図２に示す。混成
集積回路基板（２１）は表面をアルマイト処理したアル
ミニウム基板を用い、基板（２１）上に絶縁樹脂層を介
して所望形状の導電路（２２）が形成されている。かか
る導電路（２２）上あるいは導電路（２２）間に半導体
チップ、チップコンデンサー及び印刷抵抗体等の回路素
子（２３）が搭載され、導電路（２２）を介して相互接
続されている。2. Description of the Related Art A conventional hybrid integrated circuit is shown in FIG. The hybrid integrated circuit substrate (21) is an aluminum substrate whose surface is anodized, and a conductive path (22) having a desired shape is formed on the substrate (21) via an insulating resin layer. Circuit elements (23) such as semiconductor chips, chip capacitors and printed resistors are mounted on or between the conductive paths (22) and are interconnected via the conductive paths (22).
【０００３】[0003]
【発明が解決しようとする課題】かかる構造の混成集積
回路上に搭載されるチップ抵抗、チップコンデンサー等
のチップ部品は一般に半田で接続されているため以下の
問題がある。アルミニウム基板をベース基板とした基板
の熱膨張係数αが２３×１０-6／℃であり、上記したチ
ップ部品、例えばチップ抵抗の熱膨張係数αが７×１０
-6／℃、チップコンデンサーの熱膨張係数αが１０×１
０-6／℃であるため両者の膨張係数αが著しく異なるた
めに温度サイクルによってチップ部品と導電路を接続す
る半田固着部分に温度サイクルによるストレスが加わ
り、半田固着部分にクラックが発生し接続不良となる問
題がある。The chip parts such as chip resistors and chip capacitors mounted on the hybrid integrated circuit having such a structure are generally connected by soldering, which causes the following problems. The thermal expansion coefficient α of the substrate using the aluminum substrate as the base substrate is 23 × 10 −6 / ° C., and the thermal expansion coefficient α of the above-mentioned chip component, for example, the chip resistor is 7 × 10 6.
-6 / ℃, the thermal expansion coefficient α of the chip capacitor is 10 × 1
0 -6 / order ℃ a is for expansion coefficients of both α differs significantly solder anchoring portion for connecting the chip component and the conductive path by temperature cycling stress is applied due to the temperature cycle, cracks occur in the solder-fixed portions poor connection There is a problem that becomes.
【０００４】次にクラックが発生するメカニズムについ
て説明する。上記したようにアルミニウム基板の膨張係
数αが２３×１０-6／℃、チップ部品の膨張係数αが７
〜１０×１０-6／℃であり、チップ部品を接合する半田
の膨張係数αが約２３×１０ -6／℃であるため、室温状
態では図３Ａの如く、基板、半田、チップ部品に応力が
加わらない。しかし、高温状態では図３Ｂの如く、基板
と半田のαがチップ部品より大きいため矢印方向に引張
られ、その結果、接合半田は矢印の方向にのみすそが広
がるように変形する。又、低温状態では図３Ｃに示す如
く、反対の矢印方向に圧縮力が加えられその結果、接合
半田は矢印方向にのみすそが広がる。Next, the mechanism by which cracks occur
Explain. As described above, the expansion coefficient of the aluminum substrate
The number α is 23 × 10-6/ ° C, expansion coefficient α of chip parts is 7
~ 10 x 10-6/ ° C, solder for joining chip components
Expansion coefficient α is about 23 × 10 -6/ ° C, so room temperature
In the state, as shown in FIG. 3A, stress is applied to the substrate, solder, and chip parts.
Do not join. However, in the high temperature state, as shown in FIG.
And α of solder is larger than the chip part, so pull in the direction of the arrow
As a result, the joint solder has a wide skirt only in the direction of the arrow.
It transforms so that it rises. In the low temperature state, as shown in FIG. 3C.
And the compressive force is applied in the opposite arrow direction, resulting in the joining
The bottom of the solder spreads only in the direction of the arrow.
【０００５】例えば、−５０〜＋１５０℃の条件の厳し
い温度サイクル条件で数十〜数百サイクルくり返すこと
により、上述したようにαの著しく異なるチップ部品と
半田の接合面にクラックが発生する。何故なら、温度サ
イクルにより微結晶状態にある半田成分のスズと鉛成分
が分離し凝集して半田内に連続的な鉛層を形成するため
機械的強度を低下させるからである。For example, by repeating several tens to several hundreds of cycles under a severe temperature cycle condition of −50 to + 150 ° C., cracks occur on the joint surface between the chip component and the solder having a significantly different α as described above. This is because the tin and lead components of the microcrystalline solder component are separated and agglomerated by the temperature cycle to form a continuous lead layer in the solder, thereby lowering the mechanical strength.
【０００６】この発明は、上述した課題に鑑みて為され
たものであり、この発明の目的は、混成集積回路基板上
に搭載した回路素子の半田接合部における温度サイクル
による半田接合部へのクラック発生を防止し信頼性の優
れた混成集積回路を提供する事である。The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to crack a solder joint portion of a circuit element mounted on a hybrid integrated circuit board due to a temperature cycle at the solder joint portion. The object of the present invention is to provide a hybrid integrated circuit which prevents the occurrence and has excellent reliability.
【０００７】[0007]
【課題を解決するための手段】上述した課題を解決し、
目的を達成するため、この発明に係わる混成集積回路
は、絶縁金属基板上に所望形状の導電路が形成され、そ
の導電路の所望位置に設けられた固着パッド上にチップ
コンデンサあるいは／およびチップ抵抗が半田層を介し
て接続された混成集積回路の半田層を液相線温度が異な
る少なくとも２種類以上の半田材料で構成する。具体的
には、液相線温度が約１２５℃〜２３６℃の第１の半田
材料と液相線温度が約１８３℃〜３００℃であって、そ
の平均粒径が約４０μｍ以上の第２の半田材料が混合さ
れていることを特徴とする。[Means for Solving the Problems]
In order to achieve the object, a hybrid integrated circuit according to the present invention has a conductive path of a desired shape formed on an insulating metal substrate, and a chip capacitor or / and a chip resistor on a fixed pad provided at a desired position of the conductive path. The solder layer of the hybrid integrated circuit connected via the solder layer is composed of at least two kinds of solder materials having different liquidus temperatures. Specifically, the first solder material having a liquidus temperature of about 125 ° C. to 236 ° C. and the second solder material having a liquidus temperature of about 183 ° C. to 300 ° C. and an average particle diameter of about 40 μm or more. It is characterized in that the solder material is mixed.
【０００８】[0008]
【作用】このように本発明に依れば、半田層を液相線温
度が異なる２種類の半田材料で構成することにより、一
方の半田材料は溶融され、回路素子と導電路との接続を
行い他方の半田材料は溶融されずそのまま粒径状で残在
するために半田層自体のスタンドオフ値を十分に得るこ
とができる。従って、厳しい温度サイクル条件下におい
ても熱膨張係数αの著しい差による応力が回路素子の半
田接合部に加わったとしても、半田層のスタンドオフ値
が十分にあるために、半田層自体でその応力を吸収し緩
和するために温度サイクルによる半田接合部の応力破壊
を防止することができる。As described above, according to the present invention, by forming the solder layer with two kinds of solder materials having different liquidus temperatures, one of the solder materials is melted and the circuit element and the conductive path are connected. On the other hand, the other solder material is not melted and remains in the particle size as it is, so that the standoff value of the solder layer itself can be sufficiently obtained. Therefore, even if stress due to a significant difference in the coefficient of thermal expansion α is applied to the solder joints of the circuit element even under severe temperature cycling conditions, the solder layer itself has a sufficient standoff value, so In order to absorb and alleviate the stress, it is possible to prevent stress destruction of the solder joint portion due to the temperature cycle.
【０００９】[0009]
【実施例】以下に図１に示した実施例に基づいて本発明
の混成集積回路を説明する。図１は本発明の混成集積回
路を示す断面図であり、（１）は基板、（２）は絶縁樹
脂層、（３）は導電路、（６）は回路素子である。基板
（１）はアルミニウム基板が用いられ、そのアルミニウ
ム基板表面には酸化アルミニウム膜が陽極酸化法により
形成されている。基板（１）の一主面上にはエポキシ樹
脂あるいはポリイミド樹脂等の絶縁樹脂層（２）と銅箔
とが一体化されたクラッド材が貼着され、銅箔をエッチ
ングして所望形状の導電路（３）が形成される。導電路
（３）が延在されるその先端部には回路素子を固着する
ための固着パッド（３Ａ）が形成される。その固着パッ
ド（３Ａ）上には半田層（７）を介して回路素子（６）
が接続される。回路素子（６）として、チップコンデン
サー、チップ抵抗等の表面実装型のチップ部品が用いら
れる。DESCRIPTION OF THE PREFERRED EMBODIMENTS A hybrid integrated circuit of the present invention will be described below based on the embodiment shown in FIG. FIG. 1 is a sectional view showing a hybrid integrated circuit of the present invention, in which (1) is a substrate, (2) is an insulating resin layer, (3) is a conductive path, and (6) is a circuit element. An aluminum substrate is used as the substrate (1), and an aluminum oxide film is formed on the surface of the aluminum substrate by an anodic oxidation method. A clad material in which an insulating resin layer (2) such as an epoxy resin or a polyimide resin and a copper foil are integrated is attached on one main surface of the substrate (1), and the copper foil is etched to have a desired conductive shape. A path (3) is formed. A fixing pad (3A) for fixing a circuit element is formed at the tip portion of the extending conductive path (3). A circuit element (6) is provided on the fixing pad (3A) through a solder layer (7).
Are connected. As the circuit element (6), a surface mount type chip component such as a chip capacitor or a chip resistor is used.
【００１０】ところで、チップコンデンサー、チップ抵
抗等のチップ部品（６）が基板（１）上に半田付けされ
た場合、温度サイクルによる半田接合部に発生する熱応
力によるせん断歪みの大きさは、次のように示される。
せん断歪みの大きさをΔＷとすると、By the way, when a chip component (6) such as a chip capacitor and a chip resistor is soldered on a substrate (1), the magnitude of shear strain due to thermal stress generated in a solder joint portion due to temperature cycle is as follows. As shown.
If the magnitude of shear strain is ΔW,
【００１１】[0011]
【数１】 [Equation 1]
【００１２】となる。従来の如く、チップ部品（６）が
直接固着パッド上に半田付けされた場合には、半田層の
スタンドオフ値は半田ぬれ及び部品の自重により沈むた
め５〜２０μｍ程度と非常に小さい値しか確保すること
ができない。従って、チップ部品が大型化になるに伴
い、大きなせん断歪みが半田接合部に発生し、接続信頼
性が著しく低下するものである。[0012] When the chip component (6) is directly soldered onto the fixed pad as in the conventional case, the stand-off value of the solder layer is as small as about 5 to 20 μm because it sinks due to the wetting of the component and the weight of the component. Can not do it. Therefore, as the chip component becomes larger, a large shear strain is generated in the solder joint portion, and the connection reliability is significantly reduced.
【００１３】本発明は、半田層（７）を液相線温度が異
なる２種類以上の半田材料で構成し、半田層（７）のス
タンドオフ値を十分に厚く形成し、上述した半田接合部
に発生するせん断歪みを抑制させることを特徴としてい
る。半田層（７）を構成する材料は、液相線温度が約１
２５℃〜２３６℃の第１の半田（７Ａ）と液相線温度が
約１８３℃〜３００℃であって、その平均粒径が約４０
μｍ以上の第２の半田（７Ｂ）とから構成される。具体
的には、第１の半田（７Ａ）の成分をＳｎ６０ｗｔ％−
Ｐｂ４０ｗｔ％（液相線１８８℃）とし、第２の半田
（７Ｂ）の成分をＳｎ５ｗｔ％−Ｐｂ９５ｗｔ％（液相
線３１５℃）で平均粒径が約５０μｍのものが用いられ
る。According to the present invention, the solder layer (7) is composed of two or more kinds of solder materials having different liquidus temperatures, and the standoff value of the solder layer (7) is formed to be sufficiently thick, and the above-mentioned solder joint portion is formed. It is characterized by suppressing the shear strain that occurs in the. The material forming the solder layer (7) has a liquidus temperature of about 1
The first solder (7A) at 25 ° C to 236 ° C and the liquidus temperature are about 183 ° C to 300 ° C, and the average particle size is about 40.
It is composed of a second solder (7B) having a thickness of at least μm. Specifically, the composition of the first solder (7A) is Sn60wt%-
It is assumed that Pb is 40 wt% (liquidus line 188 ° C.), the second solder (7B) component is Sn 5 wt% -Pb 95 wt% (liquidus line 315 ° C.), and the average particle diameter is about 50 μm.
【００１４】第１の半田（７Ａ）と第２の半田（７Ｂ）
は所定の重量比でクリーム状に混合され、第１の半田
（７Ａ）中に３〜１０％重量比の割合で第２の半田（７
Ｂ）が混合される。このように第１の半田（７Ａ）と第
２の半田（７Ｂ）とが混合されたクリーム状の半田はス
クリーン印刷あるいはディスペンサによってチップ部品
（６）が固着される固着パッド（３Ａ）上に印刷・塗布
される。そして、半田を溶融させることで固着パッド
（３Ａ）上にチップ部品（６）を半田固着することがで
きる。First solder (7A) and second solder (7B)
Are mixed in a cream form at a predetermined weight ratio, and the second solder (7A) is mixed with the second solder (7A) at a ratio of 3 to 10% by weight.
B) are mixed. In this way, the creamy solder in which the first solder (7A) and the second solder (7B) are mixed is printed on the fixing pad (3A) to which the chip component (6) is fixed by screen printing or dispenser.・ Applied. Then, by melting the solder, the chip component (6) can be soldered and fixed onto the fixing pad (3A).
【００１５】この際、半田（７）中には、上述したよう
に液相線温度が異なる第１および第２の半田（７Ａ）
（７Ｂ）が混合されているために、第１の半田（７Ａ）
は溶融し固着パッド（３Ａ）とチップ部品（６）との接
続を行い、第２の半田（７Ｂ）は半田層中の底面に沈ん
で残在し、半田層のスタンドオフ値を保つ。この様に本
発明に依れば、半田層（７）を液相線温度が異なる第
１、第２の半田で構成することにより、半田層（７）の
スタンドオフ値を厚くすることができるために、厳しい
温度サイクルによる基板とチップ部品とのαの著しい差
による応力が生じたとしても、その応力は半田層（７）
自体で吸収される。その結果直接チップ部品の半田接合
部に加わらないため、半田接合部の半田成分の微結晶状
態が保持され従来の如き、半田接合部のクラックの発生
を防止することができる。At this time, in the solder (7), as described above, the first and second solders (7A) having different liquidus temperatures are used.
First solder (7A) because (7B) is mixed
Melts and connects the fixing pad (3A) and the chip component (6), and the second solder (7B) sinks and remains on the bottom surface of the solder layer, maintaining the standoff value of the solder layer. As described above, according to the present invention, by forming the solder layer (7) with the first and second solders having different liquidus temperatures, the standoff value of the solder layer (7) can be increased. Therefore, even if stress occurs due to a significant difference in α between the substrate and the chip component due to a severe temperature cycle, the stress is generated by the solder layer (7).
It is absorbed by itself. As a result, since the solder component is not directly applied to the solder joint, the microcrystalline state of the solder component of the solder joint is maintained, and cracking of the solder joint can be prevented as in the conventional case.
【００１６】本実施例ではチップコンデンサー、チップ
抵抗等のチップ部品を用いて説明したが、樹脂モールド
等されたディクリート部品よりなる半導体素子を同様に
搭載部材を介して接続しても上述した同様の作用効果を
期待することができる。In this embodiment, chip components such as a chip capacitor and a chip resistor are used for explanation. However, even if semiconductor elements made of resin-molded discrete components are similarly connected through a mounting member, the same effect as described above is obtained. The effect of can be expected.
【００１７】[0017]
【発明の効果】以上に詳述した如く、本発明に依れば、
半田層を液相線温度が異なる第１、第２の半田で構成
し、第２の半田の平均粒径を約５０μｍとすることによ
り、第２の半田が溶融されずそのまま残在し、半田層の
スタンドオフ値を十分厚くすることにより、厳しい条件
下の温度サイクルにおいて基板と回路素子の膨張係数α
の差による応力が生じたとしても、その応力は半田層自
体によって吸収されるため回路素子の半田接合部に応力
が加わらず従来の如き、温度サイクルによる半田接合部
の応力破壊を防止することができる。その結果、極めて
高信頼性の優れた混成集積回路を提供することができ
る。As described in detail above, according to the present invention,
By configuring the solder layer with the first and second solders having different liquidus temperatures and setting the average particle diameter of the second solder to about 50 μm, the second solder remains unmelted and remains as it is. By making the standoff value of the layer sufficiently thick, the expansion coefficient α of the substrate and circuit element under temperature cycling under severe conditions
Even if a stress is generated due to the difference between the two, the stress is absorbed by the solder layer itself, so that the stress is not applied to the solder joint of the circuit element, and it is possible to prevent the stress destruction of the solder joint due to the temperature cycle as in the past. it can. As a result, it is possible to provide a hybrid integrated circuit having extremely high reliability.
【図面の簡単な説明】[Brief description of drawings]
【図１】図１は本発明の混成集積回路を示す要部断面図
である。FIG. 1 is a cross-sectional view of essential parts showing a hybrid integrated circuit of the present invention.
【図２】図２は従来の混成集積回路を示す断面図であ
る。FIG. 2 is a cross-sectional view showing a conventional hybrid integrated circuit.
【図３】図３は従来の半田接合部における応力を説明す
る図である。FIG. 3 is a diagram illustrating stress in a conventional solder joint.
（１） 混成集積回路基板 （２） 絶縁樹脂層 （３） 導電路 （３Ａ） 固着パッド （４） 金属層 （５） 導体 （６） 回路素子 （７） 半田層 （７Ａ） 第１の半田 （７Ｂ） 第２の半田 (1) Hybrid integrated circuit board (2) Insulating resin layer (3) Conductive path (3A) Fixing pad (4) Metal layer (5) Conductor (6) Circuit element (7) Solder layer (7A) First solder ( 7B) Second solder
Claims (2)
その導電路の所望位置に設けられた固着パッド上にチッ
プコンデンサあるいは／およびチップ抵抗が半田層を介
して接続された混成集積回路において、 前記半田層を液相線温度が異なる少なくとも２種類以上
の半田材料で構成したことを特徴とする混成集積回路。1. A conductive path having a desired shape is formed on a substrate,
In a hybrid integrated circuit in which a chip capacitor and / or a chip resistor is connected via a solder layer to a fixed pad provided at a desired position of the conductive path, the solder layer is composed of at least two kinds of liquidus temperatures different from each other. A hybrid integrated circuit comprising a solder material.
成され、その導電路の所望位置に設けられた固着パッド
上にチップコンデンサあるいは／およびチップ抵抗が半
田層を介して接続された混成集積回路において、 前記半田層は、液相線温度が約１２５℃〜２３６℃の第
１の半田材料と液相線温度が約１８３℃〜３００℃であ
って、その平均粒径が約４０μｍ以上の第２の半田材料
が混合されていることを特徴とする混成集積回路。2. A hybrid structure in which a conductive path having a desired shape is formed on an insulating metal substrate, and a chip capacitor and / or a chip resistor is connected via a solder layer on a fixed pad provided at a desired position of the conductive path. In the integrated circuit, the solder layer has a first solder material having a liquidus temperature of about 125 ° C. to 236 ° C., a liquidus temperature of about 183 ° C. to 300 ° C., and an average particle diameter of about 40 μm or more. 2. A hybrid integrated circuit in which the second solder material of 1) is mixed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18951192A JPH0637438A (en) | 1992-07-16 | 1992-07-16 | Hybrid integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18951192A JPH0637438A (en) | 1992-07-16 | 1992-07-16 | Hybrid integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0637438A true JPH0637438A (en) | 1994-02-10 |
Family
ID=16242499
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18951192A Pending JPH0637438A (en) | 1992-07-16 | 1992-07-16 | Hybrid integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0637438A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100318317B1 (en) * | 1999-04-02 | 2001-12-22 | 김영환 | Bare Chip Mounting Printed Circuit Board |
| JP2005129899A (en) * | 2003-08-28 | 2005-05-19 | Kyocera Corp | Wiring board and semiconductor device |
| DE112008000743T5 (en) | 2007-03-22 | 2010-01-14 | Toyota Jidosha Kabushiki Kaisha, Toyota-shi | Power module and inverter for vehicles |
| DE112008001037T5 (en) | 2007-06-21 | 2010-04-01 | Toyota Jidosha Kabushiki Kaisha, Toyota-shi | Film forming process, heat conducting element, power module, vehicle inverter and vehicle |
-
1992
- 1992-07-16 JP JP18951192A patent/JPH0637438A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100318317B1 (en) * | 1999-04-02 | 2001-12-22 | 김영환 | Bare Chip Mounting Printed Circuit Board |
| JP2005129899A (en) * | 2003-08-28 | 2005-05-19 | Kyocera Corp | Wiring board and semiconductor device |
| DE112008000743T5 (en) | 2007-03-22 | 2010-01-14 | Toyota Jidosha Kabushiki Kaisha, Toyota-shi | Power module and inverter for vehicles |
| DE112008001037T5 (en) | 2007-06-21 | 2010-04-01 | Toyota Jidosha Kabushiki Kaisha, Toyota-shi | Film forming process, heat conducting element, power module, vehicle inverter and vehicle |
| DE112008001037B4 (en) | 2007-06-21 | 2018-02-22 | Toyota Jidosha Kabushiki Kaisha | Method for forming a metallic coating, heat-conducting element and its use as a power module |
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