JPH11168171A - Hybrid integrated circuit device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To shorten the distance between a part junctioning part and a wire bonding part with bonding junction property which is kept properly and the compact configuration of an overall device is achieved. SOLUTION: On an alumina substrate 1, a conductor 3 comprising, e.g., Cu conductor material is formed in the specified pattern. A large number of lands 3a, 3b and 3c for mounting parts are formed on the conductor 3. On the land 3c, an electronic component (a part other than a flip chip) 6 such as, e.g. a chip capacitor is bonded by conducting adhesive 5 having electrical conductivity and superior thermal conductivity. On the land 3b, a flip chip 8 is bonded by solder 7. The land 3c and a power element P are connected electrically by an aluminum wire 9. In this case, the amount of flux, which becomes the case of the contamination of the bonding land 3c is decreased, and troubles such as the deterioration of the bonding junction property can be suppressed. Furthermore, the cleaning work of the solder flux can be reduced by the adhesive junction of the electronic component 6.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a hybrid integrated circuit device and a method for manufacturing the same.

[0002]

2. Description of the Related Art In a conventional hybrid integrated circuit device, a thick film substrate and an electronic component are joined mainly by soldering.
That is, the solder paste containing the flux is printed on the soldering land on the thick film substrate, and the flip chip I is printed.
Assemble electronic components such as C. And about 2 on a hot plate
A solder reflow at 35 ° C. is performed, and then the flux is washed with an alternative Freon or an aqueous cleaning agent. here,
When solder paste is printed, solder balls are generated, and if the solder balls adhere to the substrate, a short circuit between the bump electrodes may occur when a flip chip IC having a large number of bump electrodes is mounted on the substrate. Therefore, at the time of bonding the flip chip IC after cleaning the solder flux on the substrate, the steps of applying the flux, mounting the flip chip and reflowing are performed again.

In general, in order to electrically connect a wiring conductor on a thick film substrate to a power element or a case for external connection, wire bonding using a wire material such as Al or Au is performed.

[0004]

However, the above-mentioned prior art has the following problems. In other words, after solder joining, the flux components Br and Cl contained in the solder paste
Or thixotropic material spreads and contaminates wiring conductors (bonding lands) for bonding wires. This contamination causes a problem that the bonding property is deteriorated. To avoid the problem, a bonding pad member made of, for example, a Ni-Fe alloy plate plated with Ni is provided, and bonding is performed on the pad member. Such measures are imposed. In this case, an additional configuration such as a pad member is required, which causes an increase in cost.

In order to avoid the above-mentioned problems, it is necessary to take measures such as increasing the distance between various electronic components to be soldered and the wire bonding portion, which inevitably leads to an increase in the size of the circuit device.

In cleaning the flux in the solder paste, an alternative chlorofluorocarbon or water-based cleaning agent is used as a cleaning agent. However, cleaning costs and equipment costs are increased, which may lead to a significant increase in cost. Is very much desired.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and a first object of the present invention is to reduce the distance between a component bonding portion and a wire bonding portion while maintaining good bonding properties. An object of the present invention is to provide a hybrid integrated circuit device capable of reducing the overall size and a method of manufacturing the same. A second object of the present invention is to eliminate cleaning.

[0008]

In order to achieve the above object, in the hybrid integrated circuit device according to the first aspect, the flip chip IC is soldered at a portion where the flip chip IC is mounted on the thick film substrate. Bonded and flip-chip IC
Electronic components other than those mounted on the thick film substrate are bonded to each other with a conductive adhesive.

In such a case, the electronic components other than the flip-chip IC are joined with a conductive adhesive instead of the solder, and the electronic components to be soldered are limited to the flip-chip, so that the wire bonding portion (bonding land) is contaminated. Therefore, the amount of solder flux or the like which causes the above is reduced. Therefore, the joining part of the electronic component by the conductive adhesive can be arranged in a state close to the wire bonding part. Further, at this time, it is possible to suppress a problem that the bonding property is deteriorated, and the bonding pad member becomes unnecessary. As a result, the distance between the component bonding portion and the wire bonding portion can be reduced while maintaining good bonding property, and the overall size of the device can be reduced. Further, the soldering operation of the solder flux can be reduced by bonding the electronic component with the adhesive.

Incidentally, flip-chip ICs require fine lands for bonding a large number of bump electrodes.
It can be said that solder joining is more advantageous than joining with a conductive adhesive.

According to the second aspect of the present invention, the flip-chip IC has bump electrodes provided with solder in advance. In this case, workability at the time of manufacturing the circuit board is improved.

According to the third aspect of the present invention, the periphery of the conductor to which the flip-chip IC is soldered is surrounded by a wall of a thick film material. In particular, in the invention described in claim 4, the height of the wall of the thick film material is 30 μm or more. In this case, dripping of the solder flux is blocked by the wall of the thick film material, and contamination of the bonding lands can be avoided more reliably.

According to a fifth aspect of the present invention, there is provided a method of manufacturing a hybrid integrated circuit device, comprising the steps of: bonding an electronic component other than the flip-chip IC to the substrate with a conductive adhesive; Preparing and soldering the flip chip IC to a substrate. In the hybrid integrated circuit device manufactured by the above process, the contamination of the bonding lands by the solder flux can be suppressed. As a result, the distance between the component bonding portion and the wire bonding portion can be reduced while maintaining good bonding property, and the overall size of the device can be reduced. Further, the soldering operation of the solder flux can be reduced by bonding the electronic component with the adhesive.

In the above-described manufacturing process, the solder of the mounter head may be reflowed by the heat of the heater using the heater of the mounter head. In this case, the mounting of the flip chip IC and the solder reflow can be performed continuously, and the workability is improved.

According to the seventh aspect of the present invention, the conductive adhesive is cured when the electronic component is joined, and the flip chip I
The solder reflow of C is performed at the same time. For this reason, man-hours can be reduced and cost reduction can be realized.

According to the eighth aspect of the present invention, about 150 to 1
A temperature profile is used in which the temperature is maintained in a temperature range of 70 ° C. for a predetermined time and then the temperature is changed to a reflow temperature of the solder. According to the inventor, the temperature holding time at about 150 to 170 ° C. is 1.
It has been confirmed that good results can be obtained by setting the time to 5 minutes or longer. In other words, in the case where the curing of the conductive adhesive and the solder reflow are performed at the same time, if a temperature profile that immediately shifts to a normal solder reflow temperature (about 235 ° C.) is used, the conductive adhesive cures, but the rapid curing causes The gas in the solvent is not released and the surface swells. On the other hand, “about 150 to 170 ° C. × 1.
By setting the temperature profile of “5 minutes or more → reflow temperature”, the gas in the solvent is sufficiently vaporized and released in association with the curing reaction, and a joint surface without swelling can be obtained.

According to the ninth aspect of the present invention, a non-cleaning flux is used in the step of soldering the flip chip IC. In this case, a cleaning step after soldering can be omitted, and cost reduction can be realized. When non-cleaning flux is used, the thixotropic material used for improving printability remains between the soldered lands and the insulation between the lands is reduced, or the bonding property is reduced due to contamination of the bonding lands. However, according to the above configuration in which solder bonding and bonding with a conductive adhesive are selectively used, such a problem is solved.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) A first embodiment of a hybrid integrated circuit device according to the present invention will be described below with reference to the drawings. FIG. 1 shows a cross-sectional structure of a thick film substrate according to the present embodiment. In FIG. 1, an alumina substrate 1 as a ceramic insulating substrate has, for example, C
A conductor 3 made of a u conductor material is formed in a predetermined wiring pattern. An overcoat glass layer 4 is formed on the conductor 3 by printing, and the overcoat glass layer 4 forms a number of lands 3a, 3b, 3c for component mounting.

An electronic component (a component other than a flip chip) 6, such as a chip capacitor, is bonded to the land 3a substantially at the center of the figure by a conductive adhesive 5 having conductivity and excellent heat conductivity. Have been. Examples of the conductive adhesive 5 include a silver-filled adhesive and a gold-silicon (S
i) Eutectic adhesives and the like are known. Flip chip 8 (flip chip IC) is applied by solder 7 on land 3b formed opposite to the flip chip bump electrode.
Are joined.

A heat sink S is mounted on the alumina substrate 1, and a power element P is mounted on the heat sink S. The land 3c of the conductor 3 and the power element P
Are electrically connected by an aluminum wire 9.

Next, a method of manufacturing the thick film substrate having the above configuration will be described. (1) First, the conductor 3 is formed on the alumina substrate 1.
Specifically, a Cu conductor paste is printed in a predetermined wiring pattern, dried at about 120 ° C. for 10 minutes, and then baked at about 600 ° C. for 10 minutes in an inert gas (N 2) atmosphere.

(2) The overcoat glass layer 4 is formed. Specifically, an overcoat glass material is printed on the conductor 3, dried at about 120 ° C. for 10 minutes, and baked at about 570 ° C. for 10 minutes in an inert gas (N 2) atmosphere.

(3) A conductive adhesive paste is printed on the lands 3a of the conductors 3, and an electronic component 6 other than a flip chip is mounted on the adhesive paste. And
Approx. 150 ° C x 10 in an inert gas (N2) atmosphere
Then, the conductive adhesive paste is hardened and the electronic component 6 is joined. At this time, the power element P and the heat sink S which have been assembled in advance are joined.

(4) A flip chip 8 having a solder 7 attached to a bump electrode is prepared, and a flux (no-cleaning flux) is applied to the solder 7 or the land 3b on the thick film substrate. Then, the flip chip 8 is mounted on the substrate by the mounter, and at the same time, the solder reflow is performed at about 235 ° C. Specifically, a mounter having a heat source (heater) is used for the head, and the flip chip 8 is mounted by the mounter, and at the same time, the heat source of the head is turned on. As a result, the solder 7 is melted via the flip chip 8, and the chip 8 is bonded on the substrate.

(5) Then, the power element P and the land 3c of the conductor 3 are electrically connected by the aluminum wire 9.
In this wire bonding, for example, an ultrasonic welding method is used.

Through the steps (1) to (5), the thick film substrate shown in FIG. 1 can be manufactured. By the way, in the soldering process using a non-cleaning flux, at a temperature at which the solder begins to melt, the flux composed of a single or composite material is present in a liquid state in the solder portion without decomposing or evaporating, and at the end of the soldering process. The flux is evaporated without leaving it. The details are disclosed in Japanese Patent Application Laid-Open No. 9-94691 filed earlier by the present applicant.

Table 1 below shows the experimental results showing the relationship between the mounter head temperature and the quality of the solder joint.

[0028]

[Table 1] According to Table 1, when the chip size is □ 11, good solder jointability can be obtained by setting the head temperature to 270 ° C. or higher. Further, when the chip size is □ 5.8, good solder jointability can be obtained by setting the head temperature to 250 ° C. or higher.

According to the embodiment described in detail above, the following effects can be obtained. The flip chip 8 was joined with the solder 7, and the other electronic components 6 were joined with the conductive adhesive 5. In such a case, the electronic component 6 other than the flip chip is joined with the conductive adhesive 5 instead of the solder, and the electronic component to be soldered is limited to the flip chip 8.
The amount of solder flux that causes contamination of the bonding lands 3c is reduced. For this reason, problems such as deterioration in bonding property can be suppressed, and a bonding pad member is not required. As a result, the distance between the component bonding portion and the wire bonding portion can be reduced while maintaining good bonding property, and the overall size of the device can be reduced. Also, by bonding the electronic component 6 with an adhesive,
Cleaning work of solder flux can be reduced.

Incidentally, since the flip chip 8 requires fine lands 3b for joining a large number of bump electrodes, it can be said that solder joining is more advantageous than joining with a conductive adhesive.

FIG. 2 shows a comparison result between the structure of the present embodiment and the conventional structure with respect to the relationship between the distance between the component bonding portion and the wire bonding portion and the shear strength at the bonding portion. However, the conventional structure refers to a structure in which all electronic components are soldered. According to the figure, in comparison with the state where the shear strength is maintained, in the case of the present embodiment, the distance between the component bonding portion and the wire bonding portion can be reduced to about half of the conventional case. .

Further, according to the above configuration, at the joint portion of the electronic component 6, stress due to solder joining such as stress at the time of forming an alloy layer of the solder and the Cu conductor (low temperature fired conductor) and accompanying fatigue of the solder itself are eliminated. . As a result, the bonding strength of various electronic components is increased, and the reliability of the thick film substrate can be improved.

By using the conductive adhesive 5 as a substitute material for the solder and mounting the electronic component 6 with the conductive adhesive 5, the amount of Pb is reduced, which can contribute to environmental protection. The flip chip 8 had the bump electrode provided with the solder 7 in advance. Therefore, workability at the time of manufacturing the circuit board is improved.

In the substrate manufacturing process, the solder of the mounter head is used to reflow the solder by the heat of the heater. In this case, the mounting of the flip chip 8 and the solder reflow can be performed continuously, and the workability is improved.

Since the conductive adhesive 5 is not used for mounting the flip chip 8, the conductive adhesive 5 is not printed in accordance with the fine bump electrodes, and the operation is not complicated. In this case, solder repair can be easily performed in a flip chip in which assembly failures frequently occur.

In the soldering step of the flip chip 8, a non-cleaning flux was used. In this case, a cleaning step after soldering can be omitted, and a reduction in manufacturing cost can be realized. When using a non-cleaning flux, there is a possibility that the thixotropic material or the like used for improving printability may contaminate the bonding lands and reduce the bonding property, but according to the above-described embodiment, such a problem is also solved. You.

(Second Embodiment) Next, a second embodiment of the present invention will be described with reference to FIG. However, in the configurations of the following embodiments, the same components as those of the above-described first embodiment are denoted by the same reference numerals and the description thereof is simplified. And below is the first
The following description focuses on the differences from this embodiment.

In the second embodiment, the hybrid integrated circuit device of the present invention is embodied on a thick-film multilayer substrate, and the sectional structure is shown in FIG. In FIG. 3, an inner conductor 11 made of an Ag-based conductor material is formed in a predetermined wiring pattern on an alumina substrate 1, and insulating layers 12 and 13 made of, for example, crystallized glass are formed thereon. . Insulation layer 1
The via holes 12a and 13a are filled with via hole conductors 14 and 15 made of an Ag-based conductor material.

On the insulating layer 13, a resistor 16 made of a RuO-based material is formed, and a surface conductor 17 made of a Cu conductor material is formed in a predetermined wiring pattern. An overcoat glass layer 18 is formed on the resistor 16 and the surface conductor 17 by printing, and the overcoat glass layer 18 forms a large number of lands 17a for component mounting.
Are formed and the resistor 16 is protected. The inner conductor 11 and the surface conductor 17 are connected to the via-hole conductor 1.
They are electrically connected via 4 and 15.

An electronic component (a component other than a flip chip) 6 is joined to the land 17 a of the surface conductor 17 by a conductive adhesive 5. Also, at the left end of FIG.
A bonding land 17b is formed on the conductor 17, and an aluminum wire 9 is connected to the bonding land 17b.

The flip chip 8 is joined to the land 11 a of the inner conductor 11 by the solder 7. The periphery of the flip chip 8 is an insulating layer 12, 1 having a height of 30 μm or more.
The walls of the insulating layers 12 and 13 suppress the spread of the solder flux.

Next, a method for manufacturing the thick-film multilayer substrate having the above-described structure will be described. (1) First, the inner conductor 11 is formed on the alumina substrate 1. Specifically, an Ag-based conductor paste is printed on the alumina substrate 1, dried at about 120 ° C. × 10 minutes, and then fired at about 850 ° C. × 10 minutes in the air atmosphere.

(2) The insulating layer 12 is printed on the inner layer conductor 11, dried at about 120 ° C. × 10 minutes, and baked at about 850 ° C. × 10 minutes in the air atmosphere. At this time, via holes 12a are formed in the insulating layer 12 at the same time. However, the portion where the flip chip 8 is to be mounted has a space corresponding to the chip size.

(3) The via-hole conductor 14 is formed.
Specifically, A is filled so as to fill the via hole 12a.
The g-based conductor paste is printed, dried at about 120 ° C. × 10 minutes, and then fired at about 850 ° C. × 10 minutes in an air atmosphere. The steps (2) and (3) are repeated until the insulating layer has a desired thickness (in the present embodiment, the insulating layers 12, 13 and the via-hole conductors 14, 15 are formed in two layers). .

(4) RuO-based resistor 1 on insulating layer 13
6 is printed and dried at about 120 ° C. × 10 minutes, and then baked at about 850 ° C. × 10 minutes in the air atmosphere. (5) The surface conductor 17 is formed. Specifically, the resistor 1
6, and printed with a Cu conductor paste at both ends at about 120 ° C. for 10 minutes.
2) Baking at about 600 ° C for 10 minutes in an atmosphere.

(6) The overcoat glass layer 18 is formed. Specifically, an overcoat glass material is printed on the resistor 16 and the surface conductor 17 and is printed at about 120 ° C. × 1.
After drying for 0 minutes, baking is performed at about 570 ° C. for 10 minutes in an inert gas (N2) atmosphere.

(7) The conductive adhesive paste is printed on the lands 17a of the surface conductor 17, and the electronic components 6 other than the flip chips are mounted. And an inert gas (N
2) The conductive adhesive paste is cured at about 150 ° C. × 10 minutes in an atmosphere, and the electronic component 6 is joined.

(8) A flip chip 8 in which solder 7 is attached to a bump electrode is prepared, and the solder 7 or the inner layer conductor 11 is prepared.
(No-cleaning flux) is applied to the land 11a. Then, the flip chip 8 is mounted on the substrate, and solder reflow is performed at about 235 ° C. in an inert gas (N 2) atmosphere (similar to the first embodiment, a thermocompression bonding method using a mounter head may be used). Possible).

(9) Land 1 for bonding of conductor 17
The aluminum wire 9 is connected to 7b. The above (1) to (9)
By the above process, the thick film multilayer substrate of FIG. 2 can be manufactured.
As described above, according to the present embodiment embodied in a thick film multilayer substrate, similarly to the first embodiment, the distance between the component bonding portion and the wire bonding portion is reduced while maintaining good bonding property. As a result, the size of the entire apparatus can be reduced.

In this embodiment, the flip chip 8
30μ around the conductor (land 11a) to solder
The insulating layers 12 and 13 having a height of not less than m were surrounded by walls. In this case, the dripping of the solder flux is caused by the insulation layer 1
The two or more walls prevent the contamination of the bonding lands 17b. That is,
The solder flux spreads at high temperature and adheres to the bonding lands in the vicinity. The flux reacts with the conductor oxide of the land and degrades the bonding property. However, according to the above configuration, such a problem can be solved.

The embodiment of the present invention can be realized in the following modes other than the above. In the method of manufacturing a hybrid integrated circuit device in each of the above embodiments, curing of the conductive adhesive 5 and solder reflow are performed simultaneously with the electronic component 6 and the flip chip 8 mounted on the substrate. At this time,
150-170 ° C under an inert gas (N2) atmosphere
, And soldering is performed at a normal solder reflow temperature (235 ° C.).

In such a case, the solder is reflowed at a temperature of 150 to 170 ° C. without holding the temperature for 1.5 minutes or more.
If the temperature is immediately shifted to ° C. (peak temperature), the conductive adhesive 5 cures, but a sudden curing action does not release the gas in the solvent and causes a problem that the surface swells. On the other hand, as described above, 1.5 to
By holding for more than a minute, the gas in the solvent is sufficiently vaporized and released along with the curing reaction, and a joint surface without swelling is obtained. According to the present embodiment, man-hours can be reduced and cost can be reduced.

Table 2 below shows the experimental results showing the relationship between the holding time at 150 to 170 ° C. and the presence or absence of swelling of the conductive adhesive 4.

[0054]

[Table 2] According to Table 2, the solder reflow temperature (peak temperature) was 2
In either case of 35 ° C or 270 ° C, 15
It can be seen that if the holding time at 0 to 170 ° C. is 1.5 minutes or more, a good joint surface without swelling is formed.

In each of the above embodiments, the flip chip I
C is provided with solder in advance, but this is changed. For example, a configuration may be adopted in which a solder paste is printed on a conductor of a thick film substrate and a flip chip IC is mounted on the solder.

In each of the above embodiments, a non-cleaning flux is used, but it is needless to say that a conventional flux can be used. In each of the above embodiments, the solder reflow is performed by the thermocompression bonding method using the heater of the mounter. However, an infrared reflow method, a hot plate reflow method, a laser X-ray reflow method, or the like may be used.

A resin layer (under resin) is formed between the flip chip 8 and the alumina substrate 1. In particular,
A predetermined amount of liquid epoxy resin is applied to one side of the flip chip 8 with a dispenser and heated at about 100 ° C. × 10 minutes. Then, the liquid epoxy resin is filled below the flip chip 8 by the capillary action. Then, about 150 ℃
The curing treatment is performed in 120 minutes. In such a case, the stress at the solder joint is significantly reduced, and further improvement in reliability can be realized.

In the above-described second embodiment (FIG. 3), the walls of the thick film material are formed by the insulating layers 12 and 13, but this is changed. For example, a glass coat layer of 30 μm or more is formed on a conductor, and a wall of a thick film material is formed with the glass coat layer.

The present invention may be embodied in a high-temperature fired multilayer substrate formed by firing a multilayer alumina layer (green sheet) at a high temperature. In this case, the height of the alumina layer is 30 μm.
The above-described wall is formed, a land for flip chip is provided in a space defined by the wall, and a flip chip IC is soldered to the land.

The present invention is also effective for a hybrid integrated circuit device in which electronic components other than flip chips are joined on an Ag-based conductor. That is, C of 500-700 ° C. firing (low temperature firing)
In addition to the u-based conductor, it has been confirmed that the growth of the alloy layer with the solder is relatively fast under high-temperature conditions also in the case of the Ag-based conductor fired at 800 to 900 ° C.
Hr, Cu-based conductor is about 20 μm, Ag-based conductor is about 15 μm.
μm). Incidentally, in the case of a Cu metal film, 150 ° C. × 500
Hr is about 5 μm. In this case, in the thick film substrate formed of the Ag-based conductor, the stress due to the solder bonding is eliminated, and the bonding strength of various electronic components is increased.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a thick film substrate according to a first embodiment.

FIG. 2 is a graph showing a relationship between a distance between a component bonding portion and a wire bonding portion and a shear strength at the bonding portion.

FIG. 3 is a sectional view of a thick-film multilayer substrate according to a second embodiment.

[Description of Signs] 1 ... Alumina substrate, 3 ... Conductor, 3a, 3b, 3c ... Land 5 ... Conductive adhesive, 6 ... Electronic component, 7 ... Solder, 8
... Flip chip (flip chip IC), 9 ... Aluminum wire, 11 ... Inner layer conductor, 11a ... Land, 12,13
... insulating layer (thick film material), 17 ... surface conductor, 17b ... bonding land.

Claims (9)

[Claims] 1. A hybrid integrated circuit device for bonding various electronic components on a thick-film substrate, wherein the flip-chip IC is bonded by solder at a portion where the flip-chip IC is mounted on the substrate. A hybrid integrated circuit device, wherein electronic components other than the electronic components are mounted on the substrate by using a conductive adhesive. 2. The hybrid integrated circuit device according to claim 1, wherein said flip-chip IC has a bump electrode provided with solder in advance. 3. The hybrid integrated circuit device according to claim 1, wherein a periphery of a conductor to which said flip-chip IC is soldered is surrounded by a wall of a thick film material. 4. The hybrid integrated circuit device according to claim 3, wherein the height of the wall of the thick film material is 30 μm or more. 5. A method of manufacturing a hybrid integrated circuit device for bonding various electronic components on a thick film substrate, comprising: bonding an electronic component other than a flip-chip IC to the substrate with a conductive adhesive; Preparing a flip-chip IC provided with: and soldering the flip-chip IC to a substrate. 6. The method for manufacturing a hybrid integrated circuit device according to claim 5, wherein in the step of soldering the flip-chip IC, the solder of the mounter head is used to reflow the solder by the heat of the heater. 7. The method of manufacturing a hybrid integrated circuit device according to claim 5, wherein curing of the conductive adhesive at the time of bonding the electronic components and solder reflow of the flip-chip IC are simultaneously performed. 8. A method for manufacturing a hybrid integrated circuit device according to claim 7, wherein the temperature profile is maintained at a temperature in a range of about 150 to 170 ° C. for a predetermined time and then changed to a reflow temperature of the solder. Manufacturing method. 9. The method for manufacturing a hybrid integrated circuit device according to claim 5, wherein a non-cleaning flux is used in the step of soldering the flip-chip IC.