JPH06350864A - Display picture adjustment circuit - Google Patents

Display picture adjustment circuit

Info

Publication number
JPH06350864A
JPH06350864A JP13723893A JP13723893A JPH06350864A JP H06350864 A JPH06350864 A JP H06350864A JP 13723893 A JP13723893 A JP 13723893A JP 13723893 A JP13723893 A JP 13723893A JP H06350864 A JPH06350864 A JP H06350864A
Authority
JP
Japan
Prior art keywords
circuit
horizontal
output
waveform
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13723893A
Other languages
Japanese (ja)
Inventor
Kenichi Fukiage
賢一 吹上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Image Information Systems Inc
Hitachi Ltd
Hitachi Advanced Digital Inc
Original Assignee
Hitachi Image Information Systems Inc
Hitachi Ltd
Hitachi Video and Information System Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Image Information Systems Inc, Hitachi Ltd, Hitachi Video and Information System Inc filed Critical Hitachi Image Information Systems Inc
Priority to JP13723893A priority Critical patent/JPH06350864A/en
Publication of JPH06350864A publication Critical patent/JPH06350864A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To obtain a display picture adjustment circuit for a horizontal direction having also a picture distortion correcting function by providing an integration circuit to convert vertical DY deflecting current waveform into parabolic waveform, and giving its output to the output of a frequency-voltage conversion circuit. CONSTITUTION:In the display picture adjustment circuit dealing with multiscanning, in order to improve bow-shaped picture distortion to the same direction at both the sides of a screen caused by the performance of a deflecting DY or a circuit system, the output current of a constant current circuit 8 to determine the signal delay quantity of a monostable multivibrator 2 is controlled by the parabolic waveform. Therefore, the saw tooth wave deflecting current of the vertical DY is supplied to a terminal 9. This saw tooth wave deflecting current is integrated by the integration circuit 10, and the parabolic waveform of a vertical period is formed. The distortion of a display picture can be improved by controlling the output current of the constant current circuit 8 by adding the parabolic waveform to the output voltage of the frequency-voltage conversion circuit 7. Besides, since the picture distortion correcting function and a picture display position adjusting function are uited and simplified, the addition of parts can be managed with a small quantity.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、2つ以上の水平同期周
波数を入力とするCRTマルチスキャンディスプレイに
おいて、特に画面歪補正機能を付加した表示画像調整回
路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CRT multi-scan display which inputs two or more horizontal synchronizing frequencies, and more particularly to a display image adjusting circuit having a screen distortion correcting function.

【0002】[0002]

【従来の技術】近年、コンピュータ用のディスプレイで
は各種の水平周波数に対応できる所謂マルチスキャンデ
ィスプレイが主流となっている。そこで、問題となるの
が入力周波数切替時に発生する水平方向の画像表示位置
のシフトである。この問題を解決する有効な手段とし
て、例えば特開昭63−30071号公報に述べられて
いるように、入力水平周波数に比例した直流電圧を利用
してビデオ信号と水平同期信号の位相関係を制御する表
示画像調整回路が知られている。
2. Description of the Related Art In recent years, so-called multi-scan displays, which are compatible with various horizontal frequencies, have become the mainstream of computer displays. Therefore, a problem is the shift of the image display position in the horizontal direction that occurs when the input frequency is switched. As an effective means for solving this problem, for example, as described in Japanese Patent Laid-Open No. 63-30071, a phase relationship between a video signal and a horizontal synchronizing signal is controlled by using a DC voltage proportional to an input horizontal frequency. A display image adjusting circuit is known.

【0003】図4に表示画像調整回路を示す。本回路は
周波数−電圧変換回路7の出力電圧Vsは定電流回路8
に供給され、その出力電流はモノマルチ2の遅延時間を
制御する。モノマルチ2とモノマルチ3は所定のパルス
幅を有する遅延させた水平同期信号を発生させる。モノ
マルチ3の出力信号は水平AFC回路4に供給され、水
平発振器5及び水平出力回路6で発生した水平偏向電流
が水平偏向コイルに供給される。
FIG. 4 shows a display image adjusting circuit. In this circuit, the output voltage Vs of the frequency-voltage conversion circuit 7 is the constant current circuit 8
, And its output current controls the delay time of the monomulti 2. Mono-multi 2 and mono-multi 3 generate a delayed horizontal synchronizing signal having a predetermined pulse width. The output signal of the monomulti 3 is supplied to the horizontal AFC circuit 4, and the horizontal deflection current generated by the horizontal oscillator 5 and the horizontal output circuit 6 is supplied to the horizontal deflection coil.

【0004】図4の回路動作を図5,図6を用いて簡単
に説明すると、或る任意の信号源の入力ビデオ信号Aに
対するコンピュータ出力の水平同期信号Bは、ビデオ信
号Aを画面のほぼ中央に位置するよう制御された水平同
期遅延信号Cに変換されるため、図6(a)に示すよう
な水平同期信号に対するビデオ信号のタイミングが異な
るために生ずる水平画像表示位置のシフトを軽減でき、
かつ水平周波数に起因せずに図6(b)のように表示画
像を画面のほぼ中央とすることができる。
The circuit operation of FIG. 4 will be briefly described with reference to FIGS. 5 and 6. A horizontal sync signal B output from a computer with respect to an input video signal A of an arbitrary signal source is a video signal A which is almost the same as the screen. Since the horizontal sync delay signal C is controlled so as to be positioned at the center, the shift of the horizontal image display position caused by the difference in the timing of the video signal with respect to the horizontal sync signal as shown in FIG. 6A can be reduced. ,
In addition, the display image can be made to be substantially at the center of the screen as shown in FIG. 6B regardless of the horizontal frequency.

【0005】[0005]

【発明が解決しようとする課題】ところで、現在のCR
Tディスプレイでは偏向DYや回路の性能的な問題から
サイドピン歪を代表とするいろいろな画面歪が生じ、独
自の歪補正回路が必要となるという問題があった。
By the way, the present CR
In the T display, various screen distortions represented by side pin distortion occur due to deflection DY and circuit performance problems, and there is a problem that an original distortion correction circuit is required.

【0006】そこで本発明は、画面両サイドの同一方向
への弓形画面歪をマルチスキャン対応の水平方向の画像
シフト回路に垂直DY偏向電流波形を積分したパラボラ
波形を付加して容易に構成することができる画面歪補正
機能付き表示画像調整回路を提供することを目的とす
る。
Therefore, according to the present invention, the arcuate screen distortion in the same direction on both sides of the screen can be easily constructed by adding a parabola waveform obtained by integrating the vertical DY deflection current waveform to a horizontal image shift circuit corresponding to multi-scan. It is an object of the present invention to provide a display image adjustment circuit with a screen distortion correction function capable of performing the above.

【0007】[0007]

【課題を解決するための手段】本発明は、マルチスキャ
ン対応の表示画像調整回路において、垂直DY偏向電流
波形をパラボラ波形に変換する積分回路を備え、該出力
を水平周波数に比例した変換電圧に加算した信号を水平
発振回路に与えることを特徴とする。
According to the present invention, in a display image adjusting circuit for multi-scan, an integrating circuit for converting a vertical DY deflection current waveform into a parabolic waveform is provided, and the output is converted into a conversion voltage proportional to a horizontal frequency. It is characterized in that the added signal is applied to the horizontal oscillation circuit.

【0008】[0008]

【作用】上記構成によれば、鋸波状の垂直DY偏向電流
波形を入力とする積分回路によりパラボラ波形を形成
し、この出力を周波数−電圧変換回路出力に与えること
により画面歪補正機能を兼ね備えた水平方向の表示画像
調整回路を構成することができる。
According to the above construction, a parabola waveform is formed by an integrator circuit having a sawtooth-shaped vertical DY deflection current waveform as an input, and this output is given to the output of the frequency-voltage conversion circuit so as to have a screen distortion correction function. A horizontal display image adjustment circuit can be configured.

【0009】[0009]

【実施例】以下、本発明の一実施例に基づいて説明す
る。
EXAMPLE An example of the present invention will be described below.

【0010】図1は本発明の一実施例を示している。図
1において、端子1に水平同期信号Hsが入力される。
水平同期信号Hsはモノマルチ2及び周波数−電圧変換
回路7に供給される。モノマルチ2は水平同期信号Hs
をトリガとし、後に説明する定電流回路8の出力により
設定された遅延時間Tdだけ信号を遅延する。モノマル
チ2の遅延信号はモノマルチ3に供給され、モノマルチ
3は所定のパルス幅をもつ遅延した水平同期信号を発生
する。この水平同期信号は水平AFC回路4に入力され
る。さらにこの出力信号は水平発振回路5及び水平発振
回路6を経て、水平偏向電流が水平偏向コイルに供給さ
れる(図示せず)。ここで本発明の特徴は、偏向DYや
回路系の性能により発生する画面両サイドの同一方向へ
の弓形画面歪(図3参照)を改善するため、モノマルチ
2の信号遅延量を決定する定電流回路8の出力電流をパ
ラボラ波形で制御している点である。端子9には垂直D
Yの鋸波状偏向電流が供給される。鋸波状偏向電流は積
分回路10により積分され、垂直周期のパラボラ波形を
形成する。周波数−電圧変換回路7の出力電圧に上記パ
ラボラ波形を加算し、定電流回路8の出力電流を制御す
ることで図3に示すような表示画像の歪を改善すること
が可能となる。
FIG. 1 shows an embodiment of the present invention. In FIG. 1, the horizontal synchronizing signal Hs is input to the terminal 1.
The horizontal synchronizing signal Hs is supplied to the mono-multi 2 and the frequency-voltage conversion circuit 7. Mono-multi 2 is horizontal sync signal Hs
Is used as a trigger to delay the signal by the delay time Td set by the output of the constant current circuit 8 described later. The delayed signal of the mono-multi 2 is supplied to the mono-multi 3, and the mono-multi 3 generates a delayed horizontal synchronizing signal having a predetermined pulse width. This horizontal synchronizing signal is input to the horizontal AFC circuit 4. Further, this output signal passes through the horizontal oscillation circuit 5 and the horizontal oscillation circuit 6, and a horizontal deflection current is supplied to the horizontal deflection coil (not shown). Here, the feature of the present invention is that in order to improve the bow-shaped screen distortion (refer to FIG. 3) in the same direction on both sides of the screen, which is caused by the deflection DY and the performance of the circuit system, the constant delay that determines the signal delay amount of the monomulti 2 is used. The point is that the output current of the current circuit 8 is controlled by the parabolic waveform. Vertical D for terminal 9
A Y sawtooth deflection current is supplied. The sawtooth deflection current is integrated by the integrating circuit 10 to form a parabolic waveform with a vertical cycle. By adding the parabolic waveform to the output voltage of the frequency-voltage conversion circuit 7 and controlling the output current of the constant current circuit 8, it is possible to improve the distortion of the display image as shown in FIG.

【0011】図2は画面歪補正に使用する信号波形、図
3は同図右に示す画面歪の各位置における補正後の同期
信号タイミングを示す。図3の画面歪において、今、e
点に対してd,f点の水平位置が同じ量だけシフトして
いるとする。図2の垂直偏向電流波形9は積分回路10
により水平位相制御信号(パラボラ波形)11に変換さ
れる。この信号の持つ意味は、図3の画面歪において画
面d点では電位d、画面e点では電位e、画面f点では
電位fにより水平同期信号の位相制御を行うというもの
である。故に、ビデオ信号Aに対する画面歪補正後の水
平同期信号タイミングは、画面上部(d点)では水平同
期信号D、画面中央部(e点)では水平同期信号E、画
面下部(f点)では水平同期信号Fとなる。また、画面
d,f点と画面e点の水平画像シフト量は水平同期信号
の遅延時間Tdに相当している。
FIG. 2 shows a signal waveform used for screen distortion correction, and FIG. 3 shows the corrected sync signal timing at each position of the screen distortion shown on the right side of FIG. In the screen distortion of FIG. 3, now, e
It is assumed that the horizontal positions of points d and f are shifted from each other by the same amount. The vertical deflection current waveform 9 in FIG.
Is converted into a horizontal phase control signal (parabola waveform) 11 by. The meaning of this signal is that in the screen distortion shown in FIG. 3, the phase of the horizontal synchronizing signal is controlled by the potential d at the screen point d, the potential e at the screen point e, and the potential f at the screen point f. Therefore, the horizontal sync signal timing after screen distortion correction for the video signal A is horizontal sync signal D at the upper part of the screen (point d), horizontal sync signal E at the central part of the screen (point e), and horizontal at the lower part of the screen (point f). It becomes the synchronization signal F. The horizontal image shift amount at the screen points d and f and the screen point e corresponds to the delay time Td of the horizontal synchronizing signal.

【0012】上記構成によれば、垂直偏向電流波形を積
分して得られるパラボラ波形を水平位相制御に利用する
ことで同一方向への弓形画面歪を軽減することができ、
かつ画面表示位置調整機能も失うこともない。さらに、
具体的な回路構成では、図1に示すように比較的少ない
部品追加(抵抗R、コンデンサC1,C2など数点)で済
む。また、逆方向の同一方向への弓形画面歪に対しても
パラボラ波形の反転により応用できることは言うまでも
ない。
According to the above configuration, the parabolic waveform obtained by integrating the vertical deflection current waveform is used for the horizontal phase control, so that the arcuate screen distortion in the same direction can be reduced.
Moreover, the screen display position adjustment function is not lost. further,
With a specific circuit configuration, as shown in FIG. 1, relatively few parts need to be added (several points such as resistors R and capacitors C 1 and C 2 ). Further, it goes without saying that the present invention can also be applied to the arcuate screen distortion in the same direction in the opposite direction by inverting the parabolic waveform.

【0013】[0013]

【発明の効果】以上説明したように、本発明によれば、
垂直DYの鋸波状偏向電流波形を入力とした積分回路に
より得られるパラボラ波形を水平表示位置制御信号に加
算することで、画面歪補正機能と画面表示位置調整機能
をまとめて簡易化しているため、付加機能による部品追
加も少なく比較的容易に回路を構成でき、かつ同一方向
への弓形画面歪を低減することができる。さらに、本来
の表示画像調整機能も確保することができる。
As described above, according to the present invention,
Since the parabola waveform obtained by the integrating circuit using the vertical DY sawtooth deflection current waveform as an input is added to the horizontal display position control signal, the screen distortion correction function and the screen display position adjustment function are simplified together. It is possible to configure a circuit relatively easily with less addition of parts due to additional functions, and it is possible to reduce bow-shaped screen distortion in the same direction. Furthermore, the original display image adjusting function can be ensured.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例における表示位置調整回路の
構成図である。
FIG. 1 is a configuration diagram of a display position adjusting circuit according to an embodiment of the present invention.

【図2】本発明に用いる水平位相制御波形の一例を示す
図である。
FIG. 2 is a diagram showing an example of a horizontal phase control waveform used in the present invention.

【図3】本発明の一実施例における補正波形の一実施例
を示す図である。
FIG. 3 is a diagram showing an example of a correction waveform in an example of the present invention.

【図4】本発明の基礎となる従来の表示位置調整回路の
構成図である。
FIG. 4 is a configuration diagram of a conventional display position adjusting circuit which is a basis of the present invention.

【図5】本発明の基礎となる従来の表示位置調整回路の
信号タイミングの一例を示す図である。
FIG. 5 is a diagram showing an example of signal timing of a conventional display position adjusting circuit which is a basis of the present invention.

【図6】本発明の基礎となる表示位置調整回路の画像シ
フト動作の一例を示す図である。
FIG. 6 is a diagram showing an example of an image shift operation of a display position adjustment circuit which is the basis of the present invention.

【符号の説明】[Explanation of symbols]

1…水平同期信号入力端子、2〜3…モノマルチ、4…
水平AFC回路、5…水平発振回路、6…水平出力回
路、7…周波数−電圧変換回路、8…定電流回路、9…
垂直DY偏向電流波形、10…積分回路、11…水平位
相制御信号、Hs…入力水平同期信号、Vs…周波数−
電圧変換回路出力電圧、A…ビデオ信号、B…入力水平
同期信号波形、C…水平同期遅延信号波形、D…画面上
部(d点),補正後の水平同期信号波形、E…画面中央
部(e点),補正後の水平同期信号波形、F…画面下部
(f点),補正後の水平同期信号波形、d…画面上部、
e…画面中央部、f…画面下部、(a)…水平表示位置
調整前の画像、(b)…水平表示位置調整後の画像。
1 ... Horizontal sync signal input terminal, 2-3 ... Mono-multi, 4 ...
Horizontal AFC circuit, 5 ... Horizontal oscillation circuit, 6 ... Horizontal output circuit, 7 ... Frequency-voltage conversion circuit, 8 ... Constant current circuit, 9 ...
Vertical DY deflection current waveform, 10 ... Integrator circuit, 11 ... Horizontal phase control signal, Hs ... Input horizontal synchronization signal, Vs ... Frequency-
Voltage conversion circuit output voltage, A ... video signal, B ... input horizontal sync signal waveform, C ... horizontal sync delay signal waveform, D ... screen upper part (point d), corrected horizontal sync signal waveform, E ... screen central part ( e point), horizontal sync signal waveform after correction, F ... lower part of screen (point f), horizontal sync signal waveform after correction, d ... upper part of screen,
e ... central part of screen, f ... bottom part of screen, (a) ... image before horizontal display position adjustment, (b) ... image after horizontal display position adjustment.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】2つ以上の異なる水平同期周波数が供給さ
れるマルチスキャンディスプレイの水平表示位置調整回
路において、鋸波状の垂直DY偏向電流波形をパラボラ
波形に変換する積分回路と、水平同期周波数を入力とし
該周波数に比例した直流電圧に変換する周波数−電圧変
換回路と、上記2つの回路出力を合成する手段と、前記
合成出力信号により画面水平位置と画面歪を調整する補
正信号を得るための遅延回路を備えたことを特徴とする
表示画像調整回路。
1. A horizontal display position adjusting circuit for a multi-scan display, to which two or more different horizontal synchronizing frequencies are supplied, an integrating circuit for converting a sawtooth vertical DY deflection current waveform into a parabolic waveform, and a horizontal synchronizing frequency. A frequency-voltage conversion circuit for converting the input voltage into a DC voltage proportional to the frequency, a means for combining the two circuit outputs, and a correction signal for adjusting the screen horizontal position and the screen distortion by the combined output signal. A display image adjusting circuit comprising a delay circuit.
JP13723893A 1993-06-08 1993-06-08 Display picture adjustment circuit Pending JPH06350864A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13723893A JPH06350864A (en) 1993-06-08 1993-06-08 Display picture adjustment circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13723893A JPH06350864A (en) 1993-06-08 1993-06-08 Display picture adjustment circuit

Publications (1)

Publication Number Publication Date
JPH06350864A true JPH06350864A (en) 1994-12-22

Family

ID=15194007

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13723893A Pending JPH06350864A (en) 1993-06-08 1993-06-08 Display picture adjustment circuit

Country Status (1)

Country Link
JP (1) JPH06350864A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100360958B1 (en) * 1998-12-08 2002-11-18 닛폰 덴키(주) HOUT position control circuit and multisync monitor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100360958B1 (en) * 1998-12-08 2002-11-18 닛폰 덴키(주) HOUT position control circuit and multisync monitor

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