JPH07253761A - Screen distortion correcting circuit - Google Patents

Abstract

PURPOSE:To easily perform a screen distortion correction for the horizontal parallelogram distortion of a screen and to unnecessitate an individual distortion correcting circuit by superposing a saw-tooth distortion correcting signal proportional to vertical deflection current to a horizontal phase adjusting circuit. CONSTITUTION:A saw-tooth wave voltage proportional to vertical deflection current is taken out from a vertical output circuit 9 and inputted to a screen distortion correcting means 10 so as to improve the horizontal parallelogram distortion. The screen distortion correcting means 10 converts the saw-tooth wave voltage into a screen distortion correcting signal corresponding to the horizontal parallelogram distortion. Then, horizontal phase shift amounts are changed in a saw-toothed shape by superposing the output of the correcting signal to a horizontal phase correcting voltage VS being the output of a frequency-voltage conversion circuit 7 and supplying the superposed output to a constant current circuit 8. That is, since the saw-tooth distortion correcting signal is generated by providing a difference between a reference signal obtained by converting the saw-tooth voltage detected by the vertical deflection current and a comparison signal, the position of horizontal picture is changed in the saw-tooth shape in vertical periods by superposing the output of the horizontal phase adjusting signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a screen distortion correction circuit for correcting the screen distortion by a horizontal phase correction circuit for the screen geometric distortion.

[0002]

2. Description of the Related Art In recent years, so-called multi-scan displays, which can cope with various signal timings, have become the mainstream of computer displays. Therefore, the problem is the difference in signal timing (horizontal frequency, display period,
This is a shift of the image display position in the horizontal direction that occurs when the input signal is switched due to the front porch period or the like). As an effective means for solving this problem, for example, JP-A-63-300
As described in Japanese Patent Publication No. 71-71, there is known a display image adjusting circuit which controls a phase relationship between a video signal and a horizontal synchronizing signal by using a DC voltage proportional to an input horizontal frequency.

FIG. 4 shows a display image adjusting circuit. The horizontal synchronizing signal Hs becomes a horizontal phase correction voltage Vs by the frequency-voltage conversion circuit 7 and is supplied to the constant current circuit 8, converted into a constant current and supplied to the delay circuit 2. The delay circuit 2 controls the delay time of the horizontal synchronizing signal Hs according to the output current of the constant current circuit 8. The sync signal delayed by the delay circuit 2 is set to a predetermined sync pulse width by the sync width control circuit 3 to generate a pseudo horizontal sync signal. The pseudo horizontal synchronizing signal is the horizontal AFC circuit 4
To control the horizontal oscillation circuit 5 and drive the horizontal output circuit 6. This supplies the horizontal deflection current to the horizontal deflection coil.

The circuit operation of FIG. 4 will be briefly described with reference to FIGS. 5 and 6. The horizontal synchronizing signal B (Hs) with respect to the input video signal A of a certain arbitrary signal source is the video signal A almost on the screen. Since the horizontal sync delay signal C is delayed by Td so as to be located at the center, the horizontal image display position shift caused by the difference in the timing of the video signal with respect to the horizontal sync signal as shown in FIG. The display image can be reduced, and the display image can be made to be substantially in the center of the screen as shown in FIG. 6B without being caused by the horizontal frequency.

[0005]

In the current CRT display, various screen distortions represented by side pin distortion peculiar to the CRT are generated due to deflection DY and performance problems of the circuit.
There is a problem that an original distortion correction circuit is required.

The present invention provides a screen distortion correction circuit which can be easily constructed by adding a sawtooth distortion correction signal proportional to the vertical deflection current to the horizontal parallelogram distortion of the screen to the horizontal phase adjustment circuit. The purpose is to do.

[0007]

In order to achieve the above object, in the present invention, a means for detecting a vertical deflection current and outputting a sawtooth voltage, and a reference signal and a comparison signal are generated based on the output. And a means for outputting a sawtooth distortion correction signal corresponding to the horizontal parallelogram distortion by comparing the waveforms of these signals with each other, and means for superimposing the output on the horizontal phase adjustment signal. It is a thing.

[0008]

According to the above construction, when the screen has horizontal parallelogram distortion, the sawtooth distortion is corrected by providing a difference between the reference signal obtained by converting the sawtooth voltage detected from the vertical deflection current and the comparison signal. A signal is generated. By superimposing the output on the horizontal phase adjustment signal, the horizontal image position changes in a sawtooth shape in the vertical cycle. By adjusting the setting of the comparison signal, a screen distortion correction signal that matches the horizontal parallelogram distortion can be obtained, so the horizontal parallelogram distortion can be corrected.

[0009]

The present invention will be described below. FIG. 1 shows a block diagram of an embodiment of the present invention. The horizontal synchronizing signal Hs is input to the terminal 1. The horizontal synchronizing signal Hs is supplied to the delay circuit 2 and the frequency-voltage conversion circuit 7. The delay circuit 2 delays the signal in response to the output current of the constant current circuit 8 by using the horizontal synchronizing signal Hs as a trigger and supplies it to the synchronizing width control circuit 3.
The synchronization width control circuit 3 uses the output of the delay circuit 2 as a trigger to generate a signal having a predetermined pulse width. As a result, the horizontal synchronizing signal Hs becomes a delayed pseudo horizontal synchronizing signal and is input to the horizontal AFC circuit 4. The horizontal AFC circuit 4 controls the horizontal oscillation circuit 5 so that the pseudo horizontal synchronizing signal and the feedback signal from the horizontal output circuit 6 are synchronized. The horizontal oscillation circuit 5 drives the horizontal output circuit 6, and the horizontal deflection current is supplied to the horizontal deflection coil to obtain an image synchronized with the horizontal synchronization signal Hs.

In the present invention, the horizontal parallelogram distortion (see FIG. 3)
In order to improve, the sawtooth wave voltage proportional to the vertical deflection current is taken out from the vertical output circuit 9 and input to the screen distortion correction means 10. The screen distortion correction means 10 responds to the sawtooth wave voltage according to the horizontal parallelogram distortion. Converted to the screen distortion correction signal. The output is superimposed on the horizontal phase correction voltage Vs which is the output of the frequency-voltage conversion circuit 7, and is supplied to the constant current circuit 8. As a result, the horizontal phase shift amount changes in a sawtooth shape, so that the horizontal parallelogram distortion as shown in FIG. 3 can be improved.

Next, the screen distortion correction means 1 of one embodiment of the present invention
0 and its peripheral circuits will be described with a block diagram shown in FIG. FIG. 3 shows before and after the correction of the horizontal parallel screen distortion and the pseudo horizontal synchronizing signal timing at each screen position. The vertical output deflection current of the vertical output circuit 9 is detected by the current detection means 11, and the sawtooth voltage is proportional to the vertical deflection current.
(Signal waveform c) is output and applied to the reference signal generating means 13 and the comparison signal generating means 15. Reference signal generating means 13
And the comparison signal generating means 15 divides the sawtooth wave voltage into arbitrary levels and applies it to the signal comparing means 17. The signal comparison means 17 compares the reference signal 14 with the comparison signal 16 and outputs the difference (when the distortion correction is not necessary, the both are made coincident and the output is 0 V) as the distortion correction signal 18. By superimposing this distortion correction signal on the output Vs of the frequency-voltage conversion circuit 7 via the capacitor C, the constant current circuit 8 controls the horizontal phase shift amount in a sawtooth shape, so that the horizontal parallelogram distortion can be improved. To correct the horizontal parallelogram distortion in which the time t is delayed at the upper part of the screen as shown in FIG. 3 and the time t is advanced at the lower part, it is assumed that the screen phase advances when Vs of the phase adjusting circuit rises. If the output 14 of the reference signal generating means 13 is the signal waveform b, the output 16 of the comparison signal generating means 15 is set to be the signal waveform c.
Therefore, the pseudo horizontal sync signal is delayed by time t in the upper part of the screen and advanced by time t in the lower part as after correction in FIG.
The displayed image can be corrected to the normal state. Further, when the horizontal parallelogram distortion is generated in the direction opposite to that shown in FIG. 3, it is obvious that the output 16 of the comparison signal generating means 15 may be set like the signal waveform a.

Next, the screen distortion correction means 1 of one embodiment of the present invention
0 and its peripheral circuits will be described with reference to FIG. The vertical output deflection current of the vertical output circuit 9 is supplied to the capacitor C.
A sawtooth wave voltage proportional to the vertical deflection current is generated in the resistor R1 by flowing it to the resistor R1 via 1. This sawtooth wave voltage is applied to the resistors R2 and R3 and the variable resistor VR,
The signal 14 divided by the resistors R2 and R3 is applied to the-terminal of the comparator (comparator) 19, and the signal 16 divided by the variable resistor VR is applied to the + terminal of the comparator (comparator) 19, respectively. To be done. Suppose that the waveform of the-terminal input (signal 14) of the comparator (comparator) 19 is b of the signal waveform, and the waveform of the + terminal input (signal 16) of the comparator (comparator) 19 is a, b depending on the setting of the variable resistor VR. , C
Then, the output signal (distortion correction signal) 18 of the comparator 19 becomes the signal waveform d, 0 V, e.
By superposing this distortion correction signal 18 on the output Vs of the frequency-voltage conversion circuit 7 via the capacitor C, the constant current circuit 8 controls the horizontal phase shift amount in a sawtooth shape. Therefore, similarly to the above, the display image of horizontal parallelogram distortion can be corrected to a normal state.

[0013]

As described above, according to the present invention,
By superimposing the horizontal parallelogram distortion of the screen on the horizontal phase adjustment circuit with a sawtooth distortion correction signal proportional to the vertical deflection current,
It becomes possible to easily correct. Therefore, no original distortion correction circuit is required.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an embodiment of the present invention.

FIG. 2 is a configuration diagram in an embodiment of the present invention.

FIG. 3 is a waveform diagram of a pseudo horizontal synchronizing signal at each screen position and a screen correction operation according to an embodiment of the present invention.

FIG. 4 is a circuit diagram of an embodiment of the present invention.

FIG. 5 is a diagram showing an example of a system using the present invention.

FIG. 6 is a configuration diagram of a conventional display position adjusting circuit which is a basis of the present invention.

FIG. 7 is a diagram showing an example of signal timing of a conventional display position adjusting circuit which is a basis of the present invention.

FIG. 8 is a diagram showing an example of an image shift operation of a display position adjustment circuit which is the basis of the present invention.

[Explanation of symbols]

1 ... Horizontal sync signal input terminal, 2 ... Delay circuit, 3 ... Sync width control circuit, 4 ... Horizontal AFC circuit, 5 ... Horizontal oscillation circuit, 6
... horizontal output circuit, 7 ... frequency-voltage conversion circuit, 8 ... constant current circuit, 9 ... vertical output circuit, 10 ... screen distortion correction means (part of the present invention), 11 ... current detection means, 12 ... current detection means Output signal, 13 ... Reference signal generating means, 14 ... Output signal of reference signal generating means, 15 ... Comparison signal generating means, 16
... output signal of comparison signal generation means, 17 ... signal comparison means,
18 ... Output signal (distortion correction signal) of the signal comparison means, 19 ...
Comparator, Hs ... Horizontal sync signal, Vs ...
Output voltage (horizontal phase correction voltage) of the frequency-voltage conversion circuit, A ... video signal, B ... input horizontal synchronizing signal waveform, C
... pseudo horizontal synchronizing signal, a to c ... signal waveform (output signal of reference signal generating means, output signal of comparison signal generating means), d,
e ... Signal waveform (output signal of signal comparison means), (a) ... Image before horizontal display position adjustment, (b) ... Image after horizontal display position adjustment.

Claims (2)

[Claims] 1. A horizontal phase adjusting circuit to which a horizontal synchronizing signal and a horizontal phase correcting signal are applied, and an AFC circuit (automatic frequency adjusting circuit) to which a pseudo horizontal synchronizing signal and a horizontal feedback signal output from this circuit are applied. A horizontal output circuit, a vertical output circuit, and screen distortion correction means for converting a sawtooth wave voltage proportional to the vertical deflection current into a distortion correction signal according to the screen geometric distortion, and the horizontal phase correction signal is distorted. A screen distortion correction circuit characterized by superimposing a correction signal. 2. A display comprising the screen distortion correction circuit according to claim 1.