JPH03236092A - On-screen display circuit - Google Patents

Abstract

PURPOSE:To eliminate vertical jitters in an on-screen display by controlling the display position of the on-screen display according to the output of a counter which is rest with the leading edge of a vertical clock pulse and counts horizontal back pulses. CONSTITUTION:An IC for the on-screen display incorporates the counter used exclusively to determine at which line after the vertical back pulse a signal for the on-screen display begins to be outputted, this counter is reset with the vertical back pulse and counts horizontal back pulses, and an R, a G, and a B signal for the on-screen display ad a blanking signal are outputted according to the counted value. The internal counter is reset with the leading edge of the vertical back pulse and counts the horizontal back pulses from this point of time to determine the output timing of a display signal.

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to an on-screen display circuit for performing on-screen display in a color television receiver or the like.

<Prior Art> In general, the on-screen display circuit of a color television receiver uses vertical and horizontal back pulses (vertical and (horizontal blanking pulse) is used instead of the synchronization signal,
Based on these, the output timing of on-screen display signals is controlled.

In other words, it is equipped with a dedicated counter to determine from which line after the vertical back pulse the output of the on-screen display signal should start, and this counter is reset at the falling edge of the vertical back pulse to The back pulses are counted, and the output timing of the on-screen display signal is controlled based on this counted value.

<Problems to be Solved by the Invention> FIG. 3 is an enlarged waveform diagram showing vertical and horizontal back pulses and a portion thereof.

The pulse width of the vertical back pulse shown in Fig. 3 (A) changes depending on variations in the inductance of the deflection coil, the voltage CC, etc. The width of change in the falling edge of the pulse is
The variation may extend to several horizontal back pulses as shown in FIG. 3(C).

Therefore, depending on the product, the timing of the fall of the vertical back pulse, as shown by the solid line in Figure 3 (D), may be almost the same as the timing of the horizontal back pulse shown in Figure 3 (C). In such a case, when the heel current is changed, the pulse width of the vertical back pulse changes slightly as shown by the broken line in FIG. Because the falling part has a slope, the first horizontal back pulse may or may not be counted by the correction counter, and this causes the so-called vertical jitter, which causes blurring of the on-screen display characters. will occur. The present invention has been made in view of the above-mentioned points, and an object of the present invention is to eliminate vertical jitter in on-screen display.

<Means for Solving the Problems> In order to achieve the above-mentioned object, the present invention includes a counter that is reset by a vertical back pulse and counts horizontal back pulses, and an on-screen display based on the output of this counter. In the on-screen display circuit, the counter is reset at the rising edge of the vertical back pulse and counts the horizontal back pulse.

<Function> At the rising timing of the vertical back pulse corresponding to the start timing of the flyback period, the phase relationship between the vertical back pulse and the horizontal back pulse does not change significantly due to variations in the inductance of the deflection coil, and remains constant. Therefore, according to the present invention, which resets the counter at the rising edge of the vertical back pulse, it is possible to prevent the rising timing of the vertical back pulse from becoming the same as the timing of the horizontal back pulse due to fluctuations in the pulse width of the vertical back pulse. This eliminates the need to count or not count horizontal back pulses as in the conventional example, thereby making it possible to eliminate vertical jitter in on-screen display.

<Examples> Examples of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention, and the on-screen display ICI of this embodiment is provided in a color television receiver.

This on-screen display ICI includes a vertical back pulse from a vertical deflection output circuit 2 and a horizontal deflection output circuit 3.
A horizontal backpulse from . Note that 4 is a vertical and horizontal drive circuit.

This ICI for on-screen display has a built-in dedicated counter (not shown) for determining from which line after the vertical back pulse the output of the on-screen display signal should start. is reset with a vertical back pulse, horizontal back pulses are counted, and based on this count, R, G, B signals and a blanking signal for on-screen display are output.

In the on-screen display ICI of this embodiment, in order to eliminate vertical jitter caused by the pulse width of the vertical back pulse, which changes due to variations in the inductance of the deflection coil and the voltage Vcc, a built-in counter is used to control the rise of the vertical back pulse. It is reset at the edge, and from this point the horizontal back pulses are counted to determine the output timing of the screen display signal.

In other words, at the rising timing of the vertical back pulse corresponding to the timing of the start of the retrace period, the timing shown in FIG. 2 (
The phase relationship between the vertical back pulse in A) and the horizontal back pulse in FIG. ), as shown in
The rise timing of the vertical back pulse is shown in Figure 2 (
By designing the timing to be, for example, 1/4 of the IH period of the horizontal back pulse shown in (C), the timing shown in Figure 2 (E) can be set for odd and even fields.
Even if the 1/2H phase is shifted as shown in FIG. 2, the rise timing of the vertical back pulse and the timing of the horizontal back pulse will not become the same.

Therefore, in the present invention, when the timing of the fall of the vertical back pulse becomes almost the same as the timing of the horizontal bank pulse, as in the conventional example where the counter is reset at the fall of the vertical back pulse, the beam current The change in the counter will not cause the counter to count or not count the first horizontal backpulse, causing vertical jitter.

In addition, the timing of the rise of the vertical back pulse is
It may be designed so that the timing is 3/4 of the IH period of the horizontal back pulse.
In order to have a timing of 1/4 or 3/4 of the period, the vertical back pulse may be delayed using an integrating circuit or the like.

Note that when the vertical back pulse is inverted and used, the counter is of course reset at the falling edge of the inverted vertical back pulse.

<Effects of the Invention> As described above, according to the present invention, the display position of the on-screen display is controlled based on the output of the counter that is reset at the rising edge of the vertical back pulse and counts the horizontal back pulse. Therefore, even if the pulse width of the vertical back pulse changes due to variations in the inductance of the deflection coil, the counter will not count or not count the first horizontal back pulse.
Vertical jitter in on-screen display can be eliminated.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a signal waveform diagram for explaining operation, and FIG. 3 is a waveform diagram of a conventional example. 1... On-screen display IC, 2... Vertical deflection output circuit, 3... Horizontal deflection output circuit.

Claims (1)

[Claims] (1) An on-screen display circuit that includes a counter that is reset by a vertical back pulse and counts horizontal back pulses, and controls the output timing of an on-screen display signal based on the output of this counter, wherein the counter is An on-screen display circuit, characterized in that it is reset at the rising edge of a vertical back pulse and counts the horizontal back pulse.