JPH06342818A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH06342818A
JPH06342818A JP13185793A JP13185793A JPH06342818A JP H06342818 A JPH06342818 A JP H06342818A JP 13185793 A JP13185793 A JP 13185793A JP 13185793 A JP13185793 A JP 13185793A JP H06342818 A JPH06342818 A JP H06342818A
Authority
JP
Japan
Prior art keywords
semiconductor
pellet
pellets
diode
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13185793A
Other languages
Japanese (ja)
Inventor
Yoshinori Murata
義則 村田
Masahito Mitsui
昌仁 三井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP13185793A priority Critical patent/JPH06342818A/en
Publication of JPH06342818A publication Critical patent/JPH06342818A/en
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
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    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
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    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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Abstract

PURPOSE:To reduce the number of manufacturing processes and to make the packaging density higher at the same time, when a plurality of semiconductor elements are packaged in an electronic apparatus in a desired connected condition. CONSTITUTION:Concerning the molding construction of the semiconductor device, the surface electrode 1B of one 1 of two semiconductor pellets 1 and 2 packaged on headers 3A and 5A at the end parts of lead frames 3 and 5, is directly connected electrically to the surface electrode 2A of the other semiconductor pellet 2 with a bonding wire 7. On that occasion, second bonding processing is performed to the second semiconductor pellet 2 where a junction diode D3 whose strength against external pressure is comparatively high is formed. Accordingly, it becomes possible to connect the two pellets 1 and 2 electrically with the bonding wire 7 without damaging the diode D3 of the said pellet 2.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【産業上の利用分野】本発明は、半導体技術さらには複
数の半導体ペレットが１つのモールド構造にて封止され
た半導体装置に適用して特に有効な技術に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor technology, and more particularly to a technology which is particularly effective when applied to a semiconductor device in which a plurality of semiconductor pellets are sealed in a single mold structure.

【０００２】[0002]

【従来の技術】ダイオード等のディスクリートの半導体
装置を、複数個互いに接続させて所望の回路構成を達成
する方法としては、各々パッケージにモールドされた半
導体装置を、実装基板（プリント基板）上に搭載し、該
基板上でプリント配線にて互いのリード端子を導電接続
させる方法が用いられている。しかし、別々にパッケー
ジされた半導体装置を基板上で接続させた場合、その実
装密度が低下するため、従来より、１つのペレットに、
複数の素子を形成して、所望の回路構成を得つつその実
装密度を高める半導体集積回路装置が提供されていた。2. Description of the Related Art As a method of connecting a plurality of discrete semiconductor devices such as diodes to each other to achieve a desired circuit configuration, the semiconductor devices molded in respective packages are mounted on a mounting board (printed board). Then, a method of conductively connecting the lead terminals to each other by printed wiring on the substrate is used. However, when the semiconductor devices packaged separately are connected on the substrate, the mounting density of the semiconductor devices is reduced.
There has been provided a semiconductor integrated circuit device in which a plurality of elements are formed and a desired circuit configuration is obtained while increasing the packaging density.

【０００３】[0003]

【発明が解決しようとする課題】しかしながら、上記の
ように１つの半導体ペレットに複数の半導体素子を形成
する場合、その製造に複雑な拡散処理を施す必要があ
り、プロセスが複雑化して製造コストの上昇を招く。However, in the case of forming a plurality of semiconductor elements on one semiconductor pellet as described above, it is necessary to perform a complicated diffusion process for the production thereof, which complicates the process and increases the manufacturing cost. Cause rise.

【０００４】本発明は、かかる事情に鑑みてなされたも
ので、２以上の半導体素子を所望の接続状態で電子機器
に実装するにあたり、その製造工程数の低減、実装密度
の向上を同時に達成することができる半導体装置を提供
することをその主たる目的とする。この発明の前記なら
びにそのほかの目的と新規な特徴については、本明細書
の記述および添附図面から明らかになるであろう。The present invention has been made in view of the above circumstances, and when mounting two or more semiconductor elements in an electronic device in a desired connection state, simultaneously reduces the number of manufacturing steps and improves the mounting density. The main object of the present invention is to provide a semiconductor device that can be manufactured. The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

【課題を解決するための手段】本願において開示される
発明のうち代表的なものの概要を説明すれば、下記のと
おりである。即ち、本発明の半導体装置では、リードフ
レームの複数のリード端子の端部に夫々半導体ペレット
を搭載させ、これらの半導体ペレットのうち、一つの半
導体ペレットの表面電極を、他の半導体ペレットの表面
電極に、ボンディングワイヤにて直接導電接続させ、こ
れを単一の樹脂モールドで封止するようにした。The typical ones of the inventions disclosed in the present application will be outlined below. That is, in the semiconductor device of the present invention, the semiconductor pellets are mounted on the end portions of the lead terminals of the lead frame, respectively, and of these semiconductor pellets, the surface electrode of one of the semiconductor pellets is the surface electrode of the other semiconductor pellet. Directly conductively connected with a bonding wire and then sealed with a single resin mold.

【０００５】[0005]

【作用】上記手段によれば、互いにボンディングワイヤ
にて接続される２つのペレットのうち、一方を、接合形
ダイオード，抵抗素子等、そのパッド部分が比較的外力
に強い素子が形成されたペレットとすれば、ボンディン
グ工程において該ペレットに第２ボンディング処理を施
すことにより、当該素子の破壊等を生じせることなく、
２つのペレットを導電接続させることができる。According to the above-mentioned means, one of the two pellets connected to each other by the bonding wire is a pellet having a pad portion such as a junction diode, a resistance element or the like relatively strong against external force. Then, by subjecting the pellets to the second bonding process in the bonding step, it is possible to prevent the element from being broken or the like.
The two pellets can be conductively connected.

【０００６】[0006]

【実施例】以下、本発明の一実施例を添付図面を参照し
て説明する。図１は、本実施例の半導体装置のモールド
構造を示す平面図であり、図２は図１のII−II線に沿っ
た断面図である。図１，図２に示すように、リードフレ
ームは３つのリード電極３，４，５を具え、このうちリ
ード電極３の端部にヘッダ（主面）３Ａが設けられ、こ
こに第１の半導体ペレット１が搭載され、リード電極５
の端部にヘッダ（主面）５Ａが設けられ、ここに第２の
半導体ペレット２が搭載されている。又、第１のペレッ
ト１に形成された２つの表面電極１Ａ，１Ｂのうち電極
１Ａが、例えば金線（Ａｕ）からなるボンディングワイ
ヤ６によってリード電極４の電極部４Ａに導電接続さ
れ、表面電極１Ｂがボンディングワイヤ７によって第２
のペレット２の表面電極２Ａに導電接続されている。
尚、これらの構造は、樹脂モールド８にて封止されてい
る。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the accompanying drawings. 1 is a plan view showing a mold structure of a semiconductor device of this embodiment, and FIG. 2 is a sectional view taken along line II-II of FIG. As shown in FIGS. 1 and 2, the lead frame has three lead electrodes 3, 4, and 5, of which a header (main surface) 3A is provided at an end of the lead electrode 3, and the first semiconductor is provided there. Pellet 1 is mounted and lead electrode 5
A header (main surface) 5A is provided at the end of the, and the second semiconductor pellet 2 is mounted there. Further, the electrode 1A of the two surface electrodes 1A and 1B formed on the first pellet 1 is conductively connected to the electrode portion 4A of the lead electrode 4 by the bonding wire 6 made of, for example, a gold wire (Au). 1B is bonded by the bonding wire 7
Is electrically connected to the surface electrode 2A of the pellet 2.
Incidentally, these structures are sealed with a resin mold 8.

【０００７】ところで、上記第１の半導体ペレット１に
は、その内部にショットキー・バリア・ダイオードＤ1
と接合形ダイオードＤ2が形成され（図３）、これら２
つのダイオードＤ1，Ｄ2はそのカソードが当該ペレット
１の底面に形成されている下部電極１Ｃに共通接続され
る。この下部電極１Ｃは、図２に示すように、リード電
極３のヘッダ３Ａに導電性のロウ材９ａにて接着されて
いる。By the way, the first semiconductor pellet 1 has a Schottky barrier diode D 1 inside.
And a junction diode D 2 is formed (FIG. 3) and these two
The cathodes of the two diodes D 1 and D 2 are commonly connected to the lower electrode 1C formed on the bottom surface of the pellet 1. As shown in FIG. 2, the lower electrode 1C is adhered to the header 3A of the lead electrode 3 with a conductive brazing material 9a.

【０００８】上記ショットキー・ダイオードＤ1は、図
１，図２に示すように、ショットキー接合面上のパッド
（アノード電極）１Ａに、ボンディングワイヤ６の一端
が第１ボンディング処理にて接続されている。そして、
当該ボンディングワイヤの他端が第２ボンディング処理
にて電極部４Ａに接続されて、該ダイオードＤ1のアノ
ードがリード電極４に導電接続されている。又、接合形
ダイオードＤ2は、ｐｎ接合面上のパッド（アノード電
極）１Ｂに、ボンディングワイヤ７の一端７ａが第１ボ
ンディング処理にて接続されている。そして、該ボンデ
ィングワイヤ７の他端７ｂが、第２の半導体ペレット２
のｐｎ接合面上のパッド（カソード電極）２Ａに第２ボ
ンディング処理にて接続されている。As shown in FIGS. 1 and 2, the Schottky diode D 1 has one end of the bonding wire 6 connected to the pad (anode electrode) 1A on the Schottky junction surface by the first bonding process. ing. And
The other end of the bonding wire is connected to the electrode portion 4A by the second bonding process, and the anode of the diode D 1 is conductively connected to the lead electrode 4. In the junction diode D 2 , one end 7a of the bonding wire 7 is connected to the pad (anode electrode) 1B on the pn junction surface by the first bonding process. The other end 7b of the bonding wire 7 is connected to the second semiconductor pellet 2
Is connected to the pad (cathode electrode) 2A on the pn junction surface by the second bonding process.

【０００９】一方、上記第２の半導体ペレット２には接
合形ダイオードＤ3が形成され、カソード電極をなすパ
ッド２Ａには、上記のように、ボンディングワイヤ７が
接続され、アノードを構成する下部電極面２Ｃが、リー
ド電極のヘッダ５Ａに導電性のロウ材９ｂにて接着され
ている。このような接続状態をとることにより、図３の
回路構成が１つのモールド構造内で達成される。On the other hand, the junction type diode D 3 is formed on the second semiconductor pellet 2, and the bonding wire 7 is connected to the pad 2A forming the cathode electrode as described above, and the lower electrode forming the anode. The surface 2C is bonded to the header 5A of the lead electrode with a conductive brazing material 9b. By taking such a connection state, the circuit configuration of FIG. 3 is achieved in one mold structure.

【００１０】ところで、上記のように２つの半導体ペレ
ット１，２のパッド１Ｂ，２Ａを互いにボンディングワ
イヤ７にて導電接続させるに当っては、ボンディング時
に比較的大きな加重のかかる第２ボンディング処理を、
第２のペレット２のパッド２Ａに対して行うようにして
いるが、これは、ｐｎ接合形ダイオード（Ｄ3）ではパ
ッド下のｐｎ接合面を深くすることによりその強度を高
めることが容易であることに鑑みたもので、これにより
該素子を第２ボンディング処理に耐え得る構成とするこ
とができる旨が本発明者らによって確認された。尚、第
２ボンディング時の応力等を所定の範囲内で弱めること
によって、その素子を破壊することなくそのボンディン
グの接続強度を確保することができる旨も確認された。
即ち、本実施例では第２ボンディング処理を行なう際、
その加重を、従来一般的に行われている大きさの約２／
３程度に低減させることにより、その素子（この場合、
ｐｎ接合面）に影響を与えることなく、所望の接続強度
のボンディングを行うことができる。又、このボンディ
ングを超音波振動を用いて行うのであれば、その振動の
強度（振幅）を１／３程度にすればよい。又、このとき
の加重を上記のように２／３程度に低減させれば、当該
素子への影響を更に抑えて第２ボンディングを行うこと
ができる。尚、本実施例では第２ボンディングが行われ
るパッド２Ａは、その面積が２００μｍ×２００μｍ程
度とされる。By the way, when the pads 1B and 2A of the two semiconductor pellets 1 and 2A are conductively connected to each other by the bonding wire 7 as described above, the second bonding process, in which a relatively large weight is applied during bonding, is used.
This is done for the pad 2A of the second pellet 2, but this is easy to increase the strength of the pn junction diode (D 3 ) by deepening the pn junction surface under the pad. In view of the above, it was confirmed by the present inventors that this makes it possible to make the device capable of withstanding the second bonding process. It was also confirmed that by weakening the stress or the like during the second bonding within a predetermined range, the bonding strength of the bonding can be secured without destroying the element.
That is, in this embodiment, when performing the second bonding process,
The weight is about 2 / of the size generally used in the past.
By reducing the element to about 3 (in this case,
Bonding with a desired connection strength can be performed without affecting the pn junction surface). If this bonding is performed using ultrasonic vibration, the strength (amplitude) of the vibration may be set to about 1/3. Further, if the weight at this time is reduced to about ⅔ as described above, the second bonding can be performed while further suppressing the influence on the element. In the present embodiment, the pad 2A to be secondly bonded has an area of about 200 μm × 200 μm.

【００１１】上記した構造は、例えば図４に示す、ＬＳ
Ｉの電源切替回路部１１を構成する場合に特に有効であ
る。即ち、この電源切替回路１１にあっては、所望の電
圧特性を有するダイオードを、既存の３種類のダイオー
ドＳＷ1，ＳＷ2，ＳＢを同図に示すように互いに接続さ
せて得るようにしてる。この方法は、単一のペレットで
当該特性を達成する新たなダイオード素子を開発，製造
するのに比べ、簡易で、製造コストも易くできる。しか
し、上記３種類のダイオードを、パッケージされた状態
で、基板上で互いに接続するのではその実装効率が悪
い。そこで、上記３種類のダイオードが形成された半導
体ペレットを、本実施例のモールド構造で封止すれば
（ＳＢ＝Ｄ1，ＳＷ1＝Ｄ3，ＳＷ2＝Ｄ2）、安価なダイ
オードを、ペレット状態で適宜組み合わせるだけで、所
望の特性の回路が適宜提供され、しかもその実装効率を
向上させると云う優れた効果が得られる。The above-mentioned structure has an LS, for example, shown in FIG.
This is particularly effective when configuring the I power supply switching circuit section 11. That is, in the power supply switching circuit 11, a diode having a desired voltage characteristic is obtained by connecting the existing three types of diodes SW 1 , SW 2 and SB to each other as shown in FIG. This method is simpler and more cost-effective than developing and manufacturing a new diode element that achieves the characteristics with a single pellet. However, if the above three types of diodes are packaged and connected to each other on the substrate, the mounting efficiency is poor. Therefore, if the semiconductor pellet on which the above-mentioned three types of diodes are formed is sealed with the mold structure of this embodiment (SB = D 1 , SW 1 = D 3 , SW 2 = D 2 ), an inexpensive diode is obtained. By simply combining in a pellet state, a circuit having desired characteristics can be appropriately provided, and an excellent effect of improving the mounting efficiency can be obtained.

【００１２】図５〜図８は、上記モールド構造を、他の
回路構成に用いた第１，第２の変形例を示す平面図及び
その回路構成を示す説明図である。このうち図５，図６
は、ダイオードが形成された２つの半導体ペレット２
１，２２を互いのパッド２１Ａ，２２Ａ（カソード電
極）をボンディングワイヤ２７にて導電接続させた半導
体装置２０を示す。尚、上記２つのダイオードがツェナ
ーダイオードであるならば、目的のツェナー電圧の半導
体ペレットを選択することにより容易に所望の双方向ツ
ェナーダイオードを得ることができる。尚、半導体ペレ
ット２１，２２内のダイオードＤ4-1，Ｄ4-2のアノード
電極は夫々当該ペレットの下面に形成され、これらアノ
ード電極はリード電極２３，２５に夫々導電接続されて
いる。尚、図中２８はこれらを封止する樹脂モールドを
示す。FIGS. 5 to 8 are plan views showing the first and second modified examples in which the above mold structure is used for other circuit configurations, and an explanatory diagram showing the circuit configuration thereof. Of these, Figures 5 and 6
Are two semiconductor pellets 2 each having a diode formed therein.
1 shows a semiconductor device 20 in which pads 21A and 22A (cathode electrodes) of 1 and 22 are conductively connected by a bonding wire 27. If the two diodes are Zener diodes, a desired bidirectional Zener diode can be easily obtained by selecting a semiconductor pellet having a desired Zener voltage. The anode electrodes of the diodes D 4-1 and D 4-2 in the semiconductor pellets 21 and 22 are formed on the lower surface of the pellets, and these anode electrodes are conductively connected to the lead electrodes 23 and 25, respectively. In the figure, 28 indicates a resin mold for sealing these.

【００１３】図７，図８は、本実施例の第２の変形例、
即ち、ダイオードＤ5が形成された半導体ペレット３１
と、抵抗素子Ｒが形成された半導体ペレット３２とを１
つのモールド構造内に封止した半導体装置３０の平面
図、及びその回路構成を示す説明図である。この場合に
は、抵抗Ｒが形成されている側のペレット３２の強度が
高いため、当該ペレット３２の電極部３２Ａとダイオー
ドのアノード電極３１Ａをボンディングワイヤ３７にて
接続する際に、第２ボンディング処理を電極部３２Ａに
対して行なうようにしている。尚、半導体ペレット３
１，３２の夫々の他の電極は、当該ペレットの夫々の下
面に形成され、これらはリード電極３３，３５に夫々導
電接続されている。尚、図中３８はこれらを封止する樹
脂モールドを示す。FIGS. 7 and 8 show a second modification of this embodiment,
That is, the semiconductor pellet 31 on which the diode D 5 is formed
And the semiconductor pellet 32 on which the resistance element R is formed
It is the top view of semiconductor device 30 sealed in one mold structure, and the explanatory view showing the circuit composition. In this case, since the strength of the pellet 32 on the side where the resistance R is formed is high, the second bonding process is performed when connecting the electrode portion 32A of the pellet 32 and the anode electrode 31A of the diode with the bonding wire 37. Is performed on the electrode portion 32A. Semiconductor pellet 3
The other electrodes of 1 and 32 are respectively formed on the lower surface of the pellet, and these are electrically conductively connected to the lead electrodes 33 and 35, respectively. Incidentally, reference numeral 38 in the figure denotes a resin mold for sealing them.

【００１４】以上説明したように、本実施例の半導体ペ
レットのモールド構造では、リードフレームの端部に形
成されたヘッダ（主面）に搭載されている２つの半導体
ペレット１，２のうち、一方の半導体ペレット１の表面
電極１Ｂを、他方の半導体ペレット２の表面電極２Ａ
に、ボンディングワイヤにて直接導電接続させる際に、
第２ボンディング処理を、外圧に対する強度が比較的高
い、接合形ダイオードが形成された第２の半導体ペレッ
トに対して行うようにしているので、当該ペレットの素
子破壊を生じせることなく、２つのペレットを１のボン
ディングワイヤで導電接続させることができる。As described above, in the semiconductor pellet mold structure of this embodiment, one of the two semiconductor pellets 1 and 2 mounted on the header (main surface) formed at the end of the lead frame is used. Surface electrode 1B of the other semiconductor pellet 1 and surface electrode 2A of the other semiconductor pellet 2
When making a direct conductive connection with a bonding wire,
Since the second bonding process is performed on the second semiconductor pellet on which the junction diode is formed, which has a relatively high strength against external pressure, the two pellets are not broken and the two pellets are not destroyed. Can be conductively connected with one bonding wire.

【００１５】以上本発明者によってなされた発明を実施
例に基づき具体的に説明したが、本発明は上記実施例に
限定されるものではなく、その要旨を逸脱しない範囲で
種々変更可能であることはいうまでもない。例えば、上
記実施例では、ダイオード、抵抗素子が形成された２つ
の半導体ペレットを１つのモールド構造にて封止する例
について説明したが、他の半導体素子が形成されている
半導体ペレットを封止する場合にも、本発明は適用可能
である。又、上記実施例では、２つの半導体ペレットを
互いに導電接続させる例について説明したが、３つ以上
のペレットを封止する場合にも、本発明は適用可能であ
る。又、本実施例では金線からなるボンディングワイヤ
を用いたが、アルミ、銅等の細線からなるワイヤを用い
てもよい。Although the invention made by the present inventor has been specifically described based on the embodiments, the invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Needless to say. For example, in the above-described embodiment, an example in which two semiconductor pellets on which diodes and resistance elements are formed is sealed with one mold structure has been described, but a semiconductor pellet on which another semiconductor element is formed is sealed. In this case, the present invention is applicable. Further, in the above embodiment, an example in which two semiconductor pellets are conductively connected to each other has been described, but the present invention can be applied to the case where three or more pellets are sealed. Although the bonding wire made of a gold wire is used in this embodiment, a wire made of a thin wire such as aluminum or copper may be used.

【００１６】以上の説明では主として本発明者によって
なされた発明をその背景となった利用分野である単体の
素子が形成された半導体ペレットの封止技術に適用した
場合について説明したが、この発明はそれに限定される
ものでなく、ＬＳＩ等、他の半導体装置のモールド構造
一般に利用することができる。In the above description, the invention made by the present inventor was mainly applied to the technology of encapsulating a semiconductor pellet on which a single element is formed, which is the field of application of the invention. The present invention is not limited to this, and can be used for general mold structures of other semiconductor devices such as LSI.

【００１７】[0017]

【発明の効果】本願において開示される発明のうち代表
的なものによって得られる効果を簡単に説明すれば下記
のとおりである。すなわち、所望の回路構成を、既存の
半導体素子が形成された半導体ペレットを、１つのモー
ルド構造内で組合せるだけで容易に達成でき、且つ、そ
の実装密度を高め、実装にかかるコストの低減も図られ
るようになる。The effects obtained by the representative one of the inventions disclosed in the present application will be briefly described as follows. In other words, the desired circuit configuration can be easily achieved by simply combining the semiconductor pellets on which the existing semiconductor elements are formed in one molding structure, and the mounting density can be increased and the cost required for mounting can be reduced. It will be planned.

【図面の簡単な説明】[Brief description of drawings]

【図１】本実施例の半導体装置のモールド構造を示す平
面図である。FIG. 1 is a plan view showing a mold structure of a semiconductor device of this embodiment.

【図２】図１のII−II線に沿った断面図である。FIG. 2 is a sectional view taken along line II-II of FIG.

【図３】第１の半導体ペレットのダイオードＤ1，Ｄ2と
第２のペレットのダイオードＤ3との接続状態を示す回
路図である。FIG. 3 is a circuit diagram showing a connection state between diodes D 1 and D 2 of a first semiconductor pellet and a diode D 3 of a second pellet.

【図４】本実施例の構造が適用される、ＬＳＩの電源切
替回路部１１を示す回路図である。FIG. 4 is a circuit diagram showing a power supply switching circuit unit 11 of an LSI to which the structure of this embodiment is applied.

【図５】ダイオードＤと抵抗素子Ｒが形成された半導体
ペレット３１，３２を１つのモールド構造内に封止した
第２の変形例を示す平面図である。FIG. 5 is a plan view showing a second modified example in which semiconductor pellets 31 and 32 in which a diode D and a resistance element R are formed are sealed in one mold structure.

【図６】上記第１の変形例の回路構成を示す説明図であ
る。FIG. 6 is an explanatory diagram showing a circuit configuration of the first modified example.

【図７】ダイオードＤ5と抵抗素子Ｒが形成された半導
体ペレット３１，３２を１つのモールド構造内に封止し
た第２の変形例を示す平面図である。FIG. 7 is a plan view showing a second modification in which the semiconductor pellets 31 and 32 in which the diode D 5 and the resistance element R are formed are sealed in one mold structure.

【図８】上記第２の変形例の回路構成を示す説明図であ
る。FIG. 8 is an explanatory diagram showing a circuit configuration of the second modified example.

【符号の説明】[Explanation of symbols]

１ 第１の半導体ペレット ２ 第２の半導体ペレット ３，４，５ リード電極 ３Ａ，５Ａ ヘッダ（主面） ７ ボンディングワイヤ ７ａ 第１ボンディング処理が行われる端部 ７ｂ 第２ボンディング処理が行われる端部 Ｄ1，Ｄ2，Ｄ3，Ｄ4-1，Ｄ4-2 ダイオードDESCRIPTION OF SYMBOLS 1 1st semiconductor pellet 2 2nd semiconductor pellet 3,4,5 Lead electrode 3A, 5A Header (main surface) 7 Bonding wire 7a End part where 1st bonding process is performed 7b End part where 2nd bonding process is performed D 1 , D 2 , D 3 , D 4-1 , D 4-2 diode

Claims (3)

【特許請求の範囲】[Claims] 【請求項１】 リードフレームの主面に２以上の半導体
ペレットが搭載された半導体装置において、少なくとも
１つの半導体ペレットの表面に形成された電極が、他の
半導体ペレットの表面に形成された電極にボンディング
ワイヤにて導電接続されていることを特徴とする半導体
装置。1. In a semiconductor device in which two or more semiconductor pellets are mounted on a main surface of a lead frame, an electrode formed on the surface of at least one semiconductor pellet is an electrode formed on the surface of another semiconductor pellet. A semiconductor device, which is electrically connected by a bonding wire. 【請求項２】 上記２以上の半導体ペレットのうち少な
くとも１つの半導体ペレットに接合形ダイオードが形成
されている場合に、複数の上記電極のうち少なくとも第
２ボンディング処理にてボンディングワイヤが接続され
る電極は、当該接合形ダイオードのアノード電極又はカ
ソード電極であることを特徴とする請求項１に記載の半
導体装置。2. An electrode to which a bonding wire is connected in at least a second bonding process among the plurality of electrodes when a junction diode is formed on at least one semiconductor pellet of the two or more semiconductor pellets. The semiconductor device according to claim 1, wherein is an anode electrode or a cathode electrode of the junction diode. 【請求項３】 上記２以上の半導体ペレットの少なくと
も１つの半導体ペレットには互いのカソードが共通接続
された２つのダイオードが設けられ、他の１つの半導体
ペレットには１つのダイオードが設けられ、該ダイオー
ドのカソードが、上記２つのダイオードの何れか一方の
アノードに、上記ボンディングワイヤにて接続されてい
ることを特徴とする請求項１又は２に記載の半導体装
置。3. At least one semiconductor pellet of the two or more semiconductor pellets is provided with two diodes whose cathodes are commonly connected, and another semiconductor pellet is provided with one diode. 3. The semiconductor device according to claim 1, wherein the cathode of the diode is connected to the anode of either one of the two diodes with the bonding wire.
JP13185793A 1993-06-02 1993-06-02 Semiconductor device Pending JPH06342818A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13185793A JPH06342818A (en) 1993-06-02 1993-06-02 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13185793A JPH06342818A (en) 1993-06-02 1993-06-02 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH06342818A true JPH06342818A (en) 1994-12-13

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Application Number Title Priority Date Filing Date
JP13185793A Pending JPH06342818A (en) 1993-06-02 1993-06-02 Semiconductor device

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6563203B2 (en) * 1999-12-07 2003-05-13 Rohm Co., Ltd. Motor driving device
JP2007109998A (en) * 2005-10-17 2007-04-26 Omron Corp Sensor device
EP3018710A1 (en) * 2014-11-10 2016-05-11 Nxp B.V. Arrangement of semiconductor dies

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6563203B2 (en) * 1999-12-07 2003-05-13 Rohm Co., Ltd. Motor driving device
JP2007109998A (en) * 2005-10-17 2007-04-26 Omron Corp Sensor device
EP3018710A1 (en) * 2014-11-10 2016-05-11 Nxp B.V. Arrangement of semiconductor dies
US9685396B2 (en) 2014-11-10 2017-06-20 Nxp B.V. Semiconductor die arrangement

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