JP2001291818A - Semiconductor device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem that coping with a multifunctional semiconductor device, coping with a future diversified semiconductor component, reducing the number of components in a mounting device, and coping with miniaturization and weight reduction of an electronic apparatus which are caused by reducing the number of components are impossible, in the case of one-chip structure. SOLUTION: This semiconductor device is provided with a second semiconductor element 10 connected with a first semiconductor element 8 via bump electrodes 9, and a fourth semiconductor element 13 connected with a third semiconductor element 11 via bump electrodes 12. The bottom surface of the first element 8 and the bottom surface of the third element 11 are bonded to each other by using an adhesive member 14, form a lamination structure, and are mounted on an insulating substrate 15 and connected electrically with each other by using metal thin wires 17. The upper part of the substrate 15 is sealed with epoxy based insulating sealing resin 18. By this structure, multifunction due to multichip structure is realized, and a high density packaging type semiconductor device can be realized.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multifunctional semiconductor device having a plurality of semiconductor elements in a single package and a method of manufacturing the same, and more particularly to a multifunctional stacked semiconductor device having three or more chips and a multifunctional semiconductor device. It relates to a manufacturing method.

[0002]

2. Description of the Related Art A conventional semiconductor device uses a microcomputer chip as a semiconductor element, is bonded to the upper surface of a semiconductor carrier as a support by flip-chip mounting, and is filled with a sealing resin to seal a gap. A semiconductor device with a higher density has been realized.

Hereinafter, the structure of a conventional semiconductor device will be described with reference to the drawings. FIG. 25 is a sectional view showing a conventional semiconductor device.

[0005] As shown in FIG. 25, a semiconductor element (microcomputer chip or the like) 2 having bumps 1 formed on electrode pads (not shown) on the surface as projecting electrodes is placed on a support body with its main surface side down. Is bonded to a semiconductor carrier 3 formed of a multilayer circuit board using ceramic as an insulating base. The bumps 1 formed on the semiconductor element 2 and the plurality of electrodes 4 on the semiconductor carrier 3 are joined by solder or a conductive adhesive 5. The gap between the bonded semiconductor element 2 and the semiconductor carrier 3 is filled and covered with an insulating epoxy-based sealing resin 6.

The semiconductor carrier 3 has external terminals 7 on its back surface, and the electrodes 4 and the external terminals 7 are internally connected to each other by vias (not shown) formed in the semiconductor carrier 3. It is a wiring board.

[0006]

However, the structure of the conventional semiconductor device has a one-chip structure, and cannot cope with a multifunctional semiconductor device demanded in recent years. In other words, since it has a one-package-one-chip structure, it can fulfill only one function, and it can respond to diversifying semiconductor device components in the future, reduce the number of components in mounting devices, and thereby reduce the size and weight of electronic devices. There was a problem that it could not cope with.

SUMMARY OF THE INVENTION The present invention solves the above-mentioned conventional problems. In order to realize a plurality of functions in one package, a plurality of semiconductor elements are three-dimensionally mounted, and a high-density semiconductor device and the semiconductor device are provided. It is intended to provide a manufacturing method.

[0008]

In order to solve the above-mentioned problems, a semiconductor device according to the present invention comprises at least a first semiconductor element, a third semiconductor element, and a main surface of the third semiconductor element. And a fourth semiconductor element whose main surface is connected to the third semiconductor element via an electrode.
The bottom surface of the semiconductor element and the bottom surface of the third semiconductor element are bonded to form a laminated structure, and the main surface of the first semiconductor element and an insulating substrate are connected via a bump electrode, A semiconductor device in which a main surface of a third semiconductor element and an upper surface of the insulating substrate are electrically connected by a thin metal wire.

Further, the semiconductor device of the present invention has at least
A first semiconductor element, a second semiconductor element on a main surface of the first semiconductor element, the main surface of which is connected to the first semiconductor element via an electrode; and a third semiconductor element. When,
A fourth semiconductor element on a main surface of the third semiconductor element, the main surface of which is connected to the third semiconductor element via an electrode; and a bottom surface of the first semiconductor element. The bottom surface of the third semiconductor element is adhered to form a laminated structure, and the main surface of the first semiconductor element and the insulating substrate are connected via a bump electrode. A semiconductor device in which a main surface and an upper surface of the insulating substrate are electrically connected by a thin metal wire.

[0010] The semiconductor device of the present invention comprises at least
A first semiconductor element, a second semiconductor element on a main surface of the first semiconductor element, the main surface of which is connected to the first semiconductor element via a bump electrode, and a third semiconductor element. An element and the third semiconductor element on a main surface of the third semiconductor element.
And a fourth semiconductor element whose main surface is connected via a bump electrode, wherein the bottom surface of the first semiconductor element and the bottom surface of the third semiconductor element are bonded to each other to form a laminated structure. And the main surface of the first semiconductor element and the insulating substrate are connected via a bump electrode, and the main surface of the third semiconductor element and the upper surface of the insulating substrate are electrically connected by a thin metal wire. Semiconductor device.

Specifically, it is a semiconductor device in which the upper surface of an insulating substrate is sealed with a sealing resin.

Further, the semiconductor device of the present invention has at least
A first semiconductor element, a second semiconductor element on the main surface of the first semiconductor element, the main surface of which is connected to the first semiconductor element by a bump electrode via a resin via a resin; And a fourth semiconductor element on a main surface of the third semiconductor element, the main surface of which is connected to the third semiconductor element by a bump electrode via a resin. The bottom surface of the first semiconductor element and the bottom surface of the third semiconductor element are bonded to form a laminated structure, and the main surface of the first semiconductor element and the insulating substrate are connected via a bump electrode. A semiconductor device in which a main surface of the third semiconductor element and an upper surface of the insulating substrate are electrically connected to each other by a thin metal wire, and an upper surface of the insulating substrate is sealed with a sealing resin.

Specifically, the semiconductor device has a structure in which the upper surface of the insulating substrate has a concave portion, and the second semiconductor element is housed in the concave portion.

The height of the bump electrode connecting the main surface of the first semiconductor element and the insulating substrate is equal to the height of the upper surface of the second semiconductor element connected to the first semiconductor element by the bump electrode. The semiconductor device is higher than the height.

The insulative substrate is a semiconductor carrier having a circuit configuration. The insulative substrate has a plurality of electrodes and a wiring pattern on an upper surface thereof, and has an outer electrode electrically connected to the electrodes on a lower surface thereof. Semiconductor device.

The size of the electrode connecting the first semiconductor element and the second semiconductor element and the size of the electrode connecting the third semiconductor element and the fourth semiconductor element are the same as those of the first semiconductor element and the third semiconductor element. The semiconductor device is smaller than a size of an electrode for connecting the semiconductor element to the insulating substrate.

Some of the signals transmitted between the electrodes where the first and second semiconductor elements are connected and between the electrodes where the third and fourth semiconductor elements are connected are: A semiconductor device having a higher speed than a signal transmitted between an electrode of a first semiconductor element and an electrode of an insulating substrate and between an electrode of a third semiconductor element and an electrode of an insulating substrate.

According to the method of manufacturing a semiconductor device of the present invention, a step of forming a bump electrode on an electrode on an upper surface of a first semiconductor element and a step of forming a bump electrode on an electrode on an upper surface of a third semiconductor element are performed. Connect the electrodes to the electrodes on the upper surface via bumps,
For the step of forming a laminate, and for the electrode of the insulating substrate,
Connecting the bump electrodes on the top surface of the first semiconductor element and mounting the first semiconductor element on an insulating substrate; and bonding the laminate to the bottom surface of the first semiconductor element. Electrically connecting a third semiconductor element forming the laminate and the insulating substrate with a thin metal wire; and forming the first semiconductor element and the insulating substrate on which the laminate is mounted. And a step of sealing the upper surface so as to cover them with a sealing resin.

In the method of manufacturing a semiconductor device according to the present invention, the electrode on the upper surface of the first semiconductor element is connected to the electrode on the upper surface of the second semiconductor element via a bump, and A first step of forming a first laminate by forming another bump electrode on an electrode on the upper surface of the element; and a step of forming an electrode on the upper surface of the fourth semiconductor element with respect to the electrode on the upper surface of the third semiconductor element. A second step of connecting electrodes via bumps to form a second stacked body, and a step of forming an upper surface of the first semiconductor element forming the first stacked body with respect to the electrodes of the insulating substrate. A third step of connecting bump electrodes and mounting the first laminate on the insulating substrate; and a first step of forming the first laminate.
A fourth step of bonding the formed second stacked body to the bottom surface of the semiconductor element, and connecting the third semiconductor element forming the second stacked body and the insulating substrate to a thin metal wire. A fifth step of electrically connecting the first laminate and the second
And sealing the upper surface of the insulating substrate on which the laminated body is mounted with a sealing resin so as to cover them.

Further, in the method of manufacturing a semiconductor device according to the present invention, each of the first semiconductor elements on which a plurality of first semiconductor elements are formed is formed.
An electrode on the upper surface of the semiconductor element is connected to an electrode on the upper surface of the second semiconductor element via a bump, and another bump electrode is formed on the electrode on the upper surface of the first semiconductor element. A first step of forming a plurality of first laminates, a first supplementary step of dividing the plurality of first laminates in a substrate state to form individual first laminates, and a third semiconductor An electrode is connected to an electrode on the upper surface of the fourth semiconductor element via a bump to an electrode on the upper surface of each third semiconductor element of the semiconductor substrate on which a plurality of elements are formed, forming a second laminate. A second step of dividing the plurality of second laminates in a substrate state to form individual second laminates; The bump electrodes on the upper surface of the first semiconductor element forming the laminate are connected to each other, and the first semiconductor element is connected to the insulating substrate. A third step of mounting the laminate,
A fourth bonding step of bonding the formed second stacked body to the bottom surface of the first semiconductor element forming the first stacked body;
A step, a fifth step of electrically connecting a third semiconductor element constituting the second laminate to the insulating substrate with a thin metal wire, the first laminate, and a second laminate A sixth step of sealing the upper surface of the insulating substrate on which the body is mounted with a sealing resin so as to cover them with a sealing resin.

Further, according to the method of manufacturing a semiconductor device of the present invention, the electrode on the upper surface of the first semiconductor element is connected to the electrode on the upper surface of the second semiconductor element via a bump, and A first step of forming another bump electrode on an electrode on the upper surface of the semiconductor element to form a first stacked body;
A second step of connecting an electrode on the upper surface of the fourth semiconductor element via a bump to the electrode on the upper surface of the semiconductor element to form a second stacked body; A third step of bonding the bottom surface of the first semiconductor element and the bottom surface of the third semiconductor element of the second stacked body to form a structure of the first stacked body and the second stacked body; Connecting the bump electrode on the upper surface of the first semiconductor element forming the first laminate to the electrode of the insulating substrate, and connecting the first laminate and the second laminate to the insulating substrate. A fourth step of mounting the structure of
A fifth step of electrically connecting a third semiconductor element of the second laminate to the insulating substrate with a thin metal wire;
A sixth step of sealing the upper surface of the insulating substrate with a sealing resin so as to cover the structure of the stacked body and the second stacked body.

More specifically, the first step is a method of manufacturing a semiconductor device in which a resin is interposed in a gap between a first semiconductor element and a second semiconductor element.

Further, the second step is a method for manufacturing a semiconductor device in which a resin is interposed in a gap between the third semiconductor element and the fourth semiconductor element.

As described above, the semiconductor device of the present invention comprises:
In particular, the first semiconductor element, the second semiconductor element, and the third
And the fourth semiconductor element are COC (C
The semiconductor device is mounted in a chip-on-chip (chip on chip) structure, has a structure in which the laminates are integrally three-dimensionally stacked, realizes a multi-function by a multi-chip structure, and is a high-density mounting type semiconductor device.

[0025]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a semiconductor device according to the present invention and a method for manufacturing the same will be described below with reference to the drawings.

FIG. 1 is a view showing a semiconductor device according to this embodiment. FIG. 1A is a cross-sectional view, and FIG. 1B is a plan view in an unsealed state.

As shown in the figure, the semiconductor device of the present embodiment has a first semiconductor element 8 and an electrode of the first semiconductor element 8 on the main surface of the first semiconductor element 8 and gold (Au). )
A second semiconductor element 10 whose main surface is connected via a bump electrode 9 made of solder or solder, and a third semiconductor element 11
And a fourth semiconductor on the main surface of the third semiconductor element 11, the main surface of which is connected to the electrode of the third semiconductor element 11 via a bump electrode 12 made of gold (Au) or solder. An element 13, a bottom surface of the first semiconductor element 8 and a third
Is bonded to the bottom surface of the semiconductor element 11 by an adhesive member 14 such as a die bonding material or an adhesive tape to form a laminated structure. Then, the main surface of the first semiconductor element 8 and the insulating substrate 15 having a circuit configuration are connected via a bump electrode 16 made of gold (Au) or solder, and are connected to the electrode on the main surface of the third semiconductor element 11. An electrode provided on the upper surface of the insulating substrate 15 is electrically connected to the metal thin wire 17;
The upper surface of the insulating substrate 15 is sealed with an epoxy-based insulating sealing resin 18. In this embodiment, the semiconductor element is connected to the semiconductor element via the bump electrode. However, the element may be electrically connected without the bump electrode.

The features of the semiconductor device of this embodiment are as follows.
The first semiconductor element 8 and the second semiconductor element 10 and the third semiconductor element 11 and the fourth semiconductor element 13
The semiconductor device is mounted in an OC structure, has a structure in which the laminates are integrally and three-dimensionally laminated, and is a high-density multi-function mounting type semiconductor device.

In the present embodiment, for example, the first semiconductor element 8 is a logic chip, the second semiconductor element 10 is an analog high-frequency chip, the third semiconductor element 11 is a memory chip, and the fourth semiconductor element 13 is a microcomputer chip. And
A multifunctional chip stack is constituted by the first to fourth semiconductor elements.

In the present embodiment, the size of the electrode connecting the first semiconductor element 8 and the second semiconductor element 10 and the size of the electrode connecting the third semiconductor element 11 and the fourth semiconductor element 13 are This is smaller than the size of the electrode connecting the first semiconductor element 8 and the third semiconductor element 11 to the insulating substrate 15, and can efficiently realize high-density mounting.

The third semiconductor element 1 is connected between the electrodes where the first semiconductor element 8 and the second semiconductor element 10 are connected.
Part of the signal transmitted between the electrodes to which the first and fourth semiconductor elements 13 are connected is between the electrodes of the first semiconductor element 8 and the electrodes of the insulating substrate 15 and the electrodes of the third semiconductor element 11. The speed is higher than the signal transmitted between the electrodes of the insulating substrate 15, and the high speed is realized in the multi-chip laminated structure.

The semiconductor device according to the present embodiment has a structure in which the upper surface of the insulating substrate 15 on which a plurality of semiconductor elements are mounted has a recess 19, and the second semiconductor element 10 is housed in the recess 19. have. The recess 19 has a depth equal to or greater than the height of the second semiconductor element 10 and the bump electrode 9 thereof, and is 200 [μm] in the present embodiment.

The insulating substrate 15 is a semiconductor carrier having a circuit configuration. The insulating substrate 15 has a plurality of electrodes 20 and a wiring pattern (not shown) on the upper surface. Internal wiring 21 such as through hole
Has an external electrode 22 electrically connected at the bottom surface.

In addition, in the gap between each semiconductor element, a resin is interposed in each gap at the stage of forming separately from the sealing resin 18 so that the reliability as a semiconductor device can be improved. it can.

Therefore, the semiconductor device of this embodiment is a multi-functional semiconductor device in which one semiconductor package is stacked and mounted on a circuit-structured substrate.

According to the structure of the semiconductor device of the present embodiment, the first semiconductor element 8, the second semiconductor element 10, and the third
Semiconductor element 11 and fourth semiconductor element 13
The semiconductor device is mounted in a C structure, and has a structure in which the stacked bodies are integrally and three-dimensionally stacked. The multi-chip structure realizes multiple functions, and a high-density mounting semiconductor device can be realized.

In this embodiment, the thickness of the mounted semiconductor element is approximately 200 μm as a normal thickness.
m], but with a thickness of around 50 [μm]
Thick and thin semiconductor elements can be used, and a thin semiconductor device can be realized. Further, the insulating substrate 15 may be any substrate that has a circuit configuration such as a resin substrate, a ceramic substrate, a tape substrate, and the like, and is capable of signal connection with the outside.

As described above, the semiconductor device shown in this embodiment is:
The first semiconductor element 8, the second semiconductor element 10, the third semiconductor element 11, and the fourth semiconductor element 13 have a COC structure, and a second semiconductor element is provided on the first semiconductor element 8. No element is provided, the first semiconductor element 8 and the insulating substrate 15
Are electrically connected to each other, and a stacked body of the third semiconductor element 11 and the fourth semiconductor element 13 having the COC structure is mounted on the bottom surface of the first semiconductor element 8 to form a semiconductor device having a three-chip structure. May be.

Next, a method of manufacturing the semiconductor device according to the present embodiment will be described with reference to the drawings.

FIGS. 2 to 9 are sectional views showing the steps of a method for manufacturing a semiconductor device according to the present embodiment.

First, as shown in FIG. 2, a bump electrode 9 is formed on the electrode on the main surface of the second semiconductor element 10. The bump electrode 9 formed here may be any bump electrode such as a plated bump or a ball bump using a wire bonding method, and may be made of gold (Au) or solder. The height may be several tens [μm] of about 50 [μm].

Next, as shown in FIG.
The bump electrode 9 formed on the electrode on the upper surface of the second semiconductor element 10 is connected to the electrode on the upper surface of the semiconductor element 8, and another bump electrode 16 is connected to the electrode on the upper surface of the first semiconductor element 8. Is formed to form the first stacked body 23.
In this step, it is desirable that the first semiconductor element 8 and the second semiconductor element 10 are connected to each other with a resin interposed therebetween. This is because if the electrodes such as bumps are densely packed between the elements, the injected resin does not uniformly enter between the elements, and unfilled voids are formed. This is to prevent the occurrence of voids. The interposition of the resin in the gap between the two is achieved by forming the resin on the upper surface of the first semiconductor element 8 and then flip-chip mounting the second semiconductor element 10 with its bump electrode 9 on the lower side. A method of injecting a resin after connecting the semiconductor element 8 and the second semiconductor element 10 described above may be used, but it is possible to prevent voids that are not filled with the resin.

In this step, when the second semiconductor element is not mounted on the first semiconductor element, it is only necessary to form the bump electrode 16 for mounting the substrate on the first semiconductor element.

Next, as shown in FIG. 4, the bump electrode 12 is formed on the electrode on the main surface of the fourth semiconductor element 13. The bump electrode 12 formed here may be any bump electrode such as a plated bump or a ball bump using a wire bonding method, and may be made of gold (Au) or solder. The height may be several tens [μm] of about 50 [μm].

Next, as shown in FIG.
The bump electrode 12 formed on the electrode on the upper surface of the fourth semiconductor element 13 is connected to the electrode on the upper surface of the semiconductor element 11 to form a second stacked body 24. In this step, it is desirable that the third semiconductor element 11 and the fourth semiconductor element 13 are connected to each other with a resin interposed therebetween.
The interposition of the resin in the gap between the two is achieved by forming the resin on the upper surface of the third semiconductor element 11 and then flip-chip mounting the fourth semiconductor element 13 with the bump electrode 12 on the lower side. Semiconductor element 11 and fourth semiconductor element 13
The method of injecting the resin after the connection is performed may be any method, but prevents voids unfilled with the resin.

Next, as shown in FIG. 6, a circuit is formed, a plurality of electrodes and wiring patterns are formed on the upper surface, and each of the electrodes is connected to an internal wiring 2 such as a via or a through hole inside the substrate.
The bump electrode on the upper surface of the first semiconductor element 8 constituting the first stacked body 23 with respect to the electrode of the insulating substrate 15 having the external electrode 22 on the bottom surface electrically connected by 1 1
6 are connected, and the first laminate 23 is mounted on the insulating substrate 15. Here, in the present embodiment, a substrate provided with a concave portion 19 for accommodating the second semiconductor element 10 of the first stacked body 23 on the upper surface of the insulating substrate 15 is used. And the insulating substrate 15 can be connected by the bump electrode 16.

Next, as shown in FIG. 7, the second semiconductor layer 8 formed in the previous step is formed on the bottom surface of the first semiconductor element 8 constituting the first laminate mounted on the insulating substrate 15. Laminate 2
The bottom surface of the fourth third semiconductor element 11 is bonded with the bonding member 14. At this stage, a structure in which four chips are stacked and mounted three-dimensionally is obtained.

Next, as shown in FIG. 8, the third semiconductor element 11 constituting the second laminate and the electrode on the upper surface of the insulating substrate 15 are electrically connected by the thin metal wires 17.

Then, as shown in FIG. 9, the first laminate,
By sealing the upper surface of the insulating substrate 15 on which the second laminate is mounted so as to cover them with a sealing resin 18, a one-package multifunctional high-density semiconductor device as shown in FIG. Is what you get.

Next, another embodiment of the method for manufacturing a semiconductor device of the present invention will be described with reference to the drawings. The method for manufacturing a semiconductor device according to the present embodiment is a method for manufacturing a semiconductor device in a semiconductor wafer substrate state.

FIGS. 10 to 19 are sectional views showing a method for manufacturing the semiconductor device of the present embodiment.

First, as shown in FIG. 10, a bump electrode 9 is formed on the electrode on the main surface of the second semiconductor element 10. The bump electrode 9 formed here may be any bump electrode such as a plated bump or a ball bump using a wire bonding method, and may be made of gold (Au) or solder. The height may be several tens [μm] of about 50 [μm].

Next, as shown in FIG. 11, a separately prepared semiconductor wafer substrate, on a semiconductor substrate 25 on which a plurality of first semiconductor elements 8 are formed, is provided with an electrode on the upper surface of each first semiconductor element 8. On the other hand, the bump electrodes 9 formed on the electrodes on the upper surface of the second semiconductor element 10 are connected to each other,
Another bump electrode 16 is formed on the electrode on the upper surface of the first semiconductor element 8.
To form In this step, the first semiconductor element 8
It is desirable to connect the resin and the second semiconductor element 10 with a resin interposed therebetween. After the resin is formed on the upper surface of the first semiconductor element 8, the resin
The method of flip-chip mounting the semiconductor element 10 with the bump electrode 9 on the lower side, or the method of injecting resin after connecting the first semiconductor element 8 and the second semiconductor element 10 may be used. Prevents unfilled voids in resin.

Next, as shown in FIG. 12, a plurality of laminates in a substrate state are divided into individual first and second semiconductor elements 10 and second semiconductor elements 10 connected by bump electrodes 9. One stacked body 23 is formed.

Next, as shown in FIG. 13, the bump electrode 12 is formed on the electrode on the main surface of the fourth semiconductor element 13. The bump electrode 12 formed here may be any bump electrode such as a plated bump or a ball bump using a wire bonding method, and may be made of gold (Au) or solder. The height may be several tens [μm] of about 50 [μm].

Next, as shown in FIG. 14, each of the third semiconductor elements 1 of a semiconductor wafer 26 prepared separately and having a plurality of third semiconductor elements 11 formed thereon.
The bump electrodes 12 formed on the electrodes on the upper surface of the fourth semiconductor element 13 are respectively connected to the electrodes on the upper surface of the first semiconductor element 13. In this step, it is desirable that the third semiconductor element 11 and the fourth semiconductor element 13 are connected to each other with a resin interposed therebetween. The interposition of the resin in the gap between the two is achieved by forming the resin on the upper surface of the third semiconductor element 11 and then flip-chip mounting the fourth semiconductor element 13 with the bump electrode 12 on the lower side. A method of injecting a resin after connecting the semiconductor element 11 and the fourth semiconductor element 13 may be used, which prevents voids that are not filled with the resin.

Next, as shown in FIG. 15, a plurality of laminates in a substrate state are divided into individual laminates each comprising a third semiconductor element 11 and a fourth semiconductor element 13 connected by bump electrodes 12. A second stacked body 24 is formed.

Next, as shown in FIG.
An insulating substrate 15 having a plurality of electrodes and a wiring pattern on the top surface, and having on the bottom an external electrode 22 electrically connected to each of the electrodes by an internal wiring 21 such as a via or a through hole inside the substrate. The first laminate 23 is
Are connected to the bump electrodes 16 on the upper surface of the first semiconductor element 8, and the first laminate 23 is mounted on the insulating substrate 15. Here, in the present embodiment, a substrate provided with a concave portion 19 for accommodating the second semiconductor element 10 of the first stacked body 23 on the upper surface of the insulating substrate 15 is used. And the insulating substrate 15 can be connected by the bump electrode 16.

Next, as shown in FIG.
The bottom surface of the third semiconductor element 11 of the second stacked body 24 formed in the previous process is bonded to the bottom surface of the first semiconductor element 8 forming the first stacked body mounted on the bonding member 14. Glue with At this stage, a structure in which four chips are stacked and mounted three-dimensionally is obtained.

Next, as shown in FIG. 18, the third semiconductor element 11 constituting the second laminate and the electrode on the upper surface of the insulating substrate 15 are electrically connected by the thin metal wires 17.

Then, as shown in FIG. 19, the upper surface of the insulating substrate 15 on which the first laminate and the second laminate are mounted is sealed with a sealing resin 18 so as to cover them. This is to obtain a one-package multifunctional high-density semiconductor device as shown in FIG.

According to the method of manufacturing a semiconductor device of the present embodiment, the semiconductor elements can be connected to each other in a semiconductor wafer state, so that the manufacturing efficiency can be improved.

Further, an application of the method of manufacturing a semiconductor device according to the present invention will be described with reference to the drawings.

20 to 22 are sectional views showing a method of manufacturing a semiconductor device according to an applied embodiment, and are process diagrams showing partial steps.

First, a first laminate and a second laminate are formed by the same method as in the above-described embodiments, and the second laminate is formed on the first laminate 23 as shown in FIG. Are laminated with the adhesive member 14 to form a laminate 27 of four chips.

Next, the circuit is configured as shown in FIG.
An insulating substrate 15 having a plurality of electrodes and a wiring pattern on the top surface, and having on the bottom an external electrode 22 electrically connected to each of the electrodes by an internal wiring 21 such as a via or a through hole inside the substrate. The laminate 27 is connected to the electrodes by the bump electrodes 16. Also in this embodiment, a substrate provided with a concave portion 19 for accommodating the second semiconductor element 10 of the stacked body 27 is used on the upper surface of the insulating board 15. Can be connected by the bump electrode 16.

Then, as shown in FIG. 22, the third
The semiconductor element 11 and the electrode on the upper surface of the insulating substrate 15 are electrically connected by thin metal wires 17, and the upper surface of the insulating substrate 15 on which the laminate is mounted is sealed with a sealing resin 18 so as to cover them. By stopping, a one-package multifunctional high-density semiconductor device as shown in FIG. 1 is obtained.

Next, another embodiment of the semiconductor device of the present invention will be described.

FIG. 23 is a sectional view showing the semiconductor device of this embodiment. The basic structure is the same as that of the semiconductor device shown in FIG. 1, but the thickness of each mounted semiconductor element is small.
Specifically, the structure is such that a resin 28 is interposed in a gap between semiconductor elements. With the structure shown in FIG. 23, the overall thickness of the semiconductor device is reduced, and the semiconductor device can be reduced in size and thickness.

In the present embodiment, the thickness of the semiconductor element is set to an extremely thin thickness of 50 [μm]. The thickness of each semiconductor element does not need to be the same, and the thickness can be appropriately set according to the function, mounting strength, and reliability of the semiconductor element.

FIG. 24 shows an embodiment of a semiconductor device having a further developed structure.

The semiconductor device shown in FIG.
Reference numeral 5 denotes a circuit-configured substrate having no concave portion. The height of the bump electrode 16 connecting the first semiconductor element 8 of the mounted laminate and the insulating substrate 15 is shown in FIGS. It has a higher configuration than the semiconductor device shown. In the present embodiment, the thickness of each semiconductor element including the first semiconductor element 8 is thin, and the height of the bump electrode 16 connecting the main surface of the first semiconductor element 8 and the insulating substrate 15 is set. Is higher than the height of the upper surface of the second semiconductor element 10 connected to the first semiconductor element 8 by the bump electrode 9.

In the semiconductor device of this embodiment, since a large number of thinned semiconductor elements are stacked and mounted, and a circuit-structured substrate can be used without providing a concave portion on the mounting substrate, the semiconductor device according to the present embodiment can be used. Uses can be expanded.

As described above, in the semiconductor device of the present embodiment, the first semiconductor element and the second semiconductor element, and the third semiconductor element and the fourth semiconductor element are each mounted in a COC structure.
These laminates have a three-dimensionally laminated structure,
This is a high-density mounting type semiconductor device that realizes multiple functions with a multi-chip structure.

In the description of this embodiment, an example is shown in which the present invention is applied to a semiconductor device in which a semiconductor element is mounted on an insulating substrate such as a carrier substrate having a circuit configuration.
A first semiconductor element is mounted on a lead frame, and after electrical connection, a QFP (Quad) in which the outer periphery is sealed with a sealing resin.
Flat Package (Flat Package) type semiconductor device package, QFN (Quad Flat Non-lead)
By applying the present invention also to the package portion of a semiconductor device of the ed Package type, the effect of a high-density stacked semiconductor device is obtained.

[0076]

As described above, in the semiconductor device of the present invention, at least the first semiconductor element and the second semiconductor element, and the third semiconductor element and the fourth semiconductor element each have a COC structure. The semiconductor device is mounted and has a structure in which those laminates are integrally and three-dimensionally stacked, realizes multiple functions by a multi-chip structure, and can realize a high-density mounting type semiconductor device. Further, by reducing the thickness of the semiconductor element to be mounted, in addition to miniaturization, it is possible to realize a thin and multi-functional.

Further, in the method of manufacturing a semiconductor device,
The package can be mounted at a time in a semiconductor wafer state or after the formation of the laminate, and the manufacturing efficiency can be improved.

[Brief description of the drawings]

FIG. 1 is a diagram showing a semiconductor device according to an embodiment of the present invention;

FIG. 2 is a sectional view showing the method for manufacturing the semiconductor device according to the embodiment of the present invention;

FIG. 3 is a sectional view showing the method of manufacturing the semiconductor device according to one embodiment of the present invention;

FIG. 4 is a sectional view showing the method of manufacturing the semiconductor device according to one embodiment of the present invention;

FIG. 5 is a sectional view showing the method of manufacturing the semiconductor device according to one embodiment of the present invention;

FIG. 6 is a sectional view showing the method of manufacturing the semiconductor device according to one embodiment of the present invention;

FIG. 7 is a sectional view showing the method of manufacturing the semiconductor device according to one embodiment of the present invention;

FIG. 8 is a sectional view showing the method of manufacturing the semiconductor device according to one embodiment of the present invention;

FIG. 9 is a sectional view showing the method of manufacturing the semiconductor device according to one embodiment of the present invention;

FIG. 10 is a sectional view showing the method of manufacturing the semiconductor device according to one embodiment of the present invention;

FIG. 11 is a sectional view showing the method of manufacturing the semiconductor device according to one embodiment of the present invention;

FIG. 12 is a sectional view showing the method of manufacturing the semiconductor device according to one embodiment of the present invention;

FIG. 13 is a sectional view showing the method of manufacturing the semiconductor device according to one embodiment of the present invention;

FIG. 14 is a sectional view showing the method of manufacturing the semiconductor device according to one embodiment of the present invention;

FIG. 15 is a sectional view showing the method of manufacturing the semiconductor device according to one embodiment of the present invention;

FIG. 16 is a sectional view showing the method of manufacturing the semiconductor device according to one embodiment of the present invention;

FIG. 17 is a sectional view showing the method of manufacturing the semiconductor device according to one embodiment of the present invention;

FIG. 18 is a sectional view showing the method of manufacturing the semiconductor device according to one embodiment of the present invention;

FIG. 19 is a sectional view showing the method of manufacturing the semiconductor device according to one embodiment of the present invention;

FIG. 20 is a sectional view showing the method of manufacturing the semiconductor device according to one embodiment of the present invention;

FIG. 21 is a sectional view showing the method of manufacturing the semiconductor device according to one embodiment of the present invention;

FIG. 22 is a sectional view showing the method of manufacturing the semiconductor device according to one embodiment of the present invention;

FIG. 23 is a sectional view showing a semiconductor device according to one embodiment of the present invention;

FIG. 24 is a sectional view showing a semiconductor device according to one embodiment of the present invention;

FIG. 25 is a sectional view showing a conventional semiconductor device.

[Explanation of symbols]

 Reference Signs List 1 bump 2 semiconductor element 3 semiconductor carrier 4 electrode 5 conductive adhesive 6 sealing resin 7 external terminal 8 first semiconductor element 9 bump electrode 10 second semiconductor element 11 third semiconductor element 12 bump electrode 13 fourth Semiconductor element 14 Adhesive member 15 Insulating substrate 16 Bump electrode 17 Fine metal wire 18 Sealing resin 19 Depression 20 Electrode 21 Internal wiring 22 External electrode 23 First laminate 24 Second laminate 25 Semiconductor substrate 26 Semiconductor substrate 27 Body 28 resin

Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat II (Reference) H01L 25/065 H01L 25/08 B 25/07 25/18

Claims (16)

[Claims] At least a first semiconductor element and a third semiconductor element
And a fourth semiconductor element on a main surface of the third semiconductor element, the main surface of which is connected to the third semiconductor element via an electrode. The bottom surface of the semiconductor element and the bottom surface of the third semiconductor element are adhered to each other to form a laminated structure, and the main surface of the first semiconductor element and an insulating substrate are connected via a bump electrode. 3. A semiconductor device according to claim 3, wherein a main surface of the semiconductor element and an upper surface of the insulating substrate are electrically connected by a thin metal wire. 2. At least a first semiconductor element and a second semiconductor element on a main surface of the first semiconductor element, the main surface being connected to the first semiconductor element via an electrode. And a third semiconductor element, and a fourth semiconductor element on a main surface of the third semiconductor element, the main surface of which is connected to the third semiconductor element via an electrode, The first
The bottom surface of the semiconductor element and the bottom surface of the third semiconductor element are bonded to form a laminated structure, and the main surface of the first semiconductor element and an insulating substrate are connected via a bump electrode, A semiconductor device, wherein a main surface of a third semiconductor element and an upper surface of the insulating substrate are electrically connected by a thin metal wire. 3. At least a first semiconductor element and a second semiconductor on a main surface of the first semiconductor element, the main surface being connected to the first semiconductor element via a bump electrode. An element, a third semiconductor element, and a fourth semiconductor element on the main surface of the third semiconductor element, the main surface of which is connected to the third semiconductor element via a bump electrode. The bottom surface of the first semiconductor element and the bottom surface of the third semiconductor element are bonded to form a laminated structure,
The main surface of the first semiconductor element and the insulating substrate are connected via a bump electrode, and the main surface of the third semiconductor element and the upper surface of the insulating substrate are electrically connected by a thin metal wire. A semiconductor device. 4. The semiconductor device according to claim 1, wherein an upper surface of the insulating substrate is sealed with a sealing resin. 5. At least a first semiconductor element and a second semiconductor element on a main surface of the first semiconductor element, the main surface being connected to the first semiconductor element by a bump electrode via a resin. Semiconductor element, a third semiconductor element, and a fourth semiconductor on the main surface of the third semiconductor element, the main surface being connected to the third semiconductor element via a resin via a bump electrode A bottom surface of the first semiconductor element and a bottom surface of the third semiconductor element are adhered to each other to form a laminated structure, and the main surface of the first semiconductor element and the insulating substrate are The main surface of the third semiconductor element and the upper surface of the insulating substrate were electrically connected by thin metal wires, and the upper surface of the insulating substrate was sealed with a sealing resin. A semiconductor device characterized by the above-mentioned. 6. The insulating substrate according to claim 2, wherein the upper surface of the insulating substrate has a concave portion, and the second semiconductor element is housed in the concave portion. 13. A semiconductor device according to claim 1. 7. The height of the bump electrode connecting the main surface of the first semiconductor element and the insulating substrate is equal to the height of the upper surface of the second semiconductor element connected on the first semiconductor element by the bump electrode. Claim 2 which is higher than the height
The semiconductor device according to claim 5. 8. An insulating substrate, which is a semiconductor carrier having a circuit configuration, has a plurality of electrodes and a wiring pattern on an upper surface thereof, and has an outer electrode electrically connected to the electrodes on a lower surface thereof. 6. The semiconductor device according to claim 1, wherein said semiconductor device is a semiconductor device. 9. An electrode connecting the first semiconductor element and the second semiconductor element and an electrode connecting the third semiconductor element and the fourth semiconductor element have a size of the first semiconductor element and the third semiconductor element. 9. The semiconductor device according to claim 2, wherein the size of the electrode connecting the semiconductor element to the insulating substrate is smaller than the size of the electrode. 10. A part of a signal transmitted between an electrode to which a first semiconductor element and a second semiconductor element are connected and between an electrode to which a third semiconductor element and a fourth semiconductor element are connected, The signal transmitted between the electrode of the first semiconductor element and the electrode of the insulating substrate and the signal transmitted between the electrode of the third semiconductor element and the electrode of the insulating substrate are faster.
The semiconductor device according to claim 9. 11. A step of forming a bump electrode on an electrode on an upper surface of a first semiconductor element, and a step of forming a bump electrode on an electrode on an upper surface of a fourth semiconductor element with respect to an electrode on an upper surface of a third semiconductor element. Connecting the electrodes to form a laminate, connecting the bump electrodes on the upper surface of the first semiconductor element to the electrodes of the insulating substrate, and mounting the first semiconductor element on the insulating substrate. A step of bonding the laminate to the bottom surface of the first semiconductor element, and electrically connecting the third semiconductor element and the insulating substrate forming the laminate with a thin metal wire. Manufacturing a semiconductor device, comprising: a connecting step; and a step of sealing an upper surface of the insulating substrate on which the first semiconductor element and the stacked body are mounted so as to cover them with a sealing resin. Method. 12. An electrode on the upper surface of the first semiconductor element is connected to an electrode on the upper surface of the second semiconductor element via a bump, and another electrode is connected to the electrode on the upper surface of the first semiconductor element. Forming a first laminated body by forming an electrode;
Step and the fourth electrode with respect to the electrode on the upper surface of the third semiconductor element.
A second step of connecting electrodes via bumps to electrodes on the upper surface of the semiconductor element to form a second stacked body, and forming the first stacked body with respect to the electrodes of the insulating substrate. A third step of connecting the bump electrodes on the top surface of the first semiconductor element and mounting the first laminate on the insulating substrate; and forming a third step on the bottom surface of the first semiconductor element forming the first laminate. A fourth step of adhering the formed second laminate;
A fifth step of electrically connecting the third semiconductor element constituting the laminate to the insulating substrate with a thin metal wire, and insulating the first laminate and the second laminate on each other. Sixth sealing the upper surface of the conductive substrate so as to cover them with a sealing resin
And a method of manufacturing a semiconductor device. 13. An electrode is connected to an electrode on an upper surface of each first semiconductor element of a semiconductor substrate on which a plurality of first semiconductor elements are formed, via a bump to an electrode on an upper surface of a second semiconductor element. A first step of forming a plurality of first laminates by forming another bump electrode on an electrode on the upper surface of the first semiconductor element; and dividing the plurality of first laminates in a substrate state A first supplementary step of forming individual first laminates, and applying a fourth semiconductor to an electrode on the upper surface of each third semiconductor element of a semiconductor substrate on which a plurality of third semiconductor elements are formed. Connect the electrodes to the electrodes on the top of the device via bumps,
A second step of forming a second laminate, a second supplementary step of dividing the plurality of second laminates in a substrate state to form individual second laminates, A third step of connecting bump electrodes on the upper surface of the first semiconductor element forming the first laminate and mounting the first laminate on an insulating substrate; The first part of the body
A fourth step of bonding the formed second stacked body to the bottom surface of the semiconductor element, and connecting the third semiconductor element constituting the second stacked body and the insulating substrate to a thin metal wire. A fifth step of electrically connecting the first laminate and the second
A method of manufacturing a semiconductor device, comprising: sealing a top surface of an insulating substrate on which the laminated body is mounted with a sealing resin so as to cover them. 14. An electrode on an upper surface of a first semiconductor element is connected to an electrode on an upper surface of a second semiconductor element via a bump, and is separately connected to an electrode on an upper surface of the first semiconductor element. A first step of forming a first stacked body by forming a bump electrode of the third type, and connecting the electrode on the upper surface of the fourth semiconductor element via a bump to the electrode on the upper surface of the third semiconductor element A second step of forming a second stacked body; bonding the bottom surface of the first semiconductor element of the first stacked body to the bottom surface of a third semiconductor element of the second stacked body; A third step of forming a structure of the first laminate and the second laminate,
Connecting the bump electrode on the upper surface of the first semiconductor element forming the first laminate to the electrode of the insulating substrate;
A fourth step of mounting the first laminate and the second laminate on the insulating substrate, and electrically connecting the third semiconductor element of the second laminate and the insulating substrate with a thin metal wire. And a sixth step of sealing the upper surface of the insulating substrate with a sealing resin so as to cover the structure of the first laminate and the second laminate. A method for manufacturing a semiconductor device, comprising: 15. The semiconductor device according to claim 12, wherein in the first step, a resin is interposed in a gap between the first semiconductor element and the second semiconductor element. Production method. 16. The semiconductor device according to claim 12, wherein in the second step, a resin is interposed in a gap between the third semiconductor element and the fourth semiconductor element. Production method.