JP2003133512A - Resin-package type semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To fully protect a plurality of semiconductor chips mounted to a chip-on-chip structure for constituting a resin package type semiconductor device, and to enhance heat radiating properties of the entire semiconductor device. SOLUTION: First and second semiconductor chips 2A, 2B have mutually opposed active planes 20a, 20b, at least one passive plane of either of the both chips is exposed out of a packaging resin, and the active planes 20a, 20b of the chips 2A, 2B are adhered via an anisotropically conductive adhesive 5 or an anisotropically conductive film, thereby conductively connecting electrodes of the chips 2A, 2B to each other via the anisotropically conductive adhesive 5 or anisotropically conductive film.

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a resin package type semiconductor device using a so-called chip-on-chip structure in which a plurality of semiconductor chips are stacked in the thickness direction thereof.

In the present invention, a semiconductor chip having an active surface and a passive surface is used as the semiconductor chip. The active surface in the present invention means a so-called main surface of the semiconductor chip. However, it is a surface on which predetermined electronic circuits and electrodes are built. On the other hand, the passive surface in the present invention means a surface corresponding to a so-called back surface of a so-called semiconductor chip in which electronic circuits and electrodes are not formed, and for example, the surface of a silicon wafer is subjected to sputtering or etching treatment. Then, when various electronic circuits are manufactured, the back surface of the silicon wafer chip which is the base of the electronic circuit is used as the passive surface.

[0003]

2. Description of the Related Art As is well known, when a desired semiconductor device is manufactured by using a plurality of semiconductor chips, it is strongly demanded to downsize the entire semiconductor device by increasing the mounting density of the semiconductor chips. There are many. in this case,
Simply arranging a plurality of semiconductor chips two-dimensionally on a lead frame, for example, has a certain limit in increasing the packaging density. In addition, if a plurality of semiconductor chips are integrated into a single chip, the manufacturing work of the semiconductor chips becomes complicated, and the manufacturing cost thereof becomes extremely high.

Therefore, conventionally, there is a means for mounting a semiconductor chip constituting a semiconductor device in a so-called chip-on-chip structure. This means is, for example, as shown in FIG. 8 of the present application, a means for mounting a plurality (for example, two) of semiconductor chips 9a and 9b in a vertically stacked state on the die pad 96 of the lead frame. The electrodes 91a and 91b of the two semiconductor chips 9a and 9b are
The lead terminal 97 of the lead frame is wire-connected and connected via a wire Wa. In addition, the two semiconductor chips 9a,
9b and a plurality of wires Wa are covered with the packaging resin 95. In the resin package type semiconductor device having such a configuration, the area occupied by the semiconductor chips 9a and 9b can be reduced to increase the mounting density of the semiconductor chips, and the overall size of the semiconductor device can be reduced and the semiconductor chips can be integrated. .

[0005]

However, the above-mentioned conventional resin package type semiconductor device having a so-called chip-on-chip structure has the following problems.

That is, when semiconductor chips 9a and 9b are semiconductor chips which generate a relatively large amount of heat during driving, such as a power IC for motor drive, a gate array of some kind, or a super LSI, the heat is Is desired to be efficiently diffused to the outside. If the temperature of the semiconductor chip rises, the operation of the electronic circuits built in the semiconductor chip may become unstable, and its reliability may be impaired. It is necessary to prevent this appropriately. Is.

However, conventionally, the plurality of semiconductor chips 9a and 9b are resin-packaged so as to be entirely covered with the packaging resin 95. Therefore, conventionally, the heat generated from the semiconductor chips 9a and 9b cannot be efficiently released to the outside of the semiconductor device, which may cause unstable operation of the electronic circuit. . In particular, in a resin package type semiconductor device adopting a chip-on-chip structure, since a plurality of semiconductor chips are packaged in one package, the total amount of heat generated tends to increase as the number of semiconductor chips increases. It is strong, and the above problems are more likely to be serious.

In the conventional general resin package type semiconductor device, that is, in the resin package type semiconductor device in which the chip-on-chip structure is not adopted, a heat sink is provided on the lower surface of the die pad on which the semiconductor chip is mounted. A means for enhancing the heat dissipation of the entire semiconductor device by being provided is appropriately adopted. Therefore, it is possible to improve the heat dissipation by applying such means to the semiconductor device having the chip-on-chip structure. However, only by adopting such means, there is a certain limit in improving the heat dissipation of the semiconductor device. That is, in the semiconductor device having the chip-on-chip structure, as described above, since the amount of heat generated tends to increase as the number of semiconductor chips increases, it is only necessary to adopt the means using the heat sink. In some cases, the entire semiconductor device cannot be provided with sufficient heat dissipation.

Particularly, in the past, two semiconductor chips 9 have been used.
a and 9b are both active surfaces 92a and 9b.
Since 2b is mounted in an upright posture, in order to properly protect the active surface 92b of the upper semiconductor chip 9b and the wire Wa bonded to this active surface 92b, this portion is covered with the packaging resin 95. Must be properly covered. For this reason, conventionally, it has been difficult to connect and provide a heat dissipation plate to the upper semiconductor chip 9b, and it has been difficult to improve heat dissipation of the entire semiconductor device.

The present invention was conceived under such circumstances, and a plurality of semiconductor chips constituting a resin package type semiconductor device are so-called chip-on-chip.
An object of the present invention is to improve the heat dissipation of the entire semiconductor device while appropriately protecting the plurality of semiconductor chips when mounted on a chip structure.

[0011]

DISCLOSURE OF THE INVENTION In order to solve the above problems, the present invention takes the following technical means.

According to the present invention, a resin package type semiconductor device is provided. This resin package type semiconductor device includes first and second semiconductor chips each having one surface as an active surface and the other surface on the opposite side as a passive surface.
Is a resin-packaged semiconductor device in which the semiconductor chips are stacked on each other in the thickness direction and resin-packaged with a packaging resin. The first and second semiconductor chips have active surfaces that are different from each other. The passive surfaces of at least one of the first and second semiconductor chips are oriented so as to face each other,
By being exposed to the outside of the packaging resin, and the active surfaces of the first and second semiconductor chips are bonded together via an anisotropic conductive adhesive or an anisotropic conductive film, It is characterized in that the electrodes of the first and second semiconductor chips are electrically connected to each other through the anisotropic conductive adhesive or the anisotropic conductive film.

In the present invention, since the passive surface of at least one of the first and second semiconductor chips is exposed to the outside of the packaging resin, the first and first passive surfaces are exposed via the exposed passive surface. The heat generated from the second semiconductor chip can be efficiently released to the outside of the packaging resin. Therefore, it is possible to improve the heat dissipation of the entire semiconductor device and reduce the risk that the operation of each semiconductor chip becomes unstable due to a rise in temperature.
On the other hand, in the present invention, since it is the passive surface of the semiconductor chip that is exposed to the outside of the packaging resin, the passive surface is exposed to the outside. It is rare that important parts such as rare electronic circuits and electrodes are easily damaged. In the present invention, the first and second
Since the respective active surfaces of the semiconductor chips are oriented so as to face each other, it is possible to appropriately wrap these portions with the packaging resin and achieve appropriate protection.

As described above, the present invention is based on the first and second aspects.
Both the active surfaces of the semiconductor chips face each other, and the passive surface, which is less susceptible to damage, is exposed to the outside of the packaging resin, improving both heat dissipation and protecting the active surfaces of the semiconductor chips. I am trying to Therefore, according to the present invention, it is possible to obtain a resin package type semiconductor device which has a high packaging density of semiconductor chips, is hard to be damaged by the semiconductor chips, and has high operation reliability.

In a preferred embodiment of the present invention, a terminal, which is wholly or partially exposed to the outside of the packaging resin, is provided and is provided on each active surface of the first and second semiconductor chips. The electrodes are electrically connected to each other, and
An electrode different from the electrode is provided on the active surface of the semiconductor chip, and the electrode is electrically connected to the terminal.

According to this structure, the terminal which is wholly or partially exposed to the outside of the packaging resin can be used as a terminal for mounting the resin package type semiconductor device at a desired position. However, since the electrodes of the first and second semiconductor chips are electrically connected to each other, the second semiconductor chip is electrically connected to the terminal via the first semiconductor chip. Can be Therefore, it is not necessary to separately wire-connect each electrode of the first and second semiconductor chips to the above-mentioned terminal, and the entire electric wire-connecting structure is simplified accordingly, and the manufacturing cost thereof is low. Can be

In another preferred embodiment of the present invention,
A heat sink is directly or indirectly connected to the passive surface of the first semiconductor chip, the heat sink is exposed to the outside of the packaging resin, and the heat sink of the second semiconductor chip is The passive surface is exposed to the outside of the packaging resin.

According to this structure, the heat generated mainly from the first semiconductor chip is packaged by using the heat dissipation plate directly or indirectly connected to the passive surface of the first semiconductor chip. Can be released to the outside of the resin. Further, the heat mainly generated from the second semiconductor chip can be released to the outside of the packaging resin from the passive surface of the second semiconductor chip. With such a configuration, it is difficult to directly expose the passive surface of the first semiconductor chip to the outside of the packaging resin, for example, when the passive surface of the first semiconductor chip is bonded to the die pad of the lead frame. In this case, it is suitable for improving the heat dissipation of the whole.

[0019]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, preferred embodiments of the present invention will be specifically described with reference to the drawings.

FIG. 1 is a sectional view showing an example of a resin package type semiconductor device according to the present invention. 2A to 2C are cross-sectional views of the essential parts showing the manufacturing process of the resin package type semiconductor device shown in FIG. FIG. 3 is a plan view of a principal part showing a manufacturing process of the resin package type semiconductor device shown in FIG.

In FIG. 1, the resin package type semiconductor device A includes first and second semiconductor chips 2A and 2A.
B, a die pad 11 which is a mounting target portion of these first and second semiconductor chips 2A and 2B, a heat sink 3, a plurality of lead terminals 10, a plurality of wires W, and a packaging resin 4. Has been done.

This resin package type semiconductor device A is manufactured by using a lead frame 1 described later,
The die pad 11 and the plurality of lead terminals 10 are included in the lead frame 1. The method of manufacturing the resin package type semiconductor device A will be described later, but the die pad 11 is formed of a thin metal plate such as copper having a rectangular shape in plan view. Like the die pad 11, the plurality of lead terminals 10 are formed of a thin metal plate such as copper, and have an internal lead portion 10 a buried inside the packaging resin 4 and a portion protruding outside the packaging resin 4. External lead portion 10b
And have. Each lead terminal 10 is for mounting the resin package type semiconductor device A at a desired position. Specifically, when the resin package type semiconductor device A is placed so that the lead terminals 10 are brought into contact with the area where the cream solder is applied, the cream solder is heated to perform the solder reflow treatment. The resin package type semiconductor device A can be surface-mounted in the above area.

First and second semiconductor chips 2A, 2B
Is configured as, for example, an LSI chip or other IC chip, and is one in which a desired electronic circuit is integrated and integrally formed on one surface of a silicon chip. Therefore, one surface of each of the first and second semiconductor chips 2A, 2B is defined as an active surface 20a, 20b on which an electronic circuit is built, and one surface on the opposite side is formed by an electronic circuit. Passive surfaces 21a, 21b as the back surface of the silicon chip not embedded
Has become. A plurality of first electrodes 22a as bump electrodes are formed on the active surface 20a of the first semiconductor chip 2A.
And a plurality of second electrodes 22b as pad electrodes. The plurality of second electrodes 22b are wire-connected to the plurality of lead terminals 10 via wires W such as gold wires. On the other hand, the active surface 20b of the second semiconductor chip 2B is provided with electrodes 23 as a plurality of bump electrodes corresponding to the plurality of first electrodes 22a.

The active surface 20a of the first semiconductor chip 2A is oriented upward, and its passive surface 21a is bonded to the upper surface of the die pad 11 with an adhesive or the like. The second semiconductor chip 2B has a smaller size than the first semiconductor chip 2A, and is stacked on the first semiconductor chip 2A with the passive surface 21b thereof facing upward, and the active surface 20b of the second semiconductor chip 2B has the first surface. It is bonded to the active surface 20a of the semiconductor chip 2A via the anisotropic conductive adhesive 5 or the anisotropic conductive film. The anisotropic conductive adhesive 5 or the anisotropic conductive film is an adhesive or a film in which conductive particles are diffused inside an insulating material, and only for a portion where pressure is applied by a bump electrode or the like. It is configured to have conductivity. Therefore, the first electrode 22a of the first semiconductor chip 2A and the electrode 23 of the second semiconductor chip 2B are electrically connected to each other through the anisotropic conductive adhesive 5 or the anisotropic conductive film, The first and second semiconductor chips 2A and 2B are combined in a state of being electrically connected to each other.

The heat radiating plate 3 is formed of, for example, a metal plate member having a rectangular shape in plan view, and has a larger size than the die pad 11 in order to have a large heat radiating area. The heat dissipation plate 3 is joined to the lower surface of the die pad 11 by ultrasonic joining, spot welding, or other means.

The packaging resin 4 is, for example, a thermosetting epoxy resin, and covers the peripheral portions of the first and second semiconductor chips 2A and 2B above the heat dissipation plate 3 and the bonding positions of the wires W. It is molded. However, the upper surface 4a of the packaging resin 4 is substantially flush with the upward-facing passive surface 21b of the second semiconductor chip 2B, and is formed so that substantially the entire passive surface 21b is exposed to the outside. . Similarly, the lower surface 4b of the packaging resin 4 is substantially flush with the lower surface of the heat dissipation plate 3, and is formed so that the substantially entire lower surface of the heat dissipation plate 3 is exposed to the outside.

The resin package type semiconductor device A is manufactured by the following steps.

That is, the resin package type semiconductor device A
In the manufacturing process of, the lead frame 1 as shown in FIGS. 2 and 3, for example, is used. This lead frame 1
Is formed by punching and pressing a metal plate made of copper, for example, and has a long shape extending in a certain direction. The basic configuration of the lead frame 1 is common to the configuration of a general lead frame conventionally used for manufacturing semiconductor devices, except for the points described below. Specifically, as well shown in FIG. 3, the lead frame 1 has a semiconductor chip between two side edge portions 16 and 16 in which a large number of feed holes 15 are formed at regular intervals. The die pad 11 for mounting is formed at a plurality of positions at regular intervals in the longitudinal direction.
A support lead 12 for supporting a plurality of internal lead portions 10a provided at a position separated from the die pad 11,
And the internal lead portion 10a and the tie bar 1 having a plurality of these lines
It has a plurality of external lead portions 10b connected to each other.

However, as well shown in FIGS. 1 and 2, the height of the upper surface of the die pad 11 is determined by the lead terminal 1.
It is lower than the upper surface of 0 by an appropriate dimension H. As described above, if the height of the die pad 11 is made lower than that of the lead terminal 10, the first and second semiconductor chips 2A and 2B are mounted on the die pad 11 in a vertically stacked manner. The overall height of the mounting locations of the semiconductor chips 2A and 2B can be kept low by the height of the die pad 11, which is preferable for reducing the thickness of the resin package type semiconductor device A as a whole. Will be things.

As shown in FIG. 2, the first and second semiconductor chips 2 are provided on the die pad 11 of the lead frame 1.
A and 2B are put in and adhered, but in this case, it is preferable that these semiconductor chips 2A and 2B are previously assembled with each other and then put on the die pad 11 using a chip bonder or the like. If you do this,
It is possible to reduce the number of work steps for loading the semiconductor chip onto the die pad 11. It is also possible to check whether or not the electrical connection between the first and second semiconductor chips 2A and 2B is appropriate before the semiconductor chip is put into the die pad 11. There is also an advantage that it is possible to prevent the semiconductor chips 2A and 2B from being put on the die pad 11 with poor connection.

First and second semiconductor chips 2A, 2B
After being mounted on the die pad 11, the second electrode 22b of the first semiconductor chip 2A and the internal lead portion 10a of the lead terminal 10 are wire-connected via the wire W, as shown in FIG. Then, the packaging resin 4 is molded by using, for example, a transfer molding method, and a resin packaging operation of resin-sealing the first and second semiconductor chips 2A and 2B and their peripheral portions is performed. After this resin packaging work is completed, forming processing such as removal of unnecessary portions of the lead frame 1 and bending of the lead terminals 10 is performed. The resin package type semiconductor device A is obtained by such a series of working steps.

Next, the operation of the resin package type semiconductor device A will be described.

First, the resin package type semiconductor device A is
Since the first and second semiconductor chips 2A and 2B are packaged in one package, the heat generation of the first and second semiconductor chips 2A and 2B as a whole is larger than that in the case where only one semiconductor chip is resin-packaged. The amount tends to be large. On the other hand, the passive surface 21b of the second semiconductor chip 2B is exposed to the outside of the packaging resin 4, and the heat generated from the second semiconductor chip 2B is efficiently transferred from the passive surface 21b to the outside. You can escape. Further, since the lower surface of the heat dissipation plate 3 connected to the first semiconductor chip 2A via the die pad 11 is also exposed to the outside of the packaging resin 4, the heat generated from the first semiconductor chip 2A Heat sink 3
Can escape from the outside. Therefore, the heat dissipation of the resin package type semiconductor device A is good, the temperature rise is suppressed while the first and second semiconductor chips 2A and 2B are driven, and the operation of the electronic circuits incorporated therein is suppressed. Can be stabilized.

On the other hand, what is exposed to the outside of the packaging resin 4 is only the heat sink 3 and the passive surface 21b of the second semiconductor chip 2B. Even if these portions are exposed to the outside, As a result, the first and second semiconductor chips 2A and 2B are less likely to be damaged. Since the active surfaces 20a and 20b of the first and second semiconductor chips 2A and 2B, on which the delicate electronic circuits are formed, are appropriately protected by the packaging resin 4 while facing each other, these portions are not protected. It is possible to make it hard to receive damage. The first and second semiconductor chips 2A and 2B are electrically connected to each other via the electrodes 22a and 23, and the first and second semiconductor chips 2A and 2B are connected to the lead terminal 10, respectively. There is also no need to make separate wiring connections. Therefore, in the manufacturing process, only by connecting the second electrode 22b of the first semiconductor chip 2A to the lead terminal 10, the first and second semiconductor chips 2A and 2B are electrically connected to the lead terminal 10. Therefore, the number of wire bonding work steps is reduced, and the manufacturing work efficiency is improved.

FIG. 4 is a sectional view showing another example of the resin package type semiconductor device according to the present invention. 5 and 6 are cross-sectional views of the essential part showing the manufacturing process of the resin package type semiconductor device shown in FIG. 4, respectively.

A resin package type semiconductor device A shown in FIG.
The a includes the first and second semiconductor chips 2C and 2D, the film-shaped substrate 7, the packaging resin 4A, and the external terminals 6. The first and second semiconductor chips 2C and 2D have the same basic configuration as the first and second semiconductor chips 2A and 2B of the previous embodiment, and detailed description thereof will be omitted.

The substrate 7 is a film-like substrate having a flexible thin synthetic resin film such as polyimide as a base material, and a conductive film formed by etching a copper foil on the upper surface thereof. A wiring portion 79 is provided.
The substrate 7 is provided with two opening holes 78 penetrating in the thickness direction of the substrate 7.
A cantilevered beam-shaped terminal 79a that is electrically connected to the conductive wiring portion 79 is arranged in each of the eight.

The active surface 20c of the first semiconductor chip 2C is oriented upward, and the active surface 20c is placed on the lower surface of the intermediate region 77 of the two openings 78 of the substrate 7 via the adhesive layer 76a. It is glued. The plurality of first electrodes 22c and second electrodes 2 of the first semiconductor chip 2C
2d is arranged inside or below each of the opening holes 87, and the upper portion thereof is not covered with the substrate 7. The second electrode 22d is electrically connected to each terminal 79a. The second semiconductor chip 2D is bonded to the upper surface of the intermediate region 77 of the substrate 7 via the adhesive layer 76b with the active surface 20d thereof facing downward.
The first and second semiconductor chips 2C and 2D are in such a posture that their active surfaces 20c and 20d face each other, and the first electrode 22c and the electrode 23a are in contact with each other and are electrically connected.

The packaging resin 4A is molded so as to cover the peripheral portions of the first and second semiconductor chips 2C and 2D. The upper and lower surfaces of the packaging resin 4A are the upward-facing passive surface 21d of the second semiconductor chip 2D. It is substantially flush with the downward facing passive surface 21c of the first semiconductor chip 2C. As a result, the first and second semiconductor chips 2C,
Each of the 2D passive surfaces 21c and 21d is exposed to the outside of the packaging resin 4A.

The external terminal 6 is a ball-shaped terminal made of solder, and its upper end is electrically connected to the conductive wiring portion 79 through a hole 75 formed in the substrate 7. By heating and melting the external terminal 6, the resin package type semiconductor device Aa can be surface-mounted at a desired position.

The above-mentioned resin package type semiconductor device Aa
Is manufactured through the following manufacturing process. That is,
First, as shown in FIG. 5, the first and second semiconductor chips 2C and 2D are adhered to the upper and lower surfaces of the intermediate region 77 of the substrate 7'which is formed in a long shape, and the electrodes 22 thereof are formed.
Predetermined conductive connection is made for c, 22d, and 23a.
Next, as shown in FIG. 6, a resin packaging operation of sealing a predetermined portion with the packaging resin 4A is performed. After that, the solder ball 6'is attached to the hole 75 of the substrate 7 '.
The solder ball 6'is melted and heated and then re-cured. When the solder ball 6 ′ is melted, a part of the solder ball 6 ′ flows into the hole portion 75 and the conductive wiring portion 79.
Will be conducted to. Then, when the solder ball 6 ′ is cured, it is solidified into a ball shape again due to its surface tension. Therefore, the external terminals 6 are properly formed by the solder balls 6 '. After the external terminals 6 are formed in this manner, the long substrate 7'may be cut and the substrate 7'may be finished as the substrate 7 shown in FIG.

In the resin package type semiconductor device Aa, the passive surfaces 21c and 21d of the first and second semiconductor chips 2C and 2D are exposed to the outside of the packaging resin 4A. Therefore, the heat generated from the first and second semiconductor chips 2C and 2D can be efficiently dissipated to the outside, and the heat dissipation can be improved. Further, since no heat sink is used, the number of parts is small, which is convenient for achieving weight reduction and overall thickness reduction. Further, in the resin package type semiconductor device Aa, since the wires are not used for the electrical connection between the first and second semiconductor chips 2C and 2D, the electrical connection work can be further facilitated. Further, it does not employ a relatively expensive lead frame, and has a structure in which the first and second semiconductor chips 2C and 2D are mounted on the film-shaped substrate 7 that can be manufactured at a lower cost. Therefore, it is also advantageous in reducing the overall manufacturing cost.

As described above, the resin package type semiconductor device according to the present invention does not necessarily have to be constructed by using the lead frame, and instead of the lead frame,
It may be configured by using a film-shaped substrate or a substrate having a different form. Further, in the above-described embodiment, the first semiconductor chips 2A and 2C are provided with the heat dissipation function by using the heat dissipation plate 3 or by exposing the passive surface 21c thereof to the outside. However, the present invention is not limited to this. In the present invention, the second semiconductor chip 2
When the passive surfaces 21b and 21d of B and 2D are exposed to the outside to have a heat radiation function, the entire first semiconductor chips 2A and 2C may be covered with, for example, a packaging resin. In the present invention, by arranging the active surfaces of the first and second semiconductor chips to face each other, it is possible to give the heat dissipation function to the respective passive surfaces of these two semiconductor chips. Whether or not both of the second semiconductor chips have a heat radiation function is a matter that can be appropriately selected.
In the present invention, the point is that the passive surface of at least one of the first and second semiconductor chips is exposed to the outside of the packaging resin.

FIG. 7 is a cross-sectional view of essential parts showing another example of the resin package type semiconductor device according to the present invention. In the figure, the same parts as those of the resin package type semiconductor device A shown in FIG. 1 are designated by the same reference numerals and the description thereof will be omitted.

A resin package type semiconductor device A shown in FIG.
b includes a third semiconductor chip 2E in addition to the first and second semiconductor chips 2A and 2B.
The passive surface 21e of the semiconductor chip 2E of the die pad 1
It is adhered to the upper surface of 1A. The first and second semiconductor chips 2A, 2B have their active surfaces 20a, 2B.
0b are in a posture of facing each other and are bonded to each other, and the downward passive surface 21a of the first semiconductor chip 2A is the active surface 20 of the third semiconductor chip 2E.
It is bonded to e. Electrode 2 of third semiconductor chip 2E
4 and the second electrode 22b of the first semiconductor chip 2A are wire-connected to the lead terminal 10 via the wire W. The upper surface of the packaging resin 4B has the second semiconductor chip 2
It is substantially flush with the upward passive surface 21b of B, and this passive surface 21b is exposed to the outside of the packaging resin 4B. The lower surface of the packaging resin 4B is substantially flush with the lower surface of the die pad 11A, and the lower surface of the die pad 11A is exposed to the outside of the packaging resin 4B.

As can be understood from the configuration of the resin package type semiconductor device Ab, in the present invention, not only the two semiconductor chips 2A and 2B are stacked on top of each other, but in addition to these two semiconductor chips 2A and 2B, Another semiconductor chip 2E different from this may be further stacked. As an aspect of adding another semiconductor chip 2E, like a resin package type semiconductor device Ab,
Another semiconductor chip 2E may be arranged at a position facing the passive surface 21a of the first semiconductor chip 2A. In this case, the passive surface 21b of the second semiconductor chip 2B is exposed to the outside of the packaging resin 4B. It becomes possible. In the present invention, a plurality of other semiconductor chips are added to the first semiconductor chip and the second semiconductor chip so that the number of semiconductor chips stacked in the thickness direction is three or four or more. It may be provided later.

In addition, the specific structure of each part of the resin package type semiconductor device according to the present invention is not limited to the above-mentioned embodiment, and various design changes are possible. Of course, the present invention is applicable to various types of semiconductor chips such as ferroelectric memory (ferroelectrics-RAM) and other various IC chips and LSI chips, regardless of the specific type of semiconductor chip. Can be applied.

[Brief description of drawings]

FIG. 1 is a sectional view showing an example of a resin package type semiconductor device according to the present invention.

FIG. 2 is a sectional view of a key portion showing the manufacturing process of the resin package-type semiconductor device shown in FIG.

FIG. 3 is a plan view of relevant parts showing a manufacturing process of the resin package-type semiconductor device shown in FIG.

FIG. 4 is a sectional view showing another example of a resin package type semiconductor device according to the present invention.

5A and 5B are cross-sectional views of main parts showing a manufacturing process of the resin package-type semiconductor device shown in FIG.

FIG. 6 is a sectional view of a key portion showing the manufacturing process of the resin package-type semiconductor device shown in FIG. 4.

FIG. 7 is a cross-sectional view of essential parts showing another example of the resin package type semiconductor device according to the present invention.

FIG. 8 is a cross-sectional view showing an example of a conventional resin package type semiconductor device.

[Explanation of symbols]

1 lead frame 2A, 2C First semiconductor chip 2B, 2D Second semiconductor chip 2E Third semiconductor chip 4,4A, 4B packaging resin 5 Anisotropic conductive adhesive 6 External terminal (terminal) 10 Lead terminal (terminal) 11,11A die pad 20a-20e Active surface 21a-21e Passive surface W wire A, Aa, Ab resin package type semiconductor device

─────────────────────────────────────────────────── ─── Continued Front Page (51) Int.Cl. ⁷ Identification Code FI Theme Coat (Reference) H01L 25/18 F Term (Reference) 5F036 AA01 BA04 BB01 BC31 BE01 BE09 5F067 AA03 BA06 CD01

Claims (3)

[Claims] 1. A first semiconductor chip and a second semiconductor chip each having one surface as an active surface and the other surface on the opposite side as a passive surface, respectively. Is a resin package type semiconductor device in which the active surfaces of the first and second semiconductor chips face each other. The passive surface of at least one of the first and second semiconductor chips is exposed to the outside of the packaging resin, and the active surfaces of the first and second semiconductor chips are different from each other. The anisotropic conductive adhesive or the anisotropic conductive adhesive is adhered via the anisotropic conductive film. The first and second via the anisotropic conductive film
2. A resin package type semiconductor device, wherein electrodes of the semiconductor chip are electrically connected to each other. 2. A terminal, which is wholly or partially exposed to the outside of the packaging resin, is provided, and the electrodes provided on the active surfaces of the first and second semiconductor chips are connected to each other. 2. An electrode different from the electrode is provided on the active surface of the first semiconductor chip, which is electrically connected, and the other electrode is electrically connected to the terminal. The resin package type semiconductor device according to. 3. A heat sink is directly or indirectly connected to the passive surface of the first semiconductor chip, the heat sink is exposed to the outside of the packaging resin, and the heat sink is exposed to the outside. 3. The resin package type semiconductor device according to claim 1, wherein the passive surface of the semiconductor chip 2 is exposed to the outside of the packaging resin.