JPH06333997A - Tab film and semiconductor device using its tab film - Google Patents
Tab film and semiconductor device using its tab filmInfo
- Publication number
- JPH06333997A JPH06333997A JP11822993A JP11822993A JPH06333997A JP H06333997 A JPH06333997 A JP H06333997A JP 11822993 A JP11822993 A JP 11822993A JP 11822993 A JP11822993 A JP 11822993A JP H06333997 A JPH06333997 A JP H06333997A
- Authority
- JP
- Japan
- Prior art keywords
- lead
- tab film
- outer lead
- center line
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Wire Bonding (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は半導体装置の実装に関
し、特にＴＡＢ（Tape Automated Bonding）フィルムを
用いて実装された半導体装置に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to mounting a semiconductor device, and more particularly to a semiconductor device mounted using a TAB (Tape Automated Bonding) film.
【０００２】[0002]
【従来の技術】従来の技術によるＴＡＢフィルムを用い
た半導体装置を、図２を参照して説明する。ＴＡＢフィ
ルムは次のような構成である。フィルムキャリア２１の
両端には該フィルムキャリア２１を搬送するためのスプ
ロケットホ−ル２２と、半導体チップ２３を置くための
デバイスホ−ル２４とアウタ−リ−ドホ−ル２５とが設
けられている。フィルムキャリア２１上には、インナ−
リ−ド２６と該インナ−リ−ド２６に連なるアウタ−リ
−ド２７（入力側及び出力側）とが形成されている。こ
のようなＴＡＢフィルムを用いて、半導体チップ２３は
表面上に設けられたパッド電極（図示せず）にインナ−
リ−ド２６が接続されて実装される。但し上記パッド電
極は半導体チップ２３の各辺と平行に列状に形成されて
いる。2. Description of the Related Art A conventional semiconductor device using a TAB film will be described with reference to FIG. The TAB film has the following structure. At both ends of the film carrier 21, a sprocket hole 22 for carrying the film carrier 21, a device hole 24 for placing the semiconductor chip 23, and an outer lead hole 25 are provided. . On the film carrier 21, the inner
A lead 26 and an outer lead 27 (input side and output side) connected to the inner lead 26 are formed. Using such a TAB film, the semiconductor chip 23 is used as an inner electrode on a pad electrode (not shown) provided on the surface.
The lead 26 is connected and mounted. However, the pad electrodes are formed in a row in parallel with each side of the semiconductor chip 23.
【０００３】ここで、上記パッド電極と接続するインナ
−リ−ド２６はＸ方向テ−プ中心線２８またはＹ方向テ
−プ中心線２９に対し並列に形成され、一方０ＬＢ（Ou
terLead Bonding）エリア３０におけるアウタ−リ−ド
２７はＸ方向テ−プ中心線２８に対し並列に形成されて
いる。また、パッド電極ピッチ即ちインナ−リ−ドピッ
チ３１と、ＯＬＢエリア３０におけるアウタ−リ−ドピ
ッチ３２とは異なるため、アウタ−リ−ド２７に２カ所
の屈曲部３３を設ける。Here, the inner lead 26 connected to the pad electrode is formed in parallel with the X-direction tape center line 28 or the Y-direction tape center line 29, while 0LB (Ou
The outer lead 27 in the terLead Bonding area 30 is formed in parallel with the tape center line 28 in the X direction. Since the pad electrode pitch, that is, the inner lead pitch 31 and the outer lead pitch 32 in the OLB area 30 are different, the outer lead 27 is provided with two bent portions 33.
【０００４】ところで、ＴＡＢフィルムを用いてパッケ
−ジングされた半導体装置を回路基板等に搭載するた
め、ＯＬＢエリア３０は一定の領域を必要とする。従っ
て、パッケ−ジサイズ３４をより縮小するには、２カ所
の屈曲部３３の間（以下、配線領域３５とする）を狭く
することが考えられる。配線領域３５を狭くすると、配
線領域３５におけるアウタ−リ−ド２７のＹ方向テ−プ
中心線２９を基準とする配線角度３６は小さくなり、そ
れと同時に配線領域３５におけるアウタ−リ−ド２７の
配線ピッチ３７も狭くなる。By the way, in order to mount a semiconductor device packaged using a TAB film on a circuit board or the like, the OLB area 30 needs a certain area. Therefore, in order to further reduce the package size 34, it is conceivable to narrow the space between the two bent portions 33 (hereinafter referred to as the wiring region 35). When the wiring area 35 is narrowed, the wiring angle 36 with respect to the Y direction tape center line 29 of the outer lead 27 in the wiring area 35 becomes smaller, and at the same time, the outer lead 27 in the wiring area 35 becomes smaller. The wiring pitch 37 is also narrowed.
【０００５】しかしながら、狭い配線ピッチ３７となる
ようにアウタ−リ−ド２７を形成することは容易ではな
い。また、ＴＡＢフィルム自体を折り曲げ立体的に実装
する際に配線領域３５に応力がかかり、とりわけ屈曲部
３３に応力が集中される。そのため屈曲部３３からの破
断が発生しやすく、数多くの屈曲部３３を有することは
それだけ半導体装置の信頼性の低下につながっている。However, it is not easy to form the outer leads 27 so that the wiring pitch 37 is narrow. Further, when the TAB film itself is bent and three-dimensionally mounted, stress is applied to the wiring region 35, and particularly stress is concentrated on the bent portion 33. Therefore, breakage from the bent portion 33 is likely to occur, and the presence of many bent portions 33 leads to a reduction in the reliability of the semiconductor device.
【０００６】[0006]
【発明が解決しようとする課題】上述のように、ＴＡＢ
フィルムを用いた半導体装置のパッケ−ジサイズを縮小
するために、ＴＡＢフィルムにおける配線領域を狭くす
ることにより達成するには限界がある。また、破断箇所
となる屈曲部は少ない程望ましい。DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention
In order to reduce the package size of a semiconductor device using a film, there is a limit to be achieved by narrowing the wiring area in the TAB film. In addition, it is desirable that the number of bent portions that become breaks be small.
【０００７】それ故に、本発明の目的は、パッケ−ジサ
イズを縮小すると共に信頼性の高いＴＡＢフィルム及び
そのＴＡＢフィルムを用いた半導体装置を提供すること
である。Therefore, an object of the present invention is to provide a TAB film having a reduced package size and high reliability, and a semiconductor device using the TAB film.
【０００８】[0008]
【課題を解決するための手段】本発明によるＴＡＢフィ
ルムは、フィルムキャリア上にインナ−リ−ド及びアウ
タリ−ドとが次のように形成されている。上記インナ−
リ−ドはＹ方向テ−プ中心線に対し斜めに形成され、さ
らに上記インナ−リ−ドに続く上記アウタ−リ−ドはＯ
ＬＢエリアの先端まで上記インナ−リ−ド同様に斜めに
形成され、ＯＬＢエリアの先端において屈曲し、Ｘ方向
テ−プ中心線と並列に形成される。The TAB film according to the present invention has an inner lead and an outer lead formed on a film carrier as follows. Above inner
The lead is formed obliquely to the tape center line in the Y direction, and the outer lead following the inner lead is O-shaped.
It is formed obliquely to the tip of the LB area as in the above inner lead, is bent at the tip of the OLB area, and is formed in parallel with the tape center line in the X direction.
【０００９】半導体チップは該チップの各辺に対して斜
めに配置されたパッド電極を有しており、該パッド電極
は上記インナ−リ−ドに接続され、上記半導体チップは
上記ＴＡＢフィルムを用いてパッケ−ジングされる。The semiconductor chip has pad electrodes arranged obliquely to each side of the chip, the pad electrodes are connected to the inner lead, and the semiconductor chip uses the TAB film. Are packaged.
【００１０】[0010]
【作用】上記ＴＡＢフィルムによれば、上記インナ−リ
−ド及び上記アウタ−リ−ドとはＹ方向テ−プ中心線を
基準とする角度を大きく採ることができるため、それら
リ−ドを容易に形成することができると共にパッケ−ジ
サイズを縮小することもできる。また、上記アウタ−リ
−ドの屈曲箇所は各々一つの屈曲部のみであり、破断箇
所となる屈曲部を大幅に減少され信頼性の高い半導体装
置を提供することが可能である。According to the TAB film, since the inner lead and the outer lead can take a large angle with respect to the Y-direction tape center line as a reference, these leads are formed. It can be easily formed and the package size can be reduced. Further, since the outer lead has only one bent portion, it is possible to provide a highly reliable semiconductor device in which the bent portion which becomes a break point is greatly reduced.
【００１１】[0011]
【実施例】本発明による一実施例を図１より説明する。
図１は、ＴＡＢフィルムを用いた半導体装置を模式的に
表す平面図である。ＴＡＢフィルムは次のような構成で
ある。フィルムキャリア１の両端には該フィルムキャリ
ア１を搬送するためのスプロケットホ−ル２と、半導体
チップ３を置くためのデバイスホ−ル４とアウタ−リ−
ドホ−ル５とが設けられている。フィルムキャリア１上
にはインナ−リ−ド６と該インナ−リ−ド６に連なるア
ウタ−リ−ド７（入力側及び出力側）とが形成されてい
る。このようなＴＡＢフィルムを用いて半導体チップ３
は、その表面上に設けられたパッド電極（図示せず）に
インナ−リ−ド６を接続することにより実装される。但
し、上記パッド電極は半導体チップ３の各辺に対して一
定の角度を持つように、つまり各辺に対して斜めとなる
配置に形成されている。DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment according to the present invention will be described with reference to FIG.
FIG. 1 is a plan view schematically showing a semiconductor device using a TAB film. The TAB film has the following structure. At both ends of the film carrier 1, a sprocket hole 2 for carrying the film carrier 1, a device hole 4 for placing a semiconductor chip 3 and an outer reel.
And a hall 5 is provided. On the film carrier 1, an inner lead 6 and an outer lead 7 (input side and output side) connected to the inner lead 6 are formed. A semiconductor chip 3 using such a TAB film
Is mounted by connecting an inner lead 6 to a pad electrode (not shown) provided on the surface thereof. However, the pad electrodes are formed so as to have a constant angle with respect to each side of the semiconductor chip 3, that is, in an arrangement that is oblique to each side.
【００１２】ここで、上記パッド電極と接続されるイン
ナ−リ−ド６に連なるアウタ−リ−ド７は、例えばＹ方
向テ−プ中心線８に対し一定の配線角度９を有し、屈曲
部１０を通過し０ＬＢ（Outer Lead Bonding）エリア１
１におけるアウタ−リ−ド７はＸ方向テ−プ中心線１２
に対し並列に形成されている。従って、各アウタ−リ−
ド７は一つの屈曲部１０を有する形状となる。さらに、
アウタ−リ−ド７はインナ−リ−ド６から屈曲部１０ま
で直線的に形成されるため、配線角度９を大きくとるこ
とができ配線ピッチ１３も大きくすることができる。The outer lead 7 connected to the inner lead 6 connected to the pad electrode has a constant wiring angle 9 with respect to the Y direction tape center line 8 and is bent. Passed Section 10 and passed 0LB (Outer Lead Bonding) Area 1
1, the outer lead 7 is a tape center line 12 in the X direction.
It is formed in parallel with. Therefore, each outer reel
The door 7 has a shape having one bent portion 10. further,
Since the outer lead 7 is linearly formed from the inner lead 6 to the bent portion 10, the wiring angle 9 can be made large and the wiring pitch 13 can be made large.
【００１３】つまり、インナ−リ−ド６自体をＹ方向テ
−プ中心線８に対し斜めに形成するため、インナ−リ−
ド６に続くアウタ−リ−ド７をもＯＬＢエリア１１に至
る屈曲部１０までインナ−リ−ド６同様に斜めに形成す
ることが可能である。それにより、ＯＬＢエリア１１ま
でのアウタ−リ−ド７の領域を狭くすることができると
同時にＯＬＢエリア１１においても回路基板等に搭載す
る際に必要な一定領域を確保することができる。このよ
うなＴＡＢフィルムを用いた半導体装置とすることによ
り、パッケ−ジサイズ１４を大幅に縮小することが可能
であり、その結果コストダウンを図ることができる。更
に、屈曲部１０を一か所とすることは、実装時の応力集
中箇所、即ち破断箇所を少なくすることであり、高信頼
性の半導体装置を提供することができる。That is, since the inner lead 6 itself is formed obliquely with respect to the Y-direction tape center line 8, the inner lead 6 is formed.
Similarly to the inner lead 6, the outer lead 7 following the lead 6 can be formed obliquely up to the bent portion 10 reaching the OLB area 11. As a result, the area of the outer lead 7 up to the OLB area 11 can be narrowed, and at the same time, the OLB area 11 can also secure a certain area necessary for mounting on the circuit board or the like. By using a semiconductor device using such a TAB film, the package size 14 can be significantly reduced, and as a result, the cost can be reduced. Further, the use of the bent portion 10 in one place reduces the stress concentration portion during mounting, that is, the breakage portion, so that a highly reliable semiconductor device can be provided.
【００１４】なお、本実施例は半導体チップの各辺に対
し斜めに配置されたパッド電極のみを有する半導体チッ
プの場合であるが、斜めに配置されたパッド電極と共に
辺と平行になるように列状に配置されたパッド電極を含
む半導体チップの場合であっても、斜めに配置されたパ
ッド電極に対して本実施例と同様に適用することができ
る。Although the present embodiment is a semiconductor chip having only pad electrodes diagonally arranged with respect to each side of the semiconductor chip, the pad electrodes arranged diagonally are arranged so as to be parallel to the sides. Even in the case of a semiconductor chip including pad electrodes arranged in a striped manner, the same can be applied to the pad electrodes arranged obliquely as in the present embodiment.
【００１５】[0015]
【発明の効果】本発明によれば、インナ−リ−ドをＹ方
向テ−プ中心線に対し斜めに形成し、それに続くアウタ
−リ−ドの屈曲部を一か所とすることができる。それゆ
え、パケ−ジサイズを縮小すると共に高信頼性の半導体
装置を提供することができる。According to the present invention, the inner lead can be formed obliquely with respect to the tape center line in the Y direction, and the bent portion of the outer lead following the inner lead can be provided at one place. . Therefore, the package size can be reduced and a highly reliable semiconductor device can be provided.
【図１】本発明による半導体装置を模式的に示す平面図
である。FIG. 1 is a plan view schematically showing a semiconductor device according to the present invention.
【図２】従来の技術による半導体装置を模式的に示す平
面図である。FIG. 2 is a plan view schematically showing a semiconductor device according to a conventional technique.
１…フィルムキャリア、２…スプロットホ−ル、３…半
導体チップ ４…デバイスホ−ル、５…アウタ−リ−ドホ−ル、６…
インナ−リ−ド ７…アウタ−リ−ド、８…Ｙ方向テ−プ中心線、９…配
線角度、１０…屈曲部 １１…０ＬＢ（Outer Lead Bonding）エリア、１２…Ｘ
方向テ−プ中心線 １３…配線ピッチ、１４…パッケ−ジサイズ。DESCRIPTION OF SYMBOLS 1 ... Film carrier, 2 ... Sprout hole, 3 ... Semiconductor chip 4 ... Device hole, 5 ... Outer lead hole, 6 ...
Inner lead 7 ... Outer lead, 8 ... Y direction tape center line, 9 ... Wiring angle, 10 ... Bend 11 ... 0LB (Outer Lead Bonding) area, 12 ... X
Direction tape center line 13 ... Wiring pitch, 14 ... Package size.
Claims (3)
リアの中心線に対し角度を有するインナ−リ−ドと、 上記フィルムキャリア上に形成され、上記インナ−リ−
ドに連なり、上記角度を有し形成された領域と上記中心
線と垂直に形成された領域とからなるアウタ−リ−ドと
を少なくとも備えたことを特徴とするＴＡＢフィルム。1. A film carrier, an inner lead formed on the film carrier and having an angle with respect to a center line of the film carrier, and an inner lead formed on the film carrier.
A TAB film, characterized in that it comprises at least an outer lead which is continuous with the edge and has an area formed with the above angle and an area formed perpendicular to the center line.
有することを特徴とする請求項１記載のＴＡＢフィル
ム。2. The TAB film according to claim 1, wherein the outer lead has one bent portion.
パッド電極を有する半導体チップと、 フィルムキャリアの中心線に対し角度を有するインナ−
リ−ドと、上記角度を有し形成された領域と上記中心線
と垂直に形成された領域とからなるアウタ−リ−ドとを
少なくとも含むＴＡＢフィルムとを備え、 上記インナ−リ−ドは上記パッド電極と接続されること
を特徴とする半導体装置。3. A semiconductor chip having pad electrodes arranged obliquely with respect to at least a side, and an inner chip having an angle with respect to a center line of a film carrier.
The inner lead includes a lead and a TAB film including at least an outer lead having a region formed with the above angle and a region formed perpendicular to the center line. A semiconductor device, which is connected to the pad electrode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11822993A JP3229068B2 (en) | 1993-05-20 | 1993-05-20 | TAB film and semiconductor device using the TAB film |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11822993A JP3229068B2 (en) | 1993-05-20 | 1993-05-20 | TAB film and semiconductor device using the TAB film |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH06333997A true JPH06333997A (en) | 1994-12-02 |
| JP3229068B2 JP3229068B2 (en) | 2001-11-12 |
Family
ID=14731426
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11822993A Expired - Fee Related JP3229068B2 (en) | 1993-05-20 | 1993-05-20 | TAB film and semiconductor device using the TAB film |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3229068B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6175151B1 (en) | 1997-01-23 | 2001-01-16 | Seiko Epson Corporation | Film carrier tape, semiconductor assembly, semiconductor device, and method of manufacturing the same, mounted board, and electronic instrument |
| KR20180078965A (en) * | 2016-12-30 | 2018-07-10 | 스템코 주식회사 | Flexible printed circuit boards and method of manufacturing electronic product including the same |
-
1993
- 1993-05-20 JP JP11822993A patent/JP3229068B2/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6175151B1 (en) | 1997-01-23 | 2001-01-16 | Seiko Epson Corporation | Film carrier tape, semiconductor assembly, semiconductor device, and method of manufacturing the same, mounted board, and electronic instrument |
| US6414382B1 (en) | 1997-01-23 | 2002-07-02 | Seiko Epson Corporation | Film carrier tape, semiconductor assembly, semiconductor device and method of manufacturing the same, mounted board, and electronic instrument |
| US6646338B2 (en) | 1997-01-23 | 2003-11-11 | Seiko Epson Corporation | Film carrier tape, semiconductor assembly, semiconductor device, and method of manufacturing the same, mounted board, and electronic instrument |
| KR20180078965A (en) * | 2016-12-30 | 2018-07-10 | 스템코 주식회사 | Flexible printed circuit boards and method of manufacturing electronic product including the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3229068B2 (en) | 2001-11-12 |
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