JPH06326154A - Multichip module board - Google Patents

Abstract

PURPOSE:To provide a multichip module board for flip chip mounting, which is improved so that a board electrode is conducted positively even in an IC semiconductor device, in which bump height is to some extent dispersed, and the movement of an IC chip is prevented at the time of transfer to a reflow furnace. CONSTITUTION:An electrode metallic layer 36 is formed by a flat central section as a flip chip pad section 34 and a protruded section protruded in a peripheral section 40 in a multichip module board 30, and a pan-shaped recessed section is formed in the flip chip pad section 34 and the peripheral section 40 of the section 34. The electrode metallic layer 36 is exposed in the region of the flip chip pad section 34 and the flip chip pad adjacent region of the peripheral section 40, and a contact surface with the bump of an IC chip easier to be brought into contact than conventional boards is constituted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flip-chip mounting multi-chip module substrate, and more particularly, when a flip-chip type IC semiconductor device is mounted on a multi-chip module substrate, the product yield in the mounting process is improved. Thus, the present invention relates to a multi-layer multi-chip module substrate manufactured by a thin film process.

[0002]

2. Description of the Related Art IC semiconductor devices (hereinafter referred to as IC for simplicity)
Wire bonding, tape bonding, or flip chip bonding is generally used as a method for mounting a chip (abbreviated as chip) on a substrate. Flip chip bonding, which is the object of the present invention, is performed in the following procedure as schematically shown in FIGS.
8 to 10 are enlarged cross-sectional views of a main part, and FIG. 8 is a flip-chip pad portion of a conventional multi-chip module substrate for flip-chip mounting (hereinafter simply referred to as a substrate for simplicity). And a cross-sectional view of the periphery thereof, FIG.
8 is a cross-sectional view showing a state where an IC chip is mounted on the substrate shown in FIG. 8, and FIG. 10 shows a state where electrodes of the IC chip and substrate electrodes are connected by melting bumps by a reflow furnace. In the figure, 10 is a conventional substrate, 16 is an electrode layer, 2
0 is a surface protective layer, 11 is a flip chip pad portion and 1
3 indicates a peripheral portion.

For bare IC chips, 100 to 200 μ
Electrodes are formed with a pitch in the range of m, and protrusions made of a metal material such as solder or gold as shown in FIG. 9 referred to as bumps B have a height of 20 to 100 μm and a diameter of 50 μm.
It is formed by a method such as vapor deposition and plating with a size of up to 150 μm. On the other hand, as shown in FIG. 8, the substrate 10 in which the electrode layer 16 formed by a method such as gold plating is exposed at the flip chip pad portion is prepared, and flux is applied to the electrode layer 16. Next, as shown in FIG. 9, the IC chip A is placed on the substrate so that the bump B is located on the flip chip pad portion 11 of the substrate 10, and is temporarily fixed with flux and transferred into the reflow furnace. The main purpose of the flux is to chemically destroy the oxide film on the bump and the substrate pad.
One of its functions is to temporarily fix the chip on the substrate. In the reflow furnace, the bumps B are thermocompression-bonded to the solder, gold, or the like preliminarily coated on the electrode layer 16 of the substrate 10, or the solder is melted and connected as shown in FIG.

A conventional substrate is a multi-layer substrate formed by alternately laminating an electrically insulating layer and a conductive layer on a silicon wafer, for example, a polyimide layer and a metal layer.
Its structure and manufacturing process are as described below. As shown in FIG. 11, the insulating film 14 is formed on the silicon substrate 12 (step a) (step b), and the electrode layer 16 made of metal is further formed thereon by the sputtering method (step c). Next, the resist layer 18 is applied and exposed through the glass mask E (step d). After the development, the electrode layer 16 is processed into a desired shape by wet or dry etching (step e). Next, the resist layer 18 is peeled off, the photosensitive polyimide layer 20 is coated as a surface protective layer, and the polyimide layer 20 is further etched to form the electrode layer 16
Are exposed (step f). If necessary, steps c to f are repeated to manufacture a multilayer substrate. When manufacturing the multilayer substrate, the via holes for connecting the upper and lower metal layers can be formed by a conventional method such as using photosensitive polyimide or etching polyimide through a resist.

[0005]

However, when the above-mentioned conventional substrate is used, the reason is as follows.
There is a problem that the product yield in the mounting process is not improved. First, the first reason is that, in the step of forming bumps on an IC chip, as described above, the number of bumps is 20 to 1
The height is controlled so that it is formed to a predetermined height within the range of 00 μm, but there is inevitably some variation in the height for each electrode of the IC chip.

When such an IC chip having a bump height variation is mounted on the above-mentioned conventional substrate, the bump having a low height is not in contact with the electrode layer on the substrate. Even if the bump solder is melted in this state, the molten solder only forms a sphere with surface tension and does not contact the electrode layer of the substrate, that is, there is no conduction between the IC chip and the substrate. The problem to say occurs. Further, when the IC chip is mounted on the substrate, a slight positional deviation may occur between the bump of the IC chip and the substrate electrode. If the solder is in contact with the board electrodes when it melts,
The surface tension of the solder allows self-alignment in a self-regulating manner to correct the misalignment. However, when the bumps are not in contact with the substrate electrode layer, only the low melting point solder on the substrate electrodes is melted and the solder of the bumps is not melted, so the effect of correcting misalignment cannot be expected, and as a result, the interelectrode gap is The positional shift occurs in the mounting board, and the mounting board does not have complete conduction.

The second reason is that in the method of reflowing and mounting the IC chip on the substrate, when the substrate on which the IC chip is mounted is transferred to the reflow furnace for heating, it is temporarily fixed by flux. However, since the effect of the operation is low, the IC chip often moves from a predetermined position, which causes a reduction in yield. Moreover,
Although it is necessary to use a water-soluble flux or a non-cleaning flux due to restrictions on the use of CFCs, these fluxes are relatively rough and rough, and lack the adhesive force for temporary fixing. Therefore, the effect of the temporary fixing by the flux cannot be expected more and more. On the other hand, in the method of thermocompression bonding at the same time as mounting the IC chip, since the solder is pressed without melting, the self-aligning action of the IC chip due to the surface tension of the solder cannot be expected and there is a high possibility of misalignment.

In view of the above problems, a first object of the present invention is to surely make electrical conduction to a substrate electrode and to a reflow furnace even in an IC semiconductor device in which bump heights have some variations. It is an object of the present invention to provide a multi-chip module substrate for flip-chip mounting, which is improved so as to prevent the movement of IC chips during transfer. A second object of the present invention is to provide a method for easily manufacturing such a multichip module substrate.

[0009]

The present inventor has studied the means for ensuring the contact between the spherical bump and the substrate electrode, paying attention to the fact that the bump of the IC chip is formed in a substantially spherical shape. The present invention has been completed by devising the shape of the electrode layer of the substrate so as to make it easier to contact the bumps as compared with the conventional substrate. In order to achieve the first object, the present invention provides a multi-chip for flip-chip mounting, which includes an electrode layer exposed at the flip-chip pad portion and covered with a surface protective layer at the peripheral portion of the flip-chip pad portion. In a module substrate (hereinafter, simply referred to as a substrate for simplification), the electrode layer extending in the peripheral region near the flip chip pad is raised and exposed higher than the electrode layer of the flip chip pad. There is.

In the present invention, the material used for forming the surface protective layer is not particularly limited, but a suitable material is a photosensitive polyimide resin. By raising and exposing the electrode layer extending in the region near the flip chip pad portion in the peripheral portion higher than the electrode layer of the flip chip pad portion, the electrode layer is
A flat central portion forming a flip chip pad portion,
A dish-shaped concave portion is formed which is composed of a peripheral portion raised from the flip chip pad portion.

In a preferred embodiment of the substrate according to the present invention, a metal layer is formed via an electrically insulating layer so as to be located below an electrode layer extending in the peripheral region near the flip chip pad. Is characterized in that the electrode layer extending in the region near the flip chip pad is raised.
The preferred embodiment is also characterized in that the metal layer is connected to a constant potential power supply. Further, in a preferred embodiment, the metal layer is formed in an annular shape so as to at least partially surround the flip chip pad portion.

In order to achieve the above-mentioned second object, the method of the present invention for manufacturing the above-mentioned substrate comprises a step of forming a metal layer on the substrate, a step of forming a resist layer on the metal layer,
Further, a process of exposing and developing from the resist layer to process the metal layer so that the metal layer is located in the peripheral part of the flip chip pad part, and forming an electrically insulating layer on the substrate on which the predetermined metal layer is formed And a step of forming an electrode layer on the electrically insulating layer, and a step of forming a surface protective layer so as to cover the electrode layer in the peripheral portion of the flip chip pad portion.

Further, another manufacturing method according to the present invention comprises: a step of forming an electrically insulating layer made of a photosensitive synthetic resin on a substrate; a step of forming a resist layer on the electrically insulating layer; A step of exposing and developing from above the resist layer so as to remain in the peripheral portion of the flip chip pad portion and protruding from the flip chip pad portion, and a step of peeling off the residual resist layer And a step of forming an electrode layer on the electrical insulating layer so that the peripheral portion is raised above the flip chip pad portion, and a surface protective layer is formed so as to cover the electrode layer on the peripheral portion of the flip chip pad portion. And a step of performing.

[0014]

According to the first aspect of the invention, the exposed electrode layer forms a dish-shaped concave portion composed of a flat central portion forming the flip chip pad portion and a peripheral portion protruding from the flip chip pad portion. . As a result, the substrate according to claim 1 can be provided with an electrode layer having a shape in which the bumps are more likely to come into contact with each other than a conventional substrate. For example, it is assumed that the IC chip mounted on the substrate has bumps that cannot contact the flat electrode layer of the flip chip pad portion because the bump height is lower than other bumps. However, because of the above-described electrode layer configuration, the bump portion can make the bump portion formed on the substantially spherical surface contact the raised and exposed electrode layer in the peripheral portion of the flip chip pad portion. It becomes easier to contact the electrode layer as compared with the conventional substrate. According to the second aspect of the present invention, by disposing the metal layer below the electrode layer with the electrically insulating layer interposed therebetween, the electrode layer can be easily raised in a desired shape in the peripheral region near the flip chip pad. According to the third aspect of the present invention, the metal layer is connected to a constant potential power source and maintained at a constant potential, whereby it is possible to prevent an accident in which the metal layer is inadvertently charged and electrostatically destroyed.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will now be described in more detail based on embodiments with reference to the accompanying drawings. FIG. 1 is a schematic sectional view of a main part of a first embodiment of a substrate according to the present invention. First Embodiment The substrate 30 shown in FIG. 1 has, as its upper structure, a surface protective layer 32, an electrode metal layer 36, an electrical insulating layer 38 below the electrode metal layer 36, and a flip chip pad portion 3 as an upper structure.
4 has a lower metal layer 42 embedded in the electrical insulating layer 38 below the electrode metal layer 36 at the peripheral portion 40.

The electrode metal layer 36, as shown in FIG.
An electrode connected to the bump B of the IC chip A is formed, and is exposed in the region of the flip chip pad portion 34 and the region of the peripheral portion 40 adjacent to the flip chip pad. Further, the electrode metal layer 36 is composed of a flat central portion as the flip chip pad portion 34 and a raised portion raised at the peripheral portion 40. The flip chip pad portion 34 and the peripheral portion 40 have a dish-shaped concave portion. Is formed. In this embodiment, the height difference H ₁ between the raised portion and the flat central portion of the electrode metal layer 36 is about 3 μm, and the flip chip pad portion 34 is
Has a diameter D ₁ of about 50 to 100 μm. Surface protective layer 32
The electric insulating layer 38 is formed of synthetic resin such as polyimide. The surface protective layer 32 is an electrical insulating layer that protects the electrode metal layer 36 and constitutes an insulating substrate,
The peripheral portion 40 covers the electrode metal layer 34 with a thickness of about 3 μm (T _{1 in} FIG. ₁ ).

The lower metal layer 42 is disposed in the electrically insulating layer 38 to raise the electrode metal layer 36 at the peripheral portion 40, as will be described in the manufacturing process described later.
The lower metal layer 42 has a thickness T ₂ of about 5 as shown in FIG.
The width W ₁ is about 5 μm and the width W ₁ is about 10 μm, and the width W is at least about 5 to 10 μm as shown in FIG.
₂ overlaps with the ridge of the peripheral portion 40 of the electrode metal layer 36. 2A is a diagram showing the planar shape of the lower metal layer 42, and FIG. 2B is a sectional view taken along the line XX of FIG. 2A. The lower metal layer 42 does not necessarily have to be formed continuously in an annular shape as in this embodiment, and may be formed partially as long as the electrode metal layer 34 can be raised at least partially in the peripheral portion 40. , For example in FIG.
It may be intermittently formed at four places in the arrangement as shown in (c). Further, T ₁ , T ₂ , D ₁ and W defined in this embodiment are
The dimensions such as ₁ and W ₂ are not necessarily limited,
It can be appropriately set according to the bump size of the IC chip A to be mounted, the electrode interval, and the like.

The substrate 30 of this embodiment has an electrode metal layer 36.
Are raised at the peripheral portion 40, so that when the IC chip A is mounted on the substrate 30 as shown in FIG.
Is provided with an electrode metal layer 36 having a shape that allows easy contact. That is, at least a part of the bump B having a substantially spherical surface can surely contact the exposed electrode metal layer 36 of the flip chip pad portion 34 and / or the peripheral portion 40. Further, since the bump B of the IC chip A is locked in the dish-shaped recess of the electrode metal layer 36,
When the substrate 30 on which the chip A is mounted is transferred to the reflow furnace, the IC chip A is prevented from moving and being displaced. Further, in a reflow furnace (not shown), I
When the substrate 30 on which the C chip A is mounted is subjected to reflow, at least the bumped exposed portion of the electrode metal layer 36, even if the bump B is not in contact with the flat portion (flip chip pad portion 34) of the electrode metal layer 36. (Peripheral part 4
0), the flip chip pad portion 3 where the substrate 30 is surely exposed by the self-aligning action generated by the surface tension of the melted bump solder as shown in FIG.
4 and the electrode metal layer 36 of the peripheral portion 40. If the lower metal layer 42 is connected to an external constant-potential power source and maintained at a constant potential, it is possible to prevent the lower metal layer 42 from being accidentally charged and electrostatically destroyed.

Next, referring to FIG. 5, the substrate 1 of the first embodiment
The manufacturing process of No. 0 will be described. FIG. 5 is a schematic cross-sectional view of the substrate for explaining each manufacturing process of the substrate 30. In the step (a) of FIG. 5, the insulating film 14 is formed on the silicon substrate 12.
Then, a lowermost metal layer 46 is formed thereon by a sputtering method, and a polyimide layer 48 is further formed thereon by a spin coating method. In step (b), another metal layer 50 is formed, and a resist layer 52 is applied thereon by spin coating. In step (c), the metal layer 50 is exposed to light through a glass mask, and after development, another metal layer 50 is processed into a desired shape, for example, an annular shape shown in FIG. 2A by wet or dry etching. Then, the resist layer 50 is peeled off. As a result, the other metal layer 50 becomes the lower metal layer 42 shown in FIGS. 1 and 2. Step (d)
In, the polyimide layer 54 is formed by the spin coating method. Polyimide layer 54 and underlying polyimide layer 48
Constitutes the electrically insulating layer 38 of FIG. In the step (e), the electrode metal layer 36 is further formed thereon by the sputtering method. Next, a resist layer (not shown) is applied and exposed through a glass mask. After the development, the electrode metal layer 36 is processed into a predetermined shape by wet or dry etching. Finally, in step (f), the resist layer is peeled off, a polyimide layer is formed as a surface protective layer 32 by coating, and the substrate 30 whose essential portion is shown in FIG. 1 is completed.

Second Embodiment FIG. 6 (a) is a schematic sectional view of a main portion of a second embodiment of the substrate according to the present invention, and FIG. 6 (b) is a second embodiment shown in FIG. 6 (a). It is a principal part sectional drawing of the modification of an example. The substrate 60 shown in FIG. 6A has a surface protection layer 62, an electrode metal layer 66, and an electrical insulating layer 68 below the electrode metal layer 66 as its upper structure. In FIG. 6A, 70 is an insulating film,
72 is a silicon substrate.

The electrode metal layer 66 has substantially the same shape as the electrode metal layer 16 of the substrate 30, and as shown in FIG. 6, constitutes an electrode connected to the bump B of the IC chip A, and has a flip chip pad. Area of part 64 and peripheral part 74
Exposed in the area near the flip chip pad. In addition, the electrode metal layer 66 is formed on the flip chip pad portion 64.
Is formed of a flat central portion and a raised portion raised at the peripheral portion 74.
A dish-shaped concave portion is formed in the peripheral portion 74.

In this embodiment, instead of the lower metal layer 42 of the substrate 30 of the first embodiment, an electric insulation layer 68 is formed as described later.
A recess is formed by forming a hole in the electrode, an electrode metal layer 66 is formed on the recess, and the electrode metal layer 66 is shaped like a dish. The surface protection layer 62 is made of polyimide, and covers the electrode metal layer 66 with the peripheral portion 74 of the flip chip pad portion 64. In the present embodiment, the electrode metal layer 66 is formed on the insulating film 70, but as shown in FIG. 6B, another polyimide layer 76 is formed on the insulating film 70 and the electrode layer 66 is formed thereon. Alternatively, the electrode metal layer 66 may be formed.

The substrate 60 of this embodiment is the substrate 3 of the first embodiment.
Like the flip chip pad portion 64, the flip chip pad portion 64 includes a flat central portion and a raised portion that is raised at the peripheral portion 74, and forms a dish-shaped concave portion at the flip chip pad portion 64 and the peripheral portion 74. Therefore, Example 1
The same effect as that of the substrate 30 is obtained.

Next, the manufacturing process of the substrate 60 of the second embodiment shown in FIG. 6A will be described with reference to FIG. Figure 7
[FIG. 7] is a schematic cross-sectional view of a substrate for explaining each manufacturing process of the substrate 60. In step (a) of FIG. 7, an insulating film 70 is formed on the silicon substrate 72, and a photosensitive polyimide layer 68 is formed thereon as an electrically insulating layer by spin coating. In the step (b), a resist layer (not shown) is applied thereon and exposed through a glass mask,
After development, the polyimide layer 68 is processed by wet or dry etching so as to provide a hole having a desired shape, for example, the same size and shape as the dish-shaped recess of the electrode metal layer 66. In the step (c), the electrode metal layer 66 is formed by the sputtering method. Next, a resist layer (not shown) is applied and exposed through a glass mask. After the development, the electrode metal layer 66 is processed into a desired shape by wet or dry etching. Finally, in the step (d), the resist layer is peeled off and polyimide is coated as the surface protection layer 62 to complete the substrate 60 whose essential portion is shown in FIG.

[0025]

According to the present invention, the electrode layer extending in the peripheral area of the flip chip pad in the peripheral portion is raised and exposed higher than the electrode layer of the flip chip pad portion, so that the electrode layer is flipped over. Since it is formed in the shape of a dish-shaped recess with the bottom as the bottom, the electrode layer of the substrate of the present invention has a shape in which the bumps of the IC chip easily come into contact when the IC chip is mounted on the substrate. by this,
The substrate of the present invention can exert the following effects. (1) When mounting the IC chip on the substrate, the bump and the substrate electrode can be surely brought into contact with each other even if the bumps of the IC chip have a slight variation in height. (2) Since the bump of the IC chip moves to the dish-shaped recess of the electrode layer during mounting, the bump of the IC chip is self-aligned with the substrate electrode. Furthermore, IC
When reflowing the substrate on which the chip is mounted and melting the bump solder to bond the electrodes to each other, the self-aligning action caused by the surface tension of the molten solder causes the molten solder to move to the low flip chip pad section. , I
It is possible to correct the displacement of the bump of the C chip with respect to the substrate electrode. (3) Since the bumps of the IC chip are locked in the dish-shaped recesses of the electrodes and are difficult to move from there, even if the substrate on which the IC chip is mounted vibrates due to transfer or the like, the bumps of the IC chip can be removed from the substrate electrodes Undesired phenomena such as movement and displacement are suppressed. By using the substrate according to the present invention having the above effects, it is possible to reliably ensure the conduction between the electrode of the IC chip and the substrate electrode, and thus it is possible to improve the product yield of flip chip mounting. According to the method of the present invention, the substrate according to the present invention can be easily manufactured by forming another metal layer under the electrode layer or forming a hole in the electrically insulating layer under the electrode layer. .

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view of a main part of a first embodiment substrate according to the present invention.

2 (a) is a diagram showing a planar shape of a lower metal layer, and FIG. 2 (b) is a sectional view taken along line XX of FIG. 2 (a).

FIG. 3 is a schematic cross-sectional view of essential parts showing a state in which an IC chip is mounted on a substrate according to the present invention.

FIG. 4 is a schematic cross-sectional view of a main part after a substrate on which an IC chip is mounted is reflowed in a reflow furnace.

FIG. 5 is a schematic cross-sectional view of a substrate for explaining each step of manufacturing the first embodiment substrate.

6 (a) is a schematic cross-sectional view of a main part of a second embodiment of the substrate according to the present invention, and FIG. 6 (b) is a modification of the second embodiment shown in FIG. 6 (a). It is a principal part sectional drawing of an example.

FIG. 7 is a schematic cross-sectional view of a substrate for explaining each step of manufacturing the second embodiment substrate.

FIG. 8 is a schematic cross-sectional view of a main part of a conventional substrate.

FIG. 9 is a schematic cross-sectional view of essential parts showing a state in which an IC chip is mounted on a conventional substrate.

FIG. 10 is a schematic cross-sectional view of a main part after reflow is performed in a reflow furnace on a conventional substrate on which an IC chip is mounted.

FIG. 11 is a schematic cross-sectional view of a substrate for explaining each step of manufacturing a conventional substrate.

[Explanation of symbols]

 12 Silicon Substrate 14 Insulating Film 30 Substrate of First Example According to the Present Invention 32 Surface Protective Layer 34 Flip Chip Pad Part 36 Electrode Metal Layer 38 Electrical Insulating Layer 40 Peripheral Part 42 Lower Metal Layer 46 Bottom Metal Layer 48 Polyimide Layer 50 Another metal layer 52 Resist layer 54 Polyimide layer 60 Substrate 62 Surface protection layer 64 Flip chip pad portion 66 Electrode metal layer 68 Electrical insulating layer 70 Insulating film 72 Silicon substrate 74 Peripheral portion

Claims (6)

[Claims] 1. A multi-chip module substrate for flip chip mounting, comprising an electrode layer exposed at a flip chip pad portion and covered by a surface protective layer at a peripheral portion of the flip chip pad portion, in the peripheral portion of the flip chip pad. A multi-chip module substrate, characterized in that an electrode layer extending to a neighboring region is raised and exposed higher than an electrode layer of a flip chip pad portion. 2. A metal layer is formed via an electrically insulating layer so as to be located below the electrode layer extending to the flip chip pad neighboring region of the peripheral portion, thereby forming a metal layer in the flip chip pad neighboring region. The multi-chip module substrate according to claim 1, wherein the extending electrode layer is raised. 3. The multichip module substrate according to claim 2, wherein the metal layer is connected to a constant potential power source. 4. The multichip module substrate according to claim 2, wherein the metal layer is formed in an annular shape so as to at least partially surround the flip chip pad portion. 5. A step of forming a metal layer on a substrate, a step of forming a resist layer on the metal layer, and further, from above the resist layer so that the metal layer is located in the peripheral portion of the flip chip pad portion. Exposing and developing to process the metal layer, forming an electric insulating layer on a substrate having a predetermined metal layer formed thereon, forming an electrode layer on the electric insulating layer, and flipping. The method of manufacturing a multi-chip module substrate according to claim 1, further comprising the step of forming a surface protective layer so as to cover the electrode layer at a peripheral portion of the chip pad portion. 6. A step of forming an electrically insulating layer made of a photosensitive synthetic resin on a substrate, a step of forming a resist layer on the electrically insulating layer, and the electrically insulating layer remaining in the peripheral portion of the flip chip pad section. Then, exposing the resist layer so that the peripheral portion is raised from the flip chip pad portion, developing, and processing the electrical insulating layer; peeling the remaining resist layer; and flipping the peripheral portion. A step of forming an electrode layer on the electrical insulating layer so as to be raised from the chip pad portion, and a step of forming a surface protective layer so as to cover the electrode layer at the peripheral portion of the flip chip pad portion. The method for manufacturing a multi-chip module substrate according to claim 1, further comprising: