JPH06318700A - Semiconductor circuit and its manufacture - Google Patents

Abstract

PURPOSE:To manufacture a thin-film transistor(TFT) in which high mobility is required and to manufacture a TFT in which a low leakage current is required by a method wherein the active region for the TFT of a matrix part had a catalyst element whose concentration is at a definite value or higher and the concentration of the catalyst element in the TFT for a drive circuit in the periphery is made smaller than a definite value. CONSTITUTION:When a catalyst material in a very small amount is added to an amorphous silicon film, its crystallization is promoted, its crystallization temperature is lowered and its crystallization time can be shortened. As the catalyst material, a simple substance of Ni, Fe, Co or Pt or a compound of their silicides or the like is suitable. In order to promote the crystallization, it is required to make the concentration of at least one out of them 1X10<17>cm<-3> or higher, preferably 5X10<18>cm<-3> or higher. In addition, in a region in which the catalyst material does not exist, the crystallization is not promoted, and the concentration of the catalyst is made 1X10<17>cm<-3> or lower, preferably 1X10<16>cm<-3> or lower.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a thin film transistor (T
The present invention relates to a semiconductor circuit having a plurality of FTs) and a manufacturing method thereof. The thin film transistor manufactured by the present invention is formed on either an insulating substrate such as glass or a semiconductor substrate such as single crystal silicon. The present invention is particularly effective for a semiconductor circuit having a low-speed operation matrix circuit and a high-speed operation peripheral circuit for driving the same, such as a monolithic active matrix circuit (used for a liquid crystal display or the like).

[0002]

2. Description of the Related Art Recently, research has been conducted on an insulating gate type semiconductor device having a thin film active layer (also called an active region) on an insulating substrate. In particular, thin-film insulating gate transistors, so-called thin film transistors (TFTs), have been eagerly studied. These are intended to be used for controlling each pixel in a display device such as a liquid crystal having a matrix structure formed on a transparent insulating substrate and for a driving circuit. Amorphous silicon TFTs and crystalline silicon TFTs are distinguished by the crystalline state.

Generally, the electric field mobility of a semiconductor in an amorphous state is small, and therefore TF which requires high speed operation.
Not available for T. Therefore, recently, research and development of crystalline silicon TFTs have been advanced in order to manufacture higher performance circuits.

A crystalline semiconductor has a larger electric field mobility than an amorphous semiconductor, and therefore can operate at high speed. With crystalline silicon, not only an NMOS TFT but also a PMOS TFT can be obtained, so that a CMOS circuit can be formed. For example, in an active matrix type liquid crystal display device, not only an active matrix portion but also Peripheral circuit (driver etc.) is also C
There is known one having a so-called monolithic structure, which is constituted by a MOS crystalline TFT.

FIG. 3 shows a block diagram of a monolithic active matrix circuit used in a liquid crystal display. A column decoder 1 and a row decoder 2 are provided as a peripheral driver circuit on the substrate 7, and a pixel circuit 4 including a transistor and a capacitor is formed in the matrix region 3, and a wiring 5 is provided between the matrix region and the peripheral circuit. , 6 are connected. The TFT used in the peripheral circuit is required to operate at high speed, and the TFT used in the pixel circuit is required to have a low leak current. Although those characteristics are physically contradictory, it was required to form them on the same substrate at the same time.

However, T produced by the same process
All FTs show similar characteristics. For example, to obtain crystalline silicon, laser crystallization (laser annealing)
However, in the case of silicon crystallized by laser crystallization, T of the matrix region is used.
The FT and the TFT in the peripheral drive circuit area have similar characteristics. Therefore, it is conceivable to adopt thermal crystallization for the matrix region and laser crystallization for the peripheral drive circuit region. For thermal crystallization, annealing at 600 ° C. for a long time of 24 hours or more is performed. Or, annealing at a high temperature of 1000 ° C. or higher was necessary. The former lowers the throughput, while the latter limits the substrate to quartz.

[0007]

Although the present invention is intended to provide an answer to such a difficult problem, it is not desirable that the process is complicated and the yield is reduced and the cost is increased. . The gist of the present invention is to easily manufacture two types of TFTs, a TFT that requires high mobility and a TFT that requires low leakage current, while maintaining mass productivity while maintaining minimum productivity. To divide.

[0008]

As a result of the research conducted by the present inventor,
It has been revealed that the addition of a trace amount of a catalyst material to the substantially amorphous silicon coating can promote crystallization, lower the crystallization temperature, and shorten the crystallization time. Suitable catalyst materials are simple substances of nickel (Ni), iron (Fe), cobalt (Co), platinum (Pt), or compounds thereof such as silicides. Specifically, a film, particles, clusters or the like having these catalytic elements are formed in close contact with each other under or on the amorphous silicon film, or these catalytic elements are formed in the amorphous silicon film by a method such as an ion implantation method. Can then be crystallized by thermal annealing at a suitable temperature, typically below 580 ° C.

Further, when forming an amorphous silicon film by a chemical vapor deposition method (CVD method), in the source gas, and when forming an amorphous silicon film by a physical vapor phase method such as sputtering, These catalyst materials may be added to the film forming material such as the target and the vapor deposition source. As a matter of course, the higher the annealing temperature, the shorter the crystallization time. In addition, the higher the concentration of nickel, iron, cobalt, and platinum, the lower the crystallization temperature and the shorter the crystallization time. According to the research by the present inventor, in order to promote crystallization, the concentration of at least one of these elements is 1 × 10 ¹⁷ cm ⁻³ or more,
It has been found that it is necessary to preferably exist at 5 × 10 ¹⁸ cm ⁻³ or more.

Since all of the above-mentioned catalyst materials are not preferable for silicon, it is desirable that their concentration be as low as possible. In the study of the present inventors, it is desired that the total concentration of these catalyst materials does not exceed 1 × 10 ²⁰ cm ⁻³ .

Further, it should be noted that the amorphous state can be maintained without promoting crystallization at all in the region where such a catalyst material does not exist. For example, it is usually free of such catalytic materials, typically at a concentration below 1 × 10 ¹⁷ cm ⁻³ , preferably 1 × 1.
Crystallization of amorphous silicon below 0 ¹⁶ cm ^-3 is 60
It starts at a temperature of 0 ° C or higher, but does not proceed at 580 ° C or lower. However, in an atmosphere of 300 ° C. or higher, hydrogen necessary to neutralize dangling bonds in amorphous silicon is released.

In the present invention, the amorphous silicon film is formed by utilizing the characteristics of the crystallization by the catalyst material described above, and a part thereof is selectively crystallized to be used in the pixel circuit of the active matrix circuit. It is used for a TFT that requires a low leak current, and another amorphous portion is newly crystallized by a laser, and this is used as a TFT capable of high-speed response such as used in a peripheral drive circuit. To do. As a result, a circuit having contradictory transistors of low leakage current and high speed operation can be simultaneously formed on the same substrate.

What is essential in the present invention is that the catalytic element must not be mixed in the region to be laser-crystallized. That is, the amorphous silicon mixed with the catalytic element is crystallized, but the silicon film once crystallized does not become a silicon film exhibiting more excellent characteristics (for example, higher mobility) even by laser irradiation. On the contrary, this is important in the sense that the region crystallized by the catalytic element does not lose its characteristics even by laser irradiation. That is, it is not always necessary to selectively perform laser irradiation.

Considering the case where the catalytic element is distributed over the entire surface of the amorphous silicon film, it can be seen that only unfavorable results are obtained. For example, when the catalytic element is distributed over the entire surface, the thermal crystallization is first performed, and then the laser crystallization is selectively performed, it is not possible to improve the silicon film by the laser crystallization as described above. On the street.

On the contrary, considering the step of first performing selective laser crystallization and then thermal crystallization, actually, laser crystallization is performed at 350 ° C. in order to release excess hydrogen from the amorphous silicon film. Or more, preferably 45
Although it is required to heat to 0 ° C. or higher, even with this degree of heating, fine crystallization proceeds due to the action of the catalyst, and the effect of laser crystallization is reduced. For this reason, the catalyst material should not be present in the region where laser crystallization occurs.

On the other hand, the present invention has an advantage that the process can be shortened because hydrogen can be discharged from the region to be laser-crystallized in the first thermal crystallization stage. Hereinafter, the present invention will be described in more detail with reference to examples.

[0017]

【Example】

[Embodiment 1] FIG. 1 shows a cross-sectional view of a manufacturing process of this embodiment. First, a 2000 Å-thick silicon oxide base film 11 was formed on a substrate (Corning 7059) 10 by a sputtering method. Furthermore, by the plasma CVD method,
Thickness 500-1500Å, for example 1500Å
Type) amorphous silicon film 12 was deposited. Continuously, by a sputtering method, a nickel silicide film having a thickness of 5 to 200 Å, for example, 20 Å (chemical formula NiSi _x , 0.
4 ≦ x ≦ 2.5, for example, x = 2.0) 13 was selectively formed as shown in the figure. (Fig. 1 (A))

Then, this was annealed at 500 ° C. for 4 hours in a reducing atmosphere to be crystallized. As a result, the amorphous silicon film below the nickel silicide film 13 was crystallized into the crystalline silicon film 12b. On the other hand, the silicon film in the region where the nickel silicide film did not exist remained in the amorphous state (12a). Next, the region in the amorphous state was selectively irradiated with laser light to crystallize the region.

A KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) was used as the laser, but other lasers such as XeF excimer laser (wavelength 353 nm), XeCl excimer laser (wavelength 308 nm), ArF excimer laser (wavelength 193 nm) were used. ) Or the like may be used. The energy density of the laser is 200 to 500 mJ / cm ² , for example 350 m.
J / cm ² was applied, and irradiation was performed for 2 to 10 shots, for example, 2 shots per location. When irradiating the laser,
It was heated to 0 to 450 ° C, for example 400 ° C. As is clear from FIG. 3, since there is a considerable distance between the region to be laser-crystallized (peripheral circuit region) and the region sufficient for thermal crystallization (matrix region), no photolithography step is required, and The laser irradiation did not change the quality of the previously thermally crystallized region. (Fig. 1
(B))

The silicon film thus obtained was patterned by photolithography to form island-shaped silicon regions 14a (peripheral drive circuit region) and 14b (matrix region). Further, a silicon oxide film 15 having a thickness of 1000 Å was deposited as a gate insulating film by the sputtering method. For sputtering, silicon oxide was used as a target, and the substrate temperature during sputtering was 2
00-400 ° C., for example 350 ° C., the sputtering atmosphere is oxygen and argon, argon / oxygen = 0-0.5,
For example, 0.1 or less. Subsequently, a thickness of 6000 to 8000 Å, for example, 6000 Å by the low pressure CVD method.
Of silicon film (containing 0.1 to 2% phosphorus) was deposited.
It is desirable that the steps of forming the silicon oxide and the silicon film are continuously performed. Then, the silicon film was patterned to form the gate electrodes 16a, 16b, 16c. (Fig. 1 (C))

Next, impurities (phosphorus and boron) were implanted into the silicon region by plasma doping using the gate electrode as a mask. Phosphine (PH ₃ ) and diborane (B ₂ H ₆ ) are used as the doping gas,
In the former case, the acceleration voltage is 60 to 90 kV, for example 80
kV, in the latter case 40-80 kV, for example 65 kV
And The dose amount was 1 × 10 ¹⁵ to 8 × 10 ¹⁵ cm ⁻² , for example, phosphorus was 2 × 10 ¹⁵ cm ⁻² and boron was 5 × 10 ¹⁵ . As a result, N-type impurity regions 17a and P-type impurity regions 17b and 17c are formed. (Fig. 1 (D))

Then, the impurities were activated by laser annealing. As the laser, a KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) was used, but other lasers, for example, XeF excimer laser (wavelength 353 nm), XeCl excimer laser (wavelength 308 nm), ArF excimer laser (wavelength 193 nm) and the like are used. You may use. The energy density of the laser is 200 to 400 mJ / cm ² , for example, 2
The irradiation was performed at 50 mJ / cm ^2, and ² to 10 shots, for example, 2 shots were irradiated at one place. The substrate may be heated to 200 to 450 ° C. during laser irradiation. Thus, impurity regions 17a to 17c are activated.

Then, a silicon oxide film 18 having a thickness of 6000Å is formed.
Is formed by plasma CVD as an interlayer insulator,
Further, the thickness is 500 to 100 by the sputtering method.
0Å, eg 800Å indium tin oxide film (ITO)
Was formed, and this was patterned to form 19 pixel electrodes. Next, form a contact hole in the interlayer insulator,
Electrodes / wirings 20a, 20 of the peripheral drive circuit TFT are made of a metal material, for example, a multilayer film of titanium nitride and aluminum.
b, 20c, electrode / wiring 2 of the matrix pixel circuit TFT
0d and 20e were formed. Finally, annealing was performed at 350 ° C. for 30 minutes in a hydrogen atmosphere of 1 atm. The semiconductor circuit is completed through the above steps. (FIG. 1 (E)) When the concentration of nickel contained in the active region of the obtained TFT was measured by the secondary ion mass spectrometry (SIMS) method, it was 1 × 10 ^{18 to} 5 × 10 ¹⁸ cm ^{−3 in the} pixel region. In the peripheral driving region, it was below the measurement limit (1 × 10 ¹⁶ cm ⁻³ ).

[Embodiment 2] FIG. 2 shows a cross-sectional view of a manufacturing process of this embodiment. A 2000 Å-thick silicon oxide film 22 was formed on a substrate (Corning 7059) 21 by a sputtering method. Next, an amorphous silicon film 23 having a thickness of 200 to 1500 Å, for example, 500 Å, was deposited by the plasma CVD method. Then, the amorphous silicon film 23 is masked with a photoresist 24,
Nickel ions were selectively implanted by an ion implantation method to form a region 25 containing nickel in an amount of 1 × 10 ¹⁸ to 2 × 10 ¹⁹ cm ⁻³ , for example, 5 × 10 ¹⁸ cm ⁻³ . The depth of this region 26 is 200 to 500 Å,
The optimum acceleration energy was selected accordingly. (Fig. 2 (A))

Then, the amorphous silicon film was crystallized by annealing at 500 ° C. for 4 hours in a reducing atmosphere.
By this crystallization process, the nickel-implanted region 2
3b crystallized. On the other hand, the region 23a into which nickel was not implanted remained in the amorphous state. next,
Laser irradiation was selectively applied to the region in the amorphous state to crystallize the region.

As the laser, a KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) was used. Laser energy density is 200-500 mJ
/ Cm ² , for example, 350 mJ / cm ^2, and ² to 10 shots, for example, 2 shots, were irradiated per one location. At the time of laser irradiation, the substrate is heated to 200 to 450 ° C., for example 400
Heated to ° C. (Fig. 2 (B))

Then, this silicon film was patterned to form island-shaped silicon regions 26a (peripheral drive circuit regions) and 26b (matrix pixel circuit region). Furthermore, tetra-ethoxy-silane (Si (OC
₂ H ₅ ) ₄ , TEOS) and oxygen are used as raw materials to form a gate insulating film of a TFT by a plasma CVD method.
000Å silicon oxide 27 was formed. As the raw material, trichlorethylene (C ₂ HCl ₃ ) was used in addition to the above gas. Before film formation, 400 SCCM of oxygen is flown into the chamber, the substrate temperature is 300 ° C., the total pressure is 5 Pa, and the RF power is 150.
Plasma was generated with W and kept in this state for 10 minutes. Then, add 300 SCCM oxygen and 1 TEOS to the chamber.
A silicon oxide film was formed by introducing 5 SCCM and 2 SCCM of trichlorethylene. The substrate temperature, RF power, and total pressure were 300 ° C., 75 W, and 5 Pa, respectively. After the film formation was completed, 100 Torr of hydrogen was introduced into the chamber, and hydrogen annealing was performed at 350 ° C. for 35 minutes.

Subsequently, by the sputtering method,
An aluminum film (containing 2% of silicon) having a thickness of 6000 to 8000Å, for example, 6000Å was deposited. Instead of aluminum, tantalum, tungsten, titanium, molybdenum may be used. It should be noted that it is desirable that the steps of forming the silicon oxide 27 and the aluminum film be continuously performed.
Then, the aluminum film was patterned to form the gate electrodes 28a, 28b, 28c of the TFT. Further, the surface of this aluminum wiring was anodized to form oxide layers 29a, 29b and 29c on the surface. Anodization was performed in a 1-5% ethylene glycol solution of tartaric acid. The thickness of the obtained oxide layer was 2000Å. (Fig. 2 (C))

Next, an impurity (phosphorus) was injected into the silicon region by the plasma doping method. Phosphine (PH ₃ ) was used as the doping gas, and the acceleration voltage was 6
It was set to 0 to 90 kV, for example, 80 kV. 1 x dose
10 ¹⁵ to 8 × 10 ¹⁵ cm ^-2 , for example, 2 × 10 ¹⁵ cm ^-2
And Thus, the N-type impurity region 30a was formed. Furthermore, this time the left TFT (N-channel type TF
T) is masked with a photoresist, and the peripheral circuit region TFT (P channel T
Impurities (boron) were implanted into the silicon regions of the FT) and the matrix region TFT. Diborane (B ₂ H ₆ ) was used as a doping gas, and the acceleration voltage was 50 to 80 k.
V, for example, 65 kV. Dose amount is 1 × 10 ¹⁵ to 8
× 10 ¹⁵ cm ^-2 , eg 5 more than the previously implanted phosphorus
It was set to × 10 ¹⁵ cm ^-2 . Thus, P type impurity regions 30b and 30c were formed.

After that, the impurities were activated by the laser annealing method. As a laser, a KrF excimer laser (wavelength 248 nm, pulse width 20 nse
c) was used. The energy density of the laser is 200-
400mJ / cm ^2, for example, with 250mJ / cm ^2,
Irradiation was performed for 2 to 10 shots, for example, 2 shots, at one location. (Fig. 2 (D))

Then, as an interlayer insulator, a thickness of 2000 Å
CV using TEOS as a raw material for the silicon oxide film 31 of
It was formed by the D method, and further, an indium tin oxide film (ITO) having a thickness of 500 to 1000 Å, for example, 800 Å was deposited by the sputtering method. Then, this was etched to form the pixel electrode 32. Further, a contact hole is formed in the interlayer insulator 31, and a metal material,
For example, a source / drain electrode / wiring 33a, 33b, 33c of the peripheral driver circuit TFT and an electrode / electrode of the pixel circuit TFT formed of a multilayer film of titanium nitride and aluminum
The wirings 33d and 33e are formed. The semiconductor circuit is completed through the above steps. (Fig. 2 (E))

In the manufactured semiconductor circuit, the characteristics of the TFT in the peripheral driver circuit region were not inferior to those manufactured by the conventional laser crystallization. For example, the shift register manufactured according to this embodiment has a drain voltage of 15 V, 11 MHz, and 17 V, 16 M.
The operation of Hz was confirmed. Also, in the reliability test, no difference from the conventional one was found. Further, regarding the characteristics of the TFT (pixel circuit) in the matrix region, the leak current was 10 ⁻¹³ A or less.

[0033]

According to the present invention, a crystalline silicon TFT capable of high-speed operation and a crystalline silicon TFT featuring a low leak current can be formed on the same substrate.
When this is applied to a monolithic active matrix liquid crystal display or the like, mass productivity and characteristics can be improved. Of course, the present invention is not limited to the liquid crystal display, but can be effectively used in a semiconductor integrated circuit configured using other TFTs.

The present invention can also improve the throughput by crystallization of silicon at a low temperature such as 500 ° C. and a short time of 4 hours. In addition, conventionally, when a process of 600 ° C. or higher is adopted, shrinkage or warpage of the glass substrate has been a problem as a cause of a decrease in yield, but by using the present invention, such a problem is solved at once. Was done.

Furthermore, this means that a large-area substrate can be processed at one time. That is, by processing a large-area substrate, a large number of semiconductor circuits (matrix circuits, etc.) can be cut out from one substrate, and the unit price can be significantly reduced. Thus, the present invention is an industrially useful invention.

[Brief description of drawings]

1A to 1C are cross-sectional views of a manufacturing process of Example 1.

2A to 2C are cross-sectional views of a manufacturing process of Example 2.

FIG. 3 shows a configuration example of a monolithic active matrix circuit.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 10 ... Substrate 11 ... Base insulating film (silicon oxide) 12 ... Amorphous silicon film 13 ... Nickel silicide film 14 ... Island silicon region 15 ... Gate insulating film (silicon oxide) 16・ ・ ・ Gate electrode (phosphorus-doped silicon) 17 ・ ・ ・ Source / drain regions 18 ・ ・ ・ Interlayer insulator 19 ・ ・ ・ Pixel electrode (ITO) 20 ・ ・ ・ Metal wiring / electrode (titanium nitride / aluminum)

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Internal reference number FI Technical indication H01L 21/20 8122-4M 21/265 21/324 Z 8617-4M 21/336 9056-4M H01L 29 / 78 311 Y

Claims (12)

[Claims] 1. A monolithic active matrix circuit formed on a substrate, wherein an active region of a thin film transistor in a matrix portion has a catalytic element of a concentration of 1 × 10 ¹⁷ cm ⁻³ or higher, and the peripheral drive circuit. The concentration of the catalytic element in the thin film transistor of is 1 × 10 ¹⁷ cm ⁻³
A semiconductor circuit characterized by being less than. 2. The concentration of the catalytic element in the active region of the thin film transistor of the matrix portion according to claim 1, which is 5 × 10 5.
A semiconductor circuit having a size of ¹⁸ cm ^-3 or more. 3. The semiconductor circuit according to claim 1, wherein the concentration of the catalytic element in the thin film transistor of the peripheral drive circuit is less than 1 × 10 ¹⁶ cm ⁻³ . 4. The semiconductor circuit according to claim 1, wherein the catalyst element is at least one of nickel, iron, cobalt and platinum. 5. The concentration of the catalytic element according to claim 1,
A semiconductor circuit characterized by being defined by a minimum value measured by secondary ion mass spectrometry. 6. The first step of selectively forming an amorphous silicon film and a substance having a catalytic element in close contact therewith, and annealing the catalyst at a temperature lower than a normal crystallization temperature of amorphous silicon to obtain the catalyst. It has a second step of crystallizing an amorphous silicon film in a portion where elements are in close contact, and a third step of crystallizing an amorphous silicon region where no catalyst element exists by laser or strong light equivalent thereto. And a method for manufacturing a semiconductor circuit. 7. A first step of introducing a catalytic element into an amorphous silicon film and annealing at a temperature lower than a normal crystallization temperature of amorphous silicon to form an amorphous silicon film in a portion in which the catalytic element is adhered. A method of manufacturing a semiconductor circuit, comprising: a second step of crystallizing; and a third step of crystallizing an amorphous silicon region in which a catalytic element does not exist by laser or strong light equivalent thereto. 8. At least two thin film transistors are provided on a substrate, and the active area of the first thin film transistor is 1 ×.
Having a catalytic element concentration of 10 ¹⁷ cm ^-3 or higher,
The concentration of the catalytic element in the second thin film transistor is 1 × 1
A semiconductor circuit characterized by being less than 0 ¹⁷ cm ^-3 . 9. The concentration of the catalytic element in the active region of the first thin film transistor according to claim 8, which is 5 × 10 ¹⁸ c.
A semiconductor circuit characterized by being m ^-3 or more. 10. The semiconductor circuit according to claim 8, wherein the concentration of the catalytic element in the second thin film transistor is less than 1 × 10 ¹⁶ cm ⁻³ . 11. The semiconductor circuit according to claim 8, wherein the catalytic element is at least one of nickel, iron, cobalt, and platinum. 12. The semiconductor circuit according to claim 8, wherein the concentration of the catalytic element is defined by a minimum value measured by secondary ion mass spectrometry.