JP3431903B2 - Semiconductor circuit and semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

The present invention relates to a thin film transistor (T
FT) and its manufacturing method, and a semiconductor circuit having a plurality thereof and a manufacturing method thereof. The thin film transistor manufactured by the present invention is formed on either an insulating substrate such as glass or a semiconductor substrate such as single crystal silicon. In particular, the present invention is effective in a semiconductor circuit having a low-speed operation matrix circuit and a high-speed operation peripheral circuit that drives the same, such as a monolithic active matrix circuit (used for a liquid crystal display or the like).

[0002]

2. Description of the Related Art Recently, research has been conducted on an insulating gate type semiconductor device having a thin film active layer (also called an active region) on an insulating substrate. In particular, thin-film insulating gate transistors, so-called thin film transistors (TFTs), have been eagerly studied. These are intended to be used for controlling each pixel in a display device such as a liquid crystal having a matrix structure formed on a transparent insulating substrate and for a driving circuit. Amorphous silicon TFTs and crystalline silicon TFTs are distinguished by the crystalline state.

Generally, the electric field mobility of a semiconductor in an amorphous state is small, and therefore TF which requires high speed operation.
Not available for T. Therefore, recently, research and development of crystalline silicon TFTs have been advanced in order to manufacture higher performance circuits.

A crystalline semiconductor has a larger electric field mobility than an amorphous semiconductor, and therefore can operate at high speed. With crystalline silicon, not only an NMOS TFT but also a PMOS TFT can be obtained, so that a CMOS circuit can be formed. For example, in an active matrix type liquid crystal display device, not only an active matrix portion but also Peripheral circuit (driver etc.) is also C
There is known one having a so-called monolithic structure, which is constituted by a MOS crystalline TFT.

[0005]

FIG. 3 shows a block diagram of a monolithic active matrix circuit used in a liquid crystal display. A column decoder 1 and a row decoder 2 are provided as a peripheral driver circuit on the substrate 7, and a pixel circuit 4 including a transistor and a capacitor is formed in the matrix region 3, and a wiring 5 is provided between the matrix region and the peripheral circuit. , 6 are connected. The TFT used in the peripheral circuit is required to operate at high speed, and the TFT used in the pixel circuit is required to have a low leak current. Although those characteristics are physically contradictory, it was required to form them on the same substrate at the same time.

However, T produced by the same process
All FTs show similar characteristics. For example, TFTs using crystalline silicon manufactured by thermal annealing, TFTs in the matrix region and TFTs in the peripheral drive circuit region have similar characteristics, and a low leak current that can be used in the pixel circuit and a peripheral drive circuit It has been difficult to satisfy both the characteristics of high mobility that can be used. Further, it is possible to solve the above-mentioned difficulties by using a combination of thermal annealing and crystallization by selective laser irradiation (laser annealing). In this case, the TFT by thermal annealing can be used in the matrix region, and the TFT by laser annealing can be used in the peripheral driving circuit region, but the crystallinity of the silicon crystallized by laser crystallization is extremely low and there is no defect. It was difficult to use in the required peripheral drive circuit. The present invention is intended to provide an answer to such a difficult task.

[0007]

As a result of the research conducted by the present inventor,
It has been revealed that the addition of a trace amount of a catalyst material to the substantially amorphous silicon coating can promote crystallization, lower the crystallization temperature, and shorten the crystallization time. Suitable catalyst materials are simple substances of nickel (Ni), iron (Fe), cobalt (Co), platinum (Pt), or compounds thereof such as silicides. Specifically, a coating, particles, clusters, etc. having these catalytic elements are brought into close contact with the amorphous silicon, or these catalytic elements are introduced into the amorphous silicon film by a method such as an ion implantation method, and then this is appropriately applied. It can be crystallized at various temperatures, typically below 580 ° C., and by thermal annealing for up to 8 hours.

When these catalyst elements are formed into a film, the catalyst element concentration is sufficiently low, so that the film thickness becomes extremely thin. Examples of the method for forming such a coating include a method using a vacuum device such as sputtering and vacuum deposition, a spin coating method, a dip (immersion) method.
The method that can be performed under atmospheric pressure, such as the method, is also simple and highly productive. In this case, an acetic acid salt, a nitric acid salt, an organic acid salt or the like containing a catalytic element may be dissolved in an appropriate solvent and adjusted to an appropriate concentration.

As a matter of course, the higher the annealing temperature, the shorter the crystallization time. In addition, the higher the concentration of nickel, iron, cobalt, and platinum, the lower the crystallization temperature and the shorter the crystallization time. In the present inventors' study, in order to proceed crystallization in a thermal equilibrium, the concentration of at least one of these elements is 1 × 10 ¹⁷ c.
It has been found necessary to be present at m ^-3 or higher, preferably at 5 × 10 ¹⁸ cm ^-3 or higher.

However, since the above-mentioned catalyst materials are all unfavorable materials for silicon, it is desirable that their concentration be as low as possible. By irradiating a coating having these catalytic substances with a laser or strong light equivalent thereto, the present inventor has succeeded in arranging a catalytic element in a much smaller amount than that required for thermal equilibrium crystallization, typically 1 / It was found that a remarkable crystal growth can be obtained at 10 or less.

Specifically, the concentrations of these catalytic elements are
1 × 10 ¹⁵ to 1 × 10 ¹⁹ cm ⁻³ , preferably 1 × 10 ¹⁶
Crystallization can be promoted by irradiating a laser having an appropriate energy or strong light equivalent thereto to a dose of -5 × 10 ¹⁷ cm ^-3 . The energy density of a laser or strong light equivalent thereto depends on the wavelength of the light source to be irradiated, the pulse width, the temperature of the film of amorphous silicon (or crystalline silicon), and the like. For example, the temperature of amorphous silicon is 100 to 450 ° C., preferably 250 to
At 350 ° C., crystallization could be achieved with a smaller catalyst element concentration.

In the present invention, taking advantage of the characteristics of crystallization by the above-mentioned catalyst material, an amorphous silicon film is formed and a material having a catalytic element is brought into close contact with or mixed with it, and then a laser or strong light equivalent thereto is emitted. By irradiation, a crystallized silicon film is obtained. At this time, a material having a catalytic element is selectively adhered to or mixed with a part of the substrate, and then a laser or an intense light equivalent thereto is irradiated, or a laser or an intense light equivalent thereto is scanned. Thus, silicon films having different crystallinity can be formed over the same substrate. Further, before laser irradiation, the temperature is 350 to 650 ° C., preferably 400 to 550 ° C. for 1 to 24 hours, preferably 2
Preliminary annealing may be performed for about 8 hours.

By doing so, it is possible to improve the degree of crystallization, weaken the barrier of the crystal grain boundary that cannot be removed only by thermal annealing, and crystallize the amorphous component remaining in the grain boundary. I was able to do it. Further, when such a method is adopted, even if the degree of crystallization due to thermal annealing is low, complete crystallization can be achieved by subsequent laser irradiation, so that the catalyst element The concentration can be reduced.

In the present invention, the crystallinity of the region to which the catalytic element is added is higher than that of the region containing less catalytic element by the subsequent irradiation of laser or the like, regardless of the presence or absence of preliminary annealing before the irradiation of laser or the like. Also improves. In addition, the characteristics of the obtained TFT were the same or higher than those of the conventional general laser annealing (laser irradiation of amorphous silicon film) method. Further, by suppressing the energy of the laser or the like to be lower than that of ordinary laser annealing, such characteristics were stably obtained. On the other hand, crystallization was achieved by laser irradiation even in the region where no catalytic element was added, but in this case as well, stable control of the characteristics was achieved by suppressing the energy of the laser etc. to a lower level than in ordinary laser annealing. Was given.

By utilizing such characteristics, it is possible to use a region with a small amount of catalytic element for a low leak TFT such as a pixel circuit of an active matrix circuit, and use a region with a large amount of catalytic element for a high speed TFT such as a peripheral drive circuit. Is. As a result, a circuit having contradictory transistors of low leakage current and high-speed operation can be simultaneously formed on the same substrate.

In the present invention, T which requires a low leakage current
The concentration of the catalytic element in the portion forming the FT is required to be lower than the concentration of the catalytic element in the portion forming the high speed TFT. In addition to this, in order to make the difference between the two more clear, In order to further reduce the leakage current,
The concentration of the catalytic element in the active region of the TFT, which requires a low leak current, is desired to be less than 1 × 10 ¹⁵ cm ⁻³ .
Hereinafter, the present invention will be described in more detail with reference to examples.

Example 1 FIG. 1 shows a cross-sectional view of the manufacturing process of this example. First, the substrate (Corning 7059) 1
A base film 11 of silicon oxide having a thickness of 2000 Å was formed on the surface of the substrate 0 by sputtering. Furthermore, plasma CVD
Depending on the method, the thickness is 500-1500Å, for example 500Å
Intrinsic (I-type) amorphous silicon film 12 was deposited. Continuously, by a sputtering method, a silicon film containing nickel at 1 × 10 ¹⁸ cm ^-3 (thickness 5 to 200 Å,
For example, 50Å) 13 was selectively formed as shown in the figure. A lift-off method was used to form the nickel film 13. A spin coating method may be used instead of the sputtering method. (Fig. 1 (A))

Next, the entire surface of the amorphous silicon film 12 was irradiated with laser light for crystallization. The laser is a KrF excimer laser (wavelength 248n
m, pulse width 20 nsec) was used, but other lasers such as XeF excimer laser (wavelength 353) were used.
nm), XeCl excimer laser (wavelength 308n
m), ArF excimer laser (wavelength 193 nm), etc. may be used. Laser energy density is 200
˜500 mJ / cm ² , for example 350 mJ / cm ^2, and irradiation for 2 to 10 shots, for example 2 shots, per place. Substrate 100-450 during laser irradiation
It was heated to ℃, for example, 300 ℃. As a result, the amorphous silicon film was completely crystallized, but nickel promoted crystallization in the silicon film 12a below the nickel silicide film 13, so that the crystallinity was better than that of the silicon film 12b in the other regions. there were. (Fig. 1 (B))

The silicon film thus obtained was patterned by photolithography to form island-shaped silicon regions 14a (peripheral drive circuit regions) and 14b (matrix region). Further, a silicon oxide film 15 having a thickness of 1000 Å was deposited as a gate insulating film by the sputtering method. For sputtering, silicon oxide was used as a target, and the substrate temperature during sputtering was 2
00-400 ° C., for example 350 ° C., the sputtering atmosphere is oxygen and argon, argon / oxygen = 0-0.5,
For example, 0.1 or less. Subsequently, the thickness is 3000 to 8000Å, for example, 6000Å by the low pressure CVD method.
Of silicon film (containing 0.1 to 2% phosphorus) was deposited.
It is desirable that the steps of forming the silicon oxide film 15 and the silicon film are continuously performed. Then, the silicon film was patterned to form the gate electrodes 16a, 16b, 16c. (Fig. 1 (C))

Next, impurities (phosphorus and boron) were implanted into the silicon region by plasma doping using the gate electrode as a mask. Phosphine (PH ₃ ) and diborane (B ₂ H ₆ ) are used as the doping gas,
In the former case, the acceleration voltage is 60 to 90 kV, for example 80
kV, in the latter case 40-80 kV, for example 65 kV
And The dose amount was 1 × 10 ¹⁵ to 8 × 10 ¹⁵ cm ⁻² , for example, phosphorus was 2 × 10 ¹⁵ cm ⁻² and boron was 5 × 10 ¹⁵ . As a result, N-type impurity regions 17a and P-type impurity regions 17b and 17c are formed.

Then, the impurities were activated by laser annealing. As the laser, a KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) was used, but other lasers such as XeF excimer laser (wavelength 353 nm), XeCl excimer laser (wavelength 308 nm), ArF excimer laser (wavelength 193 nm) and the like are used. You may use. The energy density of the laser is 200 to 400 mJ / cm ² , for example, 2
The irradiation was performed at 50 mJ / cm ² for 2 to 10 shots, for example, 2 shots per location. During the laser irradiation, the substrate was heated to 100 to 450 ° C, for example 250 ° C.
In this way, the impurity regions 17a to 17c are activated. (Fig. 1 (D))

Then, a silicon oxide film 18 having a thickness of 6000Å is formed.
Is formed by plasma CVD as an interlayer insulator,
Further, the thickness is 500 to 100 by the sputtering method.
0Å, eg 800Å indium tin oxide film (ITO)
Was formed, and this was patterned to form a pixel electrode 19. Next, form a contact hole in the interlayer insulator,
Electrodes / wirings 20a, 20 of the peripheral drive circuit TFT are made of a metal material, for example, a multilayer film of titanium nitride and aluminum.
b, 20c, electrode / wiring 2 of the matrix pixel circuit TFT
0d and 20e were formed. Finally, annealing was performed at 350 ° C. for 30 minutes in a hydrogen atmosphere of 1 atm. The semiconductor circuit is completed through the above steps. (Fig. 1 (E))

The concentration of nickel contained in the active region of the TFT obtained in this example was measured by secondary ion mass spectrometry (SIM).
When analyzed by the S) method, T of the peripheral drive circuit area is
1 × 10 ^{17 to} 5 × 10 ¹⁷ cm ⁻³ of nickel was obtained from the FT, and the measurement limit (1 × 10 7
Nickel below ¹⁶ cm ^-3 ) was detected.

[Embodiment 2] FIG. 2 shows a cross-sectional view of a manufacturing process of this embodiment. A 2000 Å-thick silicon oxide film 22 was formed on a substrate (Corning 7059) 21 by a sputtering method. Next, an amorphous silicon film 23 having a thickness of 200 to 1500 Å, for example, 500 Å, was deposited by the plasma CVD method. Then, the amorphous silicon film 23 is masked with a photoresist 24,
Nickel ions were selectively implanted by an ion implantation method to form a region 25 containing nickel in an amount of 1 × 10 ¹⁵ to 1 × 10 ¹⁸ cm ⁻³ , for example, 5 × 10 ¹⁶ cm ⁻³ . The depth of this area 25 is 200 to 500 Å,
The optimum acceleration energy was selected accordingly. The use of the ion implantation method as in the present embodiment was advantageous in controlling the nickel concentration as compared with the first embodiment. (Fig. 2 (A))

Next, the substrate is heated to 350 to 65 in a nitrogen atmosphere.
0 ° C., preferably 400-550 ° C., eg 500 ° C.,
Annealing was performed for 2 hours. As a result, preliminary crystallization proceeded in the nickel-doped region. Then, the entire surface of the amorphous silicon film 23 was selectively irradiated with laser light to crystallize the region. As a laser, a KrF excimer laser (wavelength 248
nm, pulse width 20 nsec) was used. The energy density of the laser was 200 to 500 mJ / cm ² , for example 350 mJ / cm ^2, and the irradiation was performed for 2 to 10 shots, for example, 2 shots, per location. During the laser irradiation, the substrate was heated to 100 to 450 ° C, for example 350 ° C. As a result, the silicon film was crystallized, but the crystallinity of the nickel-implanted region 23a was better than that of the other region 23b. (Fig. 2 (B))

Thereafter, this silicon film was patterned to form island-shaped silicon regions 26a (peripheral drive circuit regions) and 26b (matrix pixel circuit region). Furthermore, tetra-ethoxy-silane (Si (OC
₂ H ₅ ) ₄ , TEOS) and oxygen are used as raw materials to form a gate insulating film of a TFT by a plasma CVD method.
000Å silicon oxide 27 was formed. As the raw material, trichlorethylene (C ₂ HCl ₃ ) was used in addition to the above gas. Before film formation, 400 SCCM of oxygen is flown into the chamber, the substrate temperature is 300 ° C., the total pressure is 5 Pa, and the RF power is 150.
Plasma was generated with W and kept in this state for 10 minutes. Then, add 300 SCCM oxygen and 1 TEOS to the chamber.
A silicon oxide film was formed by introducing 5 SCCM and 2 SCCM of trichlorethylene. The substrate temperature, RF power, and total pressure were 300 ° C., 75 W, and 5 Pa, respectively. After the film formation was completed, 100 Torr of hydrogen was introduced into the chamber, and hydrogen annealing was performed at 350 ° C. for 35 minutes.

Subsequently, by the sputtering method,
An aluminum film (containing 2% of silicon) having a thickness of 6000 to 8000Å, for example, 6000Å was deposited. Instead of aluminum, tantalum, tungsten, titanium, molybdenum may be used. It should be noted that it is desirable that the steps of forming the silicon oxide 27 and the aluminum film be continuously performed.
Then, the aluminum film was patterned to form the gate electrodes 28a, 28b, 28c of the TFT. Further, the surface of this aluminum wiring was anodized to form oxide layers 29a, 29b and 29c on the surface. Anodization was performed in a 1-5% ethylene glycol solution of tartaric acid. The thickness of the obtained oxide layer was 2000Å. (Fig. 2 (C))

Next, impurities (phosphorus) were implanted into the silicon region by the plasma doping method. Phosphine (PH ₃ ) was used as the doping gas, and the acceleration voltage was 6
It was set to 0 to 90 kV, for example, 80 kV. 1x dose
10 ¹⁵ to 8 × 10 ¹⁵ cm ^-2 , for example, 2 × 10 ¹⁵ cm ^-2
And Thus, the N-type impurity region 30a was formed. Furthermore, this time the left TFT (N-channel type TF
T) is masked with a photoresist, and the peripheral circuit region TFT (P channel T
Impurities (boron) were implanted into the silicon regions of the FT) and the matrix region TFT. Diborane (B ₂ H ₆ ) was used as a doping gas, and the acceleration voltage was 50 to 80 k.
V, for example, 65 kV. The dose amount is 1 × 10 ¹⁵ to 8
× 10 ¹⁵ cm ^-2 , eg 5 more than the previously implanted phosphorus
It was set to × 10 ¹⁵ cm ^-2 . Thus, P type impurity regions 30b and 30c were formed.

After that, the impurities were activated by the laser annealing method. As a laser, a KrF excimer laser (wavelength 248 nm, pulse width 20 nse
c) was used. The energy density of the laser is 200-
400mJ / cm ^2, for example, with 250mJ / cm ^2,
Irradiation was performed for 2 to 10 shots, for example, 2 shots, at one location. (Fig. 2 (D))

Then, as an interlayer insulator, the thickness is 2000 Å
CV using TEOS as a raw material for the silicon oxide film 31 of
It was formed by the D method, and further, an indium tin oxide film (ITO) having a thickness of 500 to 1000 Å, for example, 800 Å was deposited by the sputtering method. Then, this was etched to form the pixel electrode 32. Further, a contact hole is formed in the interlayer insulator 31, and a metal material,
For example, a source / drain electrode / wiring 33a, 33b, 33c of the peripheral driver circuit TFT and an electrode / electrode of the pixel circuit TFT formed of a multilayer film of titanium nitride and aluminum
The wirings 33d and 33e are formed. The semiconductor circuit is completed through the above steps. (Fig. 2 (E))

In the produced semiconductor circuit, the characteristics of the TFT in the peripheral driver circuit area were not inferior to those produced by the conventional laser crystallization. For example, the shift register manufactured according to this embodiment has a drain voltage of 15 V, 11 MHz, and 17 V, 16 M.
The operation of Hz was confirmed. Also, in the reliability test, no difference from the conventional one was found. Further, regarding the characteristics of the TFT (pixel circuit) in the matrix region, the leak current was 10 ⁻¹³ A or less.

[0032]

According to the present invention, for example, as shown in the above embodiment, a TFT capable of high-speed operation and a TFT characterized by a low leak current can be formed on the same substrate. When this is applied to a liquid crystal display, mass productivity and characteristics can be improved. Of course, it is also possible to form only the TFT showing one of the features on one substrate. Thus, the present invention is an industrially useful invention.

[Brief description of drawings]

1A to 1C are cross-sectional views of a manufacturing process of Example 1.

2A to 2C are cross-sectional views of a manufacturing process of Example 2.

FIG. 3 shows a configuration example of a monolithic active matrix circuit.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 10 ... Substrate 11 ... Base insulating film (silicon oxide) 12 ... Amorphous silicon film 13 ... Nickel-containing silicon film 14 ... Island-shaped silicon region 15 ... Gate insulating film (silicon oxide) ) 16 ... Gate electrode (phosphorus-doped silicon) 17 ... Source / drain region 18 ... Interlayer insulator (silicon oxide) 19 ... Pixel electrode (ITO) 20 ... Metal wiring / electrode (Titanium nitride / aluminum)

Continuation of the front page (56) Reference JP-A-6-318701 (JP, A) JP-A-5-40278 (JP, A) JP-A-5-34723 (JP, A) JP-A-2-140915 (JP , A) JP-A-2-222564 (JP, A) JP-A-63-56912 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) H01L 29/786 H01L 21/336 H01L 21/20 H01L 21/265 G02F 1/1368

Claims (6)

(57) [Claims] 1. A substrate having an insulating surface, an active matrix circuit formed on the insulating surface and comprising a plurality of thin film transistors including an active region made of crystalline silicon, a gate insulating film and a gate electrode, and the insulating surface. Is formed on the
In a semiconductor circuit having an active region made of crystalline silicon crystallized using an element that promotes crystallization, a peripheral drive circuit made of a plurality of thin film transistors including a gate insulating film and a gate electrode, the peripheral drive circuit is An active matrix circuit is driven, and the active region of the thin film transistor of the peripheral drive circuit is
Concentration of the element that promotes the crystallization is higher than the concentration of the active region of the thin film transistor of the active matrix circuit, the concentration of the element for promoting the crystallization in the active region of the thin film transistor of the peripheral driving circuit, 1 × 10 ^{16 to} 5
The concentration of the element promoting the crystallization in the active region of the thin film transistor of the active matrix circuit is 1 × 10 ¹⁷ cm ^−3.
A semiconductor circuit characterized by having a ^{density of} × 10 ¹⁶ cm ^-3 or less. Wherein Oite to claim 1, the thin film transistors of the peripheral drive circuit, the semiconductor circuit, wherein the high electron mobility than the thin film transistor of the active matrix circuit. 3. Oite to claim 1, the thin film transistors of the peripheral drive circuit, the semiconductor circuit, wherein the high crystallinity of the active region than the thin film transistor of the active matrix circuit. 4. A any one of claims 1 to 3, the element for promoting the crystallization, the semiconductor circuit, wherein the nickel, iron, the cobalt or platinum. 5. A first thin film transistor formed on a substrate and having a first active region, a gate insulating film and a gate electrode, and a second active region formed on the substrate, a gate insulating film and a gate electrode. And a second thin film transistor having: a first thin film transistor, wherein the first and second active regions have crystalline silicon, and the crystalline silicon of the first active region is amorphous.
Crystallized silicon with an element that promotes crystallization.
A-crystalline silicon, the concentration of the element that promotes the crystallization of the first active region is higher than the concentration of the element which promotes crystallization in the second active region, the first active The concentration of the crystallization promoting element in the region is 1 × 10 ^{16 to} 5 × 10 ¹⁷ cm ⁻³ , and the concentration of the crystallization promoting element in the second active region is 1 ×. A semiconductor device having a size of 10 ¹⁶ cm ^-3 or less. 6. The semiconductor device according to claim 5 , wherein the element that promotes crystallization is nickel, iron, cobalt or platinum.