JP3330923B2 - Method for manufacturing semiconductor circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a semiconductor circuit having a plurality of thin film transistors (TFTs) and a method for manufacturing the same. The thin film transistor manufactured by the present invention is formed on an insulating substrate such as glass and a semiconductor substrate such as single crystal silicon. In particular, the present invention relates to a semiconductor circuit having a low-speed operation matrix circuit and a high-speed operation peripheral circuit for driving the same, such as a monolithic active matrix circuit (used for a liquid crystal display or the like).

[0002]

2. Description of the Related Art In recent years, studies have been made on an insulating gate type semiconductor device having a thin-film active layer (also called an active region) on an insulating substrate. In particular, a thin film insulated gate transistor, a so-called thin film transistor (TFT), has been enthusiastically studied. These are formed on a transparent insulating substrate and are used for controlling each pixel or for a driving circuit in a display device such as a liquid crystal having a matrix structure. The amorphous silicon TFT and the crystalline silicon TFT are distinguished according to the crystalline state.

Generally, the electric field mobility of a semiconductor in an amorphous state is small, and therefore, a TF which requires high-speed operation is required.
Not available for T. Therefore, recently, research and development of crystalline silicon TFTs have been promoted in order to produce higher performance circuits.

[0004] A crystalline semiconductor has a higher electric field mobility than an amorphous semiconductor, and therefore can operate at high speed. In crystalline silicon, not only an NMOS TFT but also a PMOS TFT can be obtained in the same manner, so that a CMOS circuit can be formed. For example, in an active matrix type liquid crystal display device, not only an active matrix portion but also an active matrix portion can be formed. Peripheral circuits (drivers, etc.) are also C
There is known a device having a so-called monolithic structure composed of a MOS crystalline TFT.

[0005]

FIG. 3 is a block diagram showing a monolithic active matrix circuit used for a liquid crystal display. A column decoder 1 and a row decoder 2 are provided as a peripheral driver circuit on a substrate 7, a pixel circuit 4 including a transistor and a capacitor is formed in a matrix region 3, and the matrix region and the peripheral circuit are connected to a wiring 5. , 6. TFTs used for peripheral circuits are required to operate at high speed, and TFTs used for pixel circuits are required to have low leakage current. Although their properties are physically contradictory, they have been required to be formed simultaneously on the same substrate.

However, T manufactured by the same process
All FTs show similar characteristics. For example, to obtain crystalline silicon, crystallization by laser (laser annealing)
However, in the case of silicon crystallized by laser crystallization, the T
The FT and the TFT in the peripheral drive circuit region have similar characteristics. Therefore, a method of adopting thermal crystallization for the matrix region and employing laser crystallization for the peripheral driving circuit region can be considered. For thermal crystallization, annealing at 600 ° C. for 24 hours or more is performed. Alternatively, annealing at a high temperature of 1000 ° C. or more was required. In the former, the throughput is reduced, and in the latter, the substrate is limited to quartz.

Although the present invention seeks to provide an answer to such a difficult problem, it is not desirable that the process becomes complicated, resulting in a decrease in yield and an increase in cost. An object of the present invention is to easily fabricate two types of TFTs, a TFT requiring a high mobility and a TFT requiring a low leakage current, while maintaining mass productivity by minimizing a process change. Is to divide.

[0008]

As a result of the research by the present inventors,
It has been found that the crystallization can be promoted by adding a small amount of a catalyst material to the silicon film in a substantially amorphous state, the crystallization temperature can be reduced, and the crystallization time can be shortened. As the catalyst material, a simple substance of nickel (Ni), iron (Fe), cobalt (Co), platinum (Pt), or a compound such as a silicide thereof is suitable. Specifically, films, particles, clusters, and the like having these catalyst elements are formed in close contact with or below the amorphous silicon film, or these catalyst elements are formed in the amorphous silicon film by a method such as ion implantation. Which can then be crystallized by a thermal anneal at a suitable temperature, typically 580 ° C. or less, and for a short time within 8 hours.

Further, when an amorphous silicon film is formed by a chemical vapor deposition method (CVD method), it is contained in a raw material gas. When an amorphous silicon film is formed by a physical vapor method such as sputtering, These catalyst materials may be added to a film forming material such as a target or a vapor deposition source. As a matter of course, the higher the annealing temperature, the shorter the crystallization time. In addition, the higher the concentration of nickel, iron, cobalt and platinum, the lower the crystallization temperature and the shorter the crystallization time. According to the study of the present inventor, in order for crystallization to proceed, it is necessary that the concentration of at least one of these elements be 10 ¹⁷ cm ⁻³ or more, preferably 5 × 10 ¹⁸ cm ⁻³ or more. It turned out to be.

[0010] Since the above-mentioned catalyst materials are all unfavorable materials for silicon, it is desirable that their concentrations be as low as possible. In the present inventors' research, it is desirable that the total concentration of these catalyst materials does not exceed 1 × 10 ²⁰ cm ⁻³ . In particular, it is desired that the density does not exceed 1 × 10 ²⁰ cm ⁻³ even locally (for example, at grain boundaries).

According to the present invention, a TFT (an active matrix driver T
FT, etc. are selectively formed, while other relatively slow TFTs (such as low-leakage TFTs in pixel circuits of active matrix circuits) are made use of the characteristics of crystallization by the above catalyst material at low temperatures. It is characterized by being used for crystallization in a short time. As a result, circuits having inconsistent transistors having low leakage current and high-speed operation can be simultaneously formed on the same substrate. Hereinafter, the present invention will be described in more detail with reference to Examples.

[0012]

[Embodiment 1] This embodiment relates to a semiconductor circuit having an active matrix on a single glass substrate as shown in FIG. 3 and a driving circuit around the active matrix. FIG. 1 shows a cross-sectional view of a manufacturing process of this embodiment. First,
A 200 nm-thick silicon oxide base film 11 was formed on a substrate (Corning 7059) 10 by a sputtering method. Further, by a low pressure CVD method, a thickness of 50 to 15
An intrinsic (I-type) amorphous silicon film 12 having a thickness of 0 nm, for example, 150 nm was deposited. Continuously, by sputtering, the thickness 0.5 to 20 nm, for example, 2nm of nickel silicide film (chemical formula _{NiSi x, 0.4 ≦ x ≦ 2} .
5, for example, x = 2.0) 13. (Figure 1
(A))

Next, the area was crystallized by selectively irradiating a laser beam. KrF as laser
Excimer laser (wavelength 248 nm, pulse width 20 n
sec), but other lasers such as Xe
An F excimer laser (wavelength 353 nm), a XeCl excimer laser (wavelength 308 nm), an ArF excimer laser (wavelength 193 nm), or the like may be used. Laser energy density is 200-500mJ / c
m ² , for example, 350 mJ / cm ^2, and 2
Irradiation was performed for 10 to 10 shots, for example, 2 shots. During the laser irradiation, the substrate was heated to 200 to 450C, for example, 300C.

As is apparent from FIG. 3, since there is a considerable distance between a region to be laser-crystallized (peripheral circuit region) and a region sufficient for thermal crystallization (matrix region), a photolithography step is particularly necessary. Did not.

Next, this is placed in a reducing atmosphere at 500 ° C. for 4 hours.
Annealing was performed for a time to crystallize a region that was not irradiated with the laser (the pixel circuit of the active matrix). As a result, two types of crystalline silicon regions 12a and 12b were obtained. The region 12a has a high electric field mobility by the laser crystallization step, while the region 12b crystallized by the thermal annealing
Had the characteristic of low leakage current. (Figure 1
(B))

The silicon film thus obtained was patterned by photolithography to form island-like silicon regions 14a (peripheral drive circuit regions) and 14b (matrix regions). Further, a silicon oxide film 15 having a thickness of 100 nm was deposited as a gate insulating film by a sputtering method. For sputtering, silicon oxide was used as a target, and the substrate temperature during sputtering was 2
00 to 400 ° C., for example, 350 ° C., the sputtering atmosphere is oxygen and argon, and argon / oxygen = 0 to 0.5;
For example, it was set to 0.1 or less. Subsequently, a silicon film (containing 0.1 to 2% of phosphorus) having a thickness of 600 to 800 nm, for example, 600 nm was deposited by a low pressure CVD method. It is desirable that the step of forming the silicon oxide and the silicon film be performed continuously. Then, the silicon film was patterned to form gate electrodes 16a, 16b and 16c. (Fig. 1 (C))

Next, impurities (phosphorus and boron) were implanted into the silicon region by a plasma doping method using the gate electrode as a mask. Phosphine (PH ₃ ) and diborane (B ₂ H ₆ ) were used as doping gases.
In the former case, the acceleration voltage is 60 to 90 kV, for example, 80 kV.
kV, in the latter case 40-80 kV, for example 65 kV
And The dose was 1 × 10 ¹⁵ to 8 × 10 ¹⁵ cm ⁻² , for example, phosphorus was 2 × 10 ¹⁵ cm ⁻² and boron was 5 × 10 ¹⁵ . As a result, N-type impurity regions 17a and P-type impurity regions 17b and 17c were formed.

Thereafter, the impurities were activated by laser annealing. As the laser, a KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) was used, but other lasers such as a XeF excimer laser (wavelength 353 nm), a XeCl excimer laser (wavelength 308 nm), an ArF excimer laser (wavelength 193 nm), and the like were used. May be used. The energy density of the laser is 200 to 400 mJ / cm ² , for example, 2
The irradiation was performed at 50 mJ / cm ^2, and ² to 10 shots, for example, 2 shots were irradiated at one location. During laser irradiation, the substrate may be heated to 200 to 450 ° C. Instead of laser irradiation, annealing may be performed at 450 to 500 ° C. for 2 to 8 hours. Thus, impurity regions 17a to 17c were activated. (Fig. 1 (D))

Subsequently, a silicon oxide film 18 having a thickness of 600 nm is formed.
Is formed by a plasma CVD method as an interlayer insulator,
Further, the thickness is 50 to 100 n by a sputtering method.
m, for example, 80 nm indium tin oxide film (ITO)
To form a pixel electrode 19 by patterning it.
Was. Next, a contact hole is formed in the interlayer insulator,
Metallic materials, for example, multilayer films of titanium nitride and aluminum
Therefore, the electrodes / wirings 20a, 20
b, 20c, matrix pixel circuit TFT electrode / wiring 2
0d and 20e were formed. Finally, one atmosphere of hydrogen atmosphere
At 350 ° C. for 30 minutes. More than
The process completed the semiconductor circuit. (FIG. 1 (E)) The nickel concentration in the active region of the obtained TFT was set to
When measured by the on mass spectrometry (SIMS) method,
1 × 10 for both the peripheral drive circuit and the pixel circuit ¹⁸~ 5x
10¹⁸cm^-3Of nickel was observed.

[Embodiment 2] FIG. 2 shows a manufacturing process of this embodiment.
FIG. On the substrate (Corning 7059) 21
Oxidized to a thickness of 200 nm by sputtering.
A silicon film 22 was formed. Next, by a low pressure CVD method,
Amorphous with a thickness of 20 to 150 nm, for example, 50 nm
A silicon film 23 was deposited. And by ion implantation
To implant nickel ions
1 × 10 nickel on the surface ¹⁸~ 2 × 10¹⁹cm^-3,example
5 × 10¹⁸cm^-3Create an area 24 that contains only
Made. The depth of this region 24 is set to 20 to 50 nm,
The optimal fast energy was selected accordingly.
(Fig. 2 (A))

Next, the amorphous silicon film was selectively irradiated with a laser beam to crystallize the region. As a laser, a KrF excimer laser (wavelength: 248 nm, pulse width: 20 nsec) was used. The energy density of the laser is 200-500 mJ / cm ² ,
For example, 350 mJ / cm ² and ² to 10
A shot, for example, two shots was irradiated. At the time of laser irradiation, the substrate was heated to 200 to 450C, for example, 400C. Further, annealing was performed at 500 ° C. for 4 hours in a reducing atmosphere to crystallize the amorphous silicon film in a region not irradiated with the laser. By this crystallization step, 2
The types of crystalline silicon 23a and 23b were obtained. (Figure 2
(B))

Thereafter, this silicon film was patterned to form island-shaped silicon regions 26a (peripheral drive circuit regions) and 26b (matrix pixel circuit regions). Further, tetraethoxysilane (Si (OC
As ₂ H _{5) 4,} TEOS) as a raw material of oxygen, as a gate insulating film of the TFT by the plasma CVD method, a thickness of 1
A 00 nm silicon oxide 27 was formed. As a raw material, trichloroethylene (C ₂ HCl ₃ ) was used in addition to the above gas. Before film formation, oxygen is supplied to the chamber at 400 SCCM, the substrate temperature is 300 ° C., the total pressure is 5 Pa, and the RF power is 150.
Plasma was generated by W, and this state was maintained for 10 minutes. After that, 300 SCCM oxygen and 1 TEOS were placed in the chamber.
The silicon oxide film was formed by introducing 5 SCCM and 2 SCCM of trichloroethylene. The substrate temperature, RF power, and total pressure were 300 ° C., 75 W, and 5 Pa, respectively. After the film formation was completed, 100 Torr of hydrogen was introduced into the chamber, and hydrogen annealing was performed at 350 ° C. for 35 minutes.

Subsequently, by a sputtering method,
An aluminum film (containing 2% of silicon) having a thickness of 600 to 800 nm, for example, 600 nm was deposited. Tantalum, tungsten, titanium, or molybdenum may be used instead of aluminum. It is desirable that the step of forming the silicon oxide 27 and the aluminum film be performed continuously. Then, the aluminum film was patterned to form gate electrodes 28a, 28b, 28c of the TFT. further,
The surface of this aluminum wiring was anodized to form oxide layers 29a, 29b and 29c on the surface. Anodization was performed in a 1-5% solution of tartaric acid in ethylene glycol. The thickness of the obtained oxide layer was 200 nm. (Fig. 2 (C))

Next, an impurity (phosphorus) was implanted into the silicon region by a plasma doping method. Phosphine (PH ₃ ) was used as the doping gas, and the accelerating voltage was 6
0 to 90 kV, for example, 80 kV. The dose is 1 ×
10 ¹⁵ to 8 × 10 ¹⁵ cm ⁻² , for example, 2 × 10 ¹⁵ cm ⁻²
And Thus, an N-type impurity region 30a was formed. Further, the TFT on the left side (N-channel type TF)
T) is masked with a photoresist, and the right peripheral circuit region TFT (P channel T
An impurity (boron) was implanted into the silicon region of the FT) and the matrix region TFT. Diborane (B ₂ H ₆ ) is used as a doping gas, and the accelerating voltage is 50 to 80 k.
V, for example, 65 kV. Dose amount is 1 × 10 ¹⁵ -8
× 10 ¹⁵ cm ^-2 , for example, 5 more than the previously implanted phosphorus
× 10 ¹⁵ cm ^-2 . Thus, P-type impurity regions 30b and 30c were formed.

After that, the impurity was activated by laser annealing. As a laser, a KrF excimer laser (wavelength 248 nm, pulse width 20 ns)
c) was used. Laser energy density is 200 ~
400mJ / cm ^2, for example, with 250mJ / cm ^2,
2 to 10 shots, for example, 2 shots were irradiated per one place. (FIG. 2 (D))

Subsequently, a 200-nm-thick interlayer insulator is formed.
CV using TEOS as a raw material for silicon oxide film 31
The indium tin oxide film (ITO) having a thickness of 50 to 100 nm, for example, 80 nm was deposited by a sputtering method. Then, this was etched to form the pixel electrode 32. Further, a contact hole is formed in the interlayer insulator 31, and the source / drain electrodes / wirings 33 of the peripheral driver circuit TFT are formed by a metal material, for example, a multilayer film of titanium nitride and aluminum.
a, 33b, 33c and electrodes / wirings 33d, 33e of the pixel circuit TFT were formed. The semiconductor circuit was completed by the above steps. (FIG. 2 (E))

In the manufactured semiconductor circuit, the characteristics of the TFT in the peripheral driver circuit area were not inferior to those manufactured by conventional laser crystallization. For example, the shift register prepared according to the present embodiment has a drain voltage of 15 MHz at 11 MHz and a shift voltage of 17 V at 16 MHz.
Hz operation was confirmed. No difference was found in the reliability test from the conventional one. Further, regarding the characteristics of the TFT (pixel circuit) in the matrix area, the leak current was 10 ⁻¹³ A or less.

[0028]

According to the present invention, a crystalline silicon TFT capable of high-speed operation and an amorphous silicon TFT characterized by low leakage current can be formed on the same substrate. When this is applied to a liquid crystal display, improvement of mass productivity and improvement of characteristics can be achieved.

The present invention can also improve the throughput by crystallizing silicon at a low temperature of, for example, 500 ° C. and a short time of 4 hours. In addition, conventionally, when a process at 600 ° C. or higher was employed, shrinkage or warpage of a glass substrate had been a problem as a cause of a decrease in yield. However, such a problem can be solved at a stretch by using the present invention. Was done.

Furthermore, this means that a large area substrate can be processed at a time. That is, by processing a large-area substrate, a large number of semiconductor circuits (such as a matrix circuit) can be cut out from one substrate, whereby the unit cost can be significantly reduced. Thus, the present invention is an industrially useful invention.

[Brief description of the drawings]

FIG. 1 shows a cross-sectional view of a manufacturing process in Example 1.

FIG. 2 shows a cross-sectional view of a manufacturing process in Example 2.

FIG. 3 shows a configuration example of a monolithic active matrix circuit.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 10 ... Substrate 11 ... Base insulating film (silicon oxide) 12 ... Amorphous silicon film 13 ... Nickel silicide film 14 ... Island-shaped silicon region 15 ... Gate insulating film (silicon oxide) 16 ... Gate electrode (phosphorus-doped silicon) 17 ... Source and drain regions 18 ... Interlayer insulator (silicon oxide) 19 ... Pixel electrode (ITO) 20 ... Metal wiring / electrode (nitridation) (Titanium / aluminum)

──────────────────────────────────────────────────続 き Continuation of the front page (51) Int.Cl. ⁷ Identification symbol FI // H01S 3/00 (56) References JP-A-2-140915 (JP, A) JP-A-4-124813 (JP, A) JP-A-63-142807 (JP, A) JP-A-60-186066 (JP, A) of Apps Physics, Japan, Vol. 29, No. 12, 2698-2704 (58) Fields investigated (Int.Cl. ⁷ , DB name) H01L 21/20 H01L 21/336 H01L 27/08 331 H01L 29/786

Claims (13)

(57) [Claims] A first region forming a pixel circuit and a driving circuit;
Cupid on a glass substrate having a second area for forming a tract
Forming a facsimile silicon , introducing a catalyst material into the amorphous silicon , and forming an excimer on the amorphous silicon in the second region.
-After irradiating the laser, the first region and the second region
Region is thermally annealed to form a pixel circuit including a thin film transistor in the first region.
And a thin film transistor in the second region
A method for manufacturing a semiconductor circuit, wherein a driving circuit including a CMOS is formed . A first region forming a pixel circuit and a driving circuit;
Forming amorphous silicon on a silicon oxide film on a substrate having a second region forming a path, introducing a catalyst material into the amorphous silicon, and excimer- forming the amorphous silicon in the second region.
-After irradiating the laser, the first region and the second region
Region is thermally annealed to form a pixel circuit including a thin film transistor in the first region.
And a thin film transistor in the second region
A method for manufacturing a semiconductor circuit, wherein a driving circuit including a CMOS is formed . 3. A first region forming a pixel circuit and a driving circuit.
Amorph on an insulating surface having a second region forming a path
An amorphous silicon is formed by a CVD method, a catalyst material is introduced into the amorphous silicon, and an excimer is added to the amorphous silicon in the second region.
-After irradiating the laser, the first region and the second region
Region is thermally annealed to form a pixel circuit including a thin film transistor in the first region.
And a thin film transistor in the second region
A method for manufacturing a semiconductor circuit, wherein a driving circuit including a CMOS is formed . 4. A first region forming a pixel circuit and a driving circuit.
Amorph on an insulating surface having a second region forming a path
Forming amorphous silicon , introducing a catalytic material into the amorphous silicon , and adding 200 to 200 μm to the amorphous silicon in the second region.
Excimer laser with energy density of 500 mJ / cm ²
Irradiating the first area and the second area
Is thermally annealed to form a pixel circuit including a thin film transistor in the first region.
And a thin film transistor in the second region
A method for manufacturing a semiconductor circuit, wherein a driving circuit including a CMOS is formed . 5. The catalyst material according to claim 1, wherein the catalyst material is 20 to 50 particles by an ion implantation method.
At a depth of nm, 1 × 10 ¹⁸ to 2 × 10 ¹⁹ / cm ³
A method for manufacturing a semiconductor circuit, characterized by introducing a concentration of 6. A first region for forming a pixel circuit and a driving circuit.
Cupid on a glass substrate having a second area for forming a tract
Forming a Fass silicon, film <br/> was formed consisting of catalyst material in contact with the amorphous silicon, an excimer the amorphous silicon of the second region
-After irradiating the laser, the first region and the second region
Region is thermally annealed to form a pixel circuit including a thin film transistor in the first region.
And a thin film transistor in the second region
A method for manufacturing a semiconductor circuit, wherein a driving circuit including a CMOS is formed . 7. A first region forming a pixel circuit and a driving circuit.
Road to form an amorphous silicon on the silicon oxide film on a substrate having a second region for forming a film <br/> was formed consisting of catalyst material in contact with the amorphous silicon, the said second region Excimer on amorphous silicon
-After irradiating the laser, the first region and the second region
Region is thermally annealed to form a pixel circuit including a thin film transistor in the first region.
And a thin film transistor in the second region
A method for manufacturing a semiconductor circuit, wherein a driving circuit including a CMOS is formed . 8. A first region forming a pixel circuit and a driving circuit.
Amorph on an insulating surface having a second region forming a path
A silicon film formed by a CVD method, a film made of a catalyst material is formed in contact with the amorphous silicon, and an excimer film is formed on the amorphous silicon in the second region.
-After irradiating the laser, the first region and the second region
Region is thermally annealed to form a pixel circuit including a thin film transistor in the first region.
And a thin film transistor in the second region
A method for manufacturing a semiconductor circuit, wherein a driving circuit including a CMOS is formed . 9. A first region forming a pixel circuit and a driving circuit.
Amorph on an insulating surface having a second region forming a path
Forming a film made of a catalyst material in contact with the amorphous silicon , and forming 200 to 200 nm on the amorphous silicon in the second region.
Excimer laser with energy density of 500 mJ / cm ²
Irradiating the first area and the second area
Is thermally annealed to form a pixel circuit including a thin film transistor in the first region.
And a thin film transistor in the second region
A method for manufacturing a semiconductor circuit, wherein a driving circuit including a CMOS is formed . 10. The film according to claim 6, wherein the film made of the catalyst material has a thickness of 0.5 to 20 nm.
Method of manufacturing semiconductor circuit characterized by being formed with film thickness
Law. 11. The method according to claim 1, wherein the excimer laser is a KrF excimer laser, a XeF excimer laser, a XeCl excimer laser, or an ArF excimer laser. 12. A semiconductor according to claim 1, wherein said catalyst material is nickel, iron, cobalt, platinum, nickel silicide, iron silicide, cobalt silicide or platinum silicide. How to make a circuit. 13. The excimer laser according to claim 1, wherein the substrate is irradiated with the excimer laser.
A method for manufacturing a semiconductor circuit, which is performed while heating to 0 to 450 ° C.