JPH06310527A - Semiconductor device and its manufacture - Google Patents

Abstract

PURPOSE:To form a shallow junction of good junction property without generating detects due to ion implantation during LDD structure formation. CONSTITUTION:After a gate electrode 2 is formed on a silicon substrate 1, an insulation film 3 and a polycrystalline silicon film 4 are deposited one by one. While side walls 5 are formed at both sides of a gate electrode 2 by etching the polycrystalline silicon film 4 anisotropically, the insulation film 3 is etched to a specified depth. A polycrystalline silicon film 6 is deposited thereon, impurities are implanted by ion implantation 7 to the polycrystalline silicon film 6 and the impurities are diffused into the silicon substrate 1 by thermal treatment.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to an L-type MOS semiconductor integrated circuit.
The present invention relates to a semiconductor device having a DD structure and a manufacturing method thereof.

[0002]

2. Description of the Related Art In a MOS type semiconductor device, an LDD (Lightly Doped Drain) is used as a structure for relaxing a drain electric field and enhancing hot carrier resistance.
n) The structure is known. The most general method of forming this LDD structure is to first implant a low concentration impurity region into a semiconductor substrate using a gate electrode as a mask to form a low concentration impurity region, and then form a sidewall on the gate electrode. After that, using the gate electrode and the side wall as a mask, impurities are ion-implanted into the semiconductor substrate to form a high-concentration impurity region.

FIG. 2 shows the conventional method described above. In this conventional example, first, as shown in FIG. 2A, a silicon oxide film as a gate insulating film is formed on the surface of the silicon semiconductor substrate 1 by thermal oxidation. Then, after depositing a polycrystalline silicon film on the entire surface and processing the polycrystalline silicon film into a pattern of the gate electrode 2, the gate electrode 2 is used as a mask and the ion beam 7 is applied to the semiconductor substrate 1 so as to have a low concentration. Impurities are introduced by ion implantation.

Next, as shown in FIG. 2B, a silicon oxide film 10 is deposited on the entire surface of the semiconductor substrate 1 on which the low concentration diffusion layer 8 is formed by a method such as CVD.

Next, as shown in FIG. 2C, the entire surface of the silicon oxide film 10 is anisotropically etched by a method such as RIE to form an oxide film sidewall 11 on the gate electrode 2.

Next, as shown in FIG. 2D, a high concentration impurity is ion-implanted into the silicon semiconductor substrate 1 using the gate electrode 2 and the oxide film side wall 11 as a mask.

After that, in order to recover the defects caused by the ion implantation, heat treatment is performed for several minutes at a high temperature.

By the method described above, as shown in FIG. 2 (e), the portion having the oxide film side wall 11 becomes the low concentration diffusion layer 8, the portion not having the oxide film side wall 11 becomes the high concentration diffusion layer 9, and the LDD. The structure is formed.

[0009]

However, in recent years, with the miniaturization of semiconductor elements, it has been required to make the source / drain diffusion layers shallower junctions, and the conventional method described above is not suitable for the current ion implantation apparatus. The problem that it is difficult to control the implantation energy for making a shallow junction, and the implantation defect caused by the two ion implantations while suppressing the junction depth of the source / drain diffusion layer from becoming deeper due to diffusion, There is a problem that it is difficult to recover sufficiently by heat treatment at high temperature for a short time.

Therefore, an object of the present invention is to provide a semiconductor device having a shallow junction corresponding to the miniaturization of a semiconductor element and a method for manufacturing the same, in which the generation of defects due to ion implantation is reduced in the LDD structure forming step. is there.

[0011]

In order to solve the above problems, according to the method of manufacturing a semiconductor device of the present invention, a first insulating film and a conductor film are sequentially formed on a semiconductor substrate, and these are patterned. Forming a gate electrode, sequentially forming a second insulating film and a first polycrystalline silicon film on the entire surface, and anisotropically etching the first polycrystalline silicon film, Sidewalls of the polycrystalline silicon film are formed on both sides of the gate electrode via the second insulating film, and the portion of the second insulating film from which the first polycrystalline silicon film is removed is etched to a predetermined depth. And the process of
A step of forming a second polycrystalline silicon film on the entire surface, a step of introducing impurities into the second polycrystalline silicon film and the side wall, and a step of introducing impurities into the second polycrystalline silicon film and the side wall. And a step of diffusing into the semiconductor substrate by heat treatment. In order to solve the above problems, according to a semiconductor device of the present invention, a gate electrode formed on a semiconductor substrate via a first insulating film, a second insulating film covering the gate electrode, And a side wall made of a polycrystalline silicon film formed on both sides of the gate electrode covered with the second insulating film.

[0012]

In the present invention, in the etching process for forming the side wall of the gate electrode, the second insulating film deposited on the semiconductor substrate after forming the gate electrode becomes thicker at the portion having the side wall and thinner at the portion not having the side wall. Become. Therefore, when impurities are injected with the polycrystalline silicon film deposited on the semiconductor substrate as a mask later, the impurity concentration becomes constant at the interface between the second insulating film and the polycrystalline silicon film, but the impurity is not removed by the subsequent heat treatment. When thermally diffusing into the second insulating film, the substrate surface concentration of impurities depends on the film thickness of the second insulating film.
By thermally diffusing these impurities into the semiconductor substrate, it is possible to form an LDD structure in which the side wall portion is a low concentration diffusion layer and the side wall portion is a high concentration diffusion layer.

As a result, according to the present invention, when the LDD structure is formed in the semiconductor substrate, impurities are introduced by thermal diffusion, so that a shallow junction with a small leak current can be formed in the semiconductor substrate without causing injection defects. Can be formed.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention applied to the manufacture of MOS transistors will be described below with reference to FIG. In each figure of FIG. 1, the same components as those of the conventional example shown in FIG. 2 are designated by the same reference numerals.

In this embodiment, as shown in FIG. 1A, a silicon oxide film having a thickness of about 10 to 20 nm is formed on the surface of the silicon semiconductor substrate 1 by thermal oxidation. Then, a polycrystalline silicon film having a thickness of about 150 to 300 nm is deposited by a method such as CVD. Thereafter, the silicon oxide film and the polycrystalline silicon film formed on the silicon semiconductor substrate 1 are patterned by a method such as lithography to form the gate electrode 2.

Next, as shown in FIG. 1B, an insulating film 3 such as a silicon oxide film or a silicon nitride film having a thickness of about 10 to 30 nm is formed on the entire surface of the silicon semiconductor substrate 1 by a method such as CVD. To be deposited.

Next, as shown in FIG. 1C, a polycrystalline silicon film 4 having a thickness of 300 to 300 is formed by a method such as CVD.
It is deposited so as to have a thickness of about 400 nm.

Next, as shown in FIG. 1D, the polycrystalline silicon film 4 is anisotropically etched by a method such as RIE to form polycrystalline silicon side walls 5 on both sides of the gate electrode 2. At this time, the insulating film 3 is etched in the portion where the polycrystalline silicon film 4 is completely removed, and the thickness of the residual film due to the etching of the insulating film 3 is set to 5 nm or less.

Next, as shown in FIG. 1E, a polycrystalline silicon film 6 is deposited on the entire surface of the silicon semiconductor substrate 1 by a method such as CVD so as to have a thickness of about 200 to 350 nm.

Next, as shown in FIG. 1F, ion implantation of impurities is performed by the ion beam 7. When implanting arsenic as an impurity, the acceleration energy is 40 to 70 k.
eV, dose amount about 5 × 10 ¹⁵ to 1 × 10 ¹⁶ / cm ² ,
When boron fluoride is implanted as an impurity, the acceleration energy is 30 to 50 keV and the dose is 5 × 10 ¹⁵ to 1 × 10.
The condition is set to about ¹⁶ / cm ² so that the peak concentration of impurities comes to the surface of the silicon semiconductor substrate 1.

Next, as shown in FIG. 1G, heat treatment is performed by lamp annealing at a temperature of about 1000 to 1100 ° C. for a time of about 10 to 30 seconds. At this time, the ion-implanted impurities diffuse into the silicon semiconductor substrate 1, but the insulating film 3 having the polycrystalline silicon side wall 5 is thicker than the insulating film 3 having no polycrystalline silicon side wall 5, When impurities are diffused through the insulating film 3, the thicker portion of the insulating film 3 has a lower impurity concentration on the surface of the silicon semiconductor substrate 1 than the thinner portion of the insulating film 3. A low-concentration diffusion layer 8 is formed where 5 exists, and a high-concentration diffusion layer 9 is formed where there is no polycrystalline silicon side wall 5.

[0022]

According to the present invention, LDD using thermal diffusion
In the method of manufacturing a semiconductor device having a structure, it is possible to form a shallow junction having good junction characteristics without causing defects due to ion implantation.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view showing a manufacturing process of an LDD structure according to an embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view showing a manufacturing process of a conventional LDD structure.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Silicon semiconductor substrate 2 Gate electrode 3 Insulating film 4 Polycrystalline silicon film 5 Polycrystalline silicon side wall 6 Polycrystalline silicon film 7 Ion beam 8 Low concentration diffusion layer 9 High concentration diffusion layer

Claims (2)

[Claims] 1. A step of sequentially forming a first insulating film and a conductor film on a semiconductor substrate and patterning them to form a gate electrode, and a second insulating film and a first polycrystalline film on the entire surface. A step of sequentially forming a silicon film, and anisotropically etching the first polycrystalline silicon film,
Sidewalls of the polycrystalline silicon film are formed on both sides of the gate electrode via the second insulating film, and the second insulating film in a portion where the first polycrystalline silicon film is removed is formed to a predetermined depth. Etching, forming a second polycrystalline silicon film on the entire surface, introducing impurities into the second polycrystalline silicon film and the side wall, the second polycrystalline silicon film and the side wall And a step of diffusing the impurities introduced into the semiconductor substrate into the semiconductor substrate by a heat treatment. 2. A gate electrode formed on a semiconductor substrate via a first insulating film, a second insulating film covering the gate electrode, and both sides of the gate electrode covered with the second insulating film. And a side wall made of a polycrystalline silicon film formed on the semiconductor device.