JPH06296026A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To lessen a defect density of a gate oxide film by a method wherein a gate insulation film of a drive element of a semiconductor storage element is formed before formation of a first polycrystalline silicon film and the first polycrystal formed in a region to be made the drive element of the semiconductor storage element is removed in the same process as the second polycrystalline silicon. CONSTITUTION:A field insulation film 102 and a first insulation film 103 are formed on a substrate 101. Next, a second insulation film 105 being a gate insulation film is formed and a first polycrystalline silicon film 106 is formed on this second insulation film 105, the first insulation film 103 and the field insulation film 102. Then, an unnecessary part of the first polycrystalline silicon film 106 is removed by etching and a third insulation film 107 is formed thereon. After a second polycrystalline silicon film 108 is deposited, moreover, an impurity is ion-implanted so that a source 109, a drain 110, a source 111 and a drain 112 be formed. Accordingly, the substrate 101 is not damaged and a defect density can be lessened.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a memory element and its driving element and a manufacturing method thereof.

[0002]

2. Description of the Related Art A conventional method for manufacturing a semiconductor memory device is as shown in FIGS. 3 (a) to 3 (e). This process will be described step by step.

First, a semiconductor substrate 301 as shown in FIG.
A silicon nitride film is formed in a predetermined shape on the top. Then, thermal oxidation is performed to form the field insulating film 302. The field insulating film 302 is formed to a thickness of 600 nm to 800 nm. The nitride film is removed, and a first insulating film 303 is formed on the semiconductor substrate 301 by a thermal oxidation method. For example, it is oxidized in a dry atmosphere having an oxygen concentration of 40% at 1000 degrees. The first insulating film 303 is 30 in the case of EPROM.
nm to 50 nm, and in the case of EEPROM, about 10 nm is suitable. The first insulating film 303 is used as a gate insulating film of a semiconductor memory device.

Next, as shown in FIG. 3B, a first polycrystalline silicon film 304 having a thickness of about 200 nm is formed on the field insulating film 302 and the first insulating film 303 by a CVD method. Usually, monosilane gas is thermally decomposed at around 620 ° C. to deposit the first polycrystalline silicon 304. Then, in order to reduce the resistance of the first polycrystalline silicon film 304, for example, a group 5 element (for example, a conductive impurity such as phosphorus element or arsenic) is ion-implanted to obtain 1 × 1.
Implantation is performed from 0 ¹⁵ to about 1 × 10 ¹⁶ atoms · cm ⁻² .
Then, unnecessary portions of the first polycrystalline silicon film 304 and the first insulating film 303 are removed by photo and etching methods.

Next, as shown in FIG. 3C, a second insulating film 305 is formed on the first polycrystalline silicon 304 and a third insulating film 306 is formed on the semiconductor substrate 301 by a thermal oxidation method. For example, the second silicon insulating film 305 having a thickness of about 30 nm is formed by performing oxidation in a dry atmosphere having an oxygen concentration of about 40% at 1000 ° C.

Next, as shown in FIG. 3D, a second polycrystalline silicon film 307 is formed on the third insulating film 306, the second insulating film 305 and the field insulating film 302 by chemical vapor deposition to a thickness of about 300 nm. Form. And the second
An impurity such as phosphorus or arsenic is implanted into the second polycrystalline silicon film 304 by using an ion implantation method in order to make the polycrystalline silicon film 307 a conductor. For example, an element of Group 5 (for example, a conductive impurity such as phosphorus element or arsenic) is used by an ion implantation method to form 1 × 10 ¹⁵ to 1 × 10 ¹⁶ atoms · cm.
Inject about ^-2 .

Next, as shown in FIG. 3E, an unnecessary portion of the second polycrystalline silicon 307 on the third insulating film 306 is removed by a photo and etching method. This becomes the gate electrode of the transistor (driving element of the semiconductor memory element) of the peripheral circuit. Then, unnecessary portions of the second polycrystalline silicon 307, the second insulating film 305, and the first polycrystalline silicon film 304 are removed by photo and etching methods. This becomes the gate electrode of the semiconductor memory element.

Finally, an ion implantation method is used to implant impurities such as phosphorus and arsenic into the source 30 of the semiconductor memory device.
8 and a drain 309, and a source 310 and a drain 311 of the transistor of the peripheral circuit are formed.

The above is the conventional semiconductor device and the manufacturing method thereof.

[0010]

However, according to the above-mentioned conventional technique, when the first polycrystalline silicon film 304 formed in the region of the driving element of the semiconductor memory element is etched, the first insulating film is the EEPROM. In this case, since the thickness is about 10 nm, the semiconductor substrate 301 is damaged when the first polycrystalline silicon film 304 is removed.
As a result, the defect density of the gate oxide film of the driving element of the semiconductor memory element increases, the withstand voltage of the gate oxide film of the driving element of the semiconductor memory element decreases, and the driving element of the semiconductor memory element does not work. There is a problem that the threshold voltage is not stable.

Therefore, the present invention solves such a problem, and an object thereof is to provide the first insulating film 30.
Even if 3 is as thin as about 10 nm, the defect density of the gate oxide film of the driving element of the semiconductor memory element increases, the withstand voltage of the gate oxide film of the driving element of the semiconductor memory element decreases, and the semiconductor memory An object of the present invention is to provide a method for manufacturing a semiconductor device in which the threshold voltage of a driving element of an element is not unstable.

[0012]

[Means for Solving the Problems]

(Means 1) A method of manufacturing a semiconductor device according to the present invention has a MOS type transistor structure having a floating gate and a control gate, and the MOS transistor of the control gate is controlled depending on how a charge is injected into the floating gate. In a method of manufacturing a semiconductor device in which a control threshold voltage of characteristics changes, a step of forming a field insulating film on a semiconductor substrate, a step of forming a first insulating film on the semiconductor substrate, and a region for forming the MOS transistor Removing the first insulating film,
Forming a second insulating film in a region where the MOS transistor is formed on the semiconductor substrate; forming a conductor layer on the second insulating film, the first insulating film and the field insulating film; And a step of removing the conductor layer formed in a region other than the drive element of the semiconductor memory element, a step of forming a third insulating film on the conductor layer, and a part of a gate electrode of the drive element of the semiconductor memory element. A semiconductor device comprising: a step of removing the formed third insulating film; a step of forming a second conductor layer on the field insulating film, the third silicon insulating film, and the first conductor layer, And its manufacturing method.

(Means 2) In the method for manufacturing a semiconductor device of the present invention, a MOS type transistor structure having a floating gate and a control gate is formed, and the control gate of the control gate is changed depending on whether a charge is injected into the floating gate. In a method of manufacturing a semiconductor device in which a control threshold voltage of characteristics of a MOS transistor changes, a step of forming a field insulating film on a semiconductor substrate,
Forming a first insulating film on the semiconductor substrate;
Removing the first insulating film in a region where an OS transistor is formed, forming a second insulating film in a region where the MOS transistor is formed on the semiconductor substrate, the second insulating film and the first insulating film And a step of forming a conductor layer on the field insulating film, a step of removing the conductor layer formed in a region other than the drive element of the MOS transistor and the semiconductor memory element, and forming a third insulating film on the conductor layer. The step of removing all the third insulating film formed on the gate electrode of the driving element of the semiconductor memory element, the field insulating film, the third silicon insulating film, and the second conductor on the first conductor layer. A semiconductor device comprising a step of forming a layer, and a manufacturing method thereof.

[0014]

EXAMPLES Example 1 FIGS. 1A to 1G show a first example of the present invention.
FIG. 9 is a main cross-sectional view of each step of the method for manufacturing the semiconductor device in the example. In all the drawings of the embodiments, those having the same function are designated by the same reference numeral, and the repeated description thereof will be omitted. Hereinafter, description will be made in order according to FIGS. 1A to 1E.

First, a semiconductor substrate 101 as shown in FIG.
A silicon nitride film is formed in a predetermined shape on the top. Then, thermal oxidation is performed to form the field insulating film 102. The field insulating film 102 is formed to have a thickness of 600 nm to 800 nm. The nitride film is removed, and a first insulating film 103 is formed on the semiconductor substrate 101 by a thermal oxidation method. For example, the first insulating film 103 having a thickness of about 15 nm is formed by performing oxidation in a dry atmosphere having an oxygen concentration of 40% at 1000 degrees. Then, a region of the semiconductor memory device to be a driving element is covered with a photoresist 104, and the first insulating film 103 in the region of the semiconductor memory element is removed. For example, the semiconductor substrate 101, the field insulating film 102, and the first insulating film 103 are put into a solution having a mixing ratio of water and hydrogen fluoride of 1:10 for about 120 seconds, and etching is performed.

Next, as shown in FIG. 1B, the photoresist 104 is removed, and the first insulating film 103 on the semiconductor substrate 18 formed in FIG.
A second insulating film 105 is formed on the semiconductor substrate on which a semiconductor memory element is to be formed by growing an insulating film having a thickness of about nm. The first insulating film is used as a gate insulating film of a driving element of a semiconductor memory element, and the second insulating film 105 is used as a gate insulating film of a driving element of a semiconductor memory element. The second insulating film 105 is 30 nm to 50 nm in the case of EPROM,
In the case of EEPROM, about 10 nm will be suitable.

Next, as shown in FIG. 1C, 200 n of a first polycrystalline silicon film 106 is formed on the first insulating film 103, the second insulating film 105 and the field insulating film 102.
Form about m. Usually, monosilane gas is thermally decomposed at about 620 ° C. to deposit the first polycrystalline silicon 107. Then, in order to reduce the resistance of the first polycrystalline silicon film 106, for example, a group 5 element (for example, a conductive impurity such as phosphorus element or arsenic) is used by an ion implantation method from 1 × 10 ¹⁵ to 1 ×. Implant about 10 ¹⁶ atoms · cm ⁻² .

Then, by photo and etching methods,
An unnecessary portion of the first polycrystalline silicon film 106 is removed.

Next, as shown in FIG. 1D, a third insulating film 107 is formed on the first polycrystalline silicon film 106. For example, oxidation is performed in a dry atmosphere having an oxygen concentration of about 40% at 1000 ° C. to form the third insulating film 107 having a thickness of about 30 nm.

Next, as shown in FIG. 1E, a part of the third insulating film 107 on the first polycrystalline silicon 106, which becomes the gate electrode of the driving element of the semiconductor memory element, is removed by photo and etching methods. To do.

Next, as shown in FIG. 1F, a second polycrystalline silicon film 108 is formed on the field insulating film 102, the third insulating film 107, and the first polycrystalline silicon film 106 by chemical vapor deposition. Of about 300 nm is formed. Then, in order to reduce the resistance of the second polycrystalline silicon film 108, for example, a group 5 element (for example, a conductive impurity such as phosphorus element or arsenic) is ion-implanted to form 1 ×.
Implantation is performed from 10 ¹⁵ to about 1 × 10 ¹⁶ atoms · cm ⁻² .

Next, as shown in FIG. 1G, the second polycrystalline silicon 108, the third insulating film 107, and the first polycrystalline silicon film 106 are formed by photo and etching methods.
Unnecessary portions are removed to form the gate electrode of the semiconductor memory element and the gate electrode of the driving element of the semiconductor memory element.

Finally, an ion implantation method is used to implant impurities such as phosphorus and arsenic into the source 10 of the semiconductor memory device.
9 and a drain 110, and a source 111 and a drain 112 of the transistor of the peripheral circuit are formed.

The above manufacturing process is the semiconductor device and the manufacturing method thereof according to one embodiment of the present invention.

As described above, the third silicon oxide film 103 is removed only in the region of the semiconductor memory element by the photo and etching method. That is, the semiconductor substrate 101 is etched by not removing the third silicon oxide film 103 of the driving element of the semiconductor memory device until the step of etching the first silicon nitride film 108 in the region to be the driving element of the semiconductor memory device. Without doing so, it becomes possible to etch the first silicon nitride film 108 in the region of the driving element of the semiconductor memory element. This is because the underlying third silicon oxide film 103 is thick. Further, it is desired to form the first silicon oxide film 107 as thin as possible in order to improve the writing efficiency of the semiconductor memory element, but since the first silicon oxide film 107 can be arbitrarily formed thin, the semiconductor memory element with high writing efficiency can be formed. It is possible to realize a method for manufacturing a semiconductor device.

The invention made by the present inventor has been specifically described based on the above-mentioned embodiments, but the present invention is not limited to the above-mentioned embodiments and can be modified without departing from the scope of the invention. Of course, you can do that. For example, in the embodiment of the manufacturing method of the present invention, the silicon oxide film formed by oxidizing polycrystalline silicon is used for the floating gate and control gate insulating film of the semiconductor memory element, but the ONO film (Si0 ₂ / SiN / Si0 _2), or is effective even when an NO film (SiN / Si0 _2).

Example 2 FIGS. 2 (a) to 2 (g)
FIG. 4A is a main cross-sectional view of each step of the method for manufacturing a semiconductor device in one embodiment of the present invention. In all the drawings of the embodiments, the same reference numerals are given to those having the same function,
The repeated description will be omitted. In the following, description will be made in order according to FIGS. 2A to 2E.

First, a semiconductor substrate 201 as shown in FIG.
A silicon nitride film is formed in a predetermined shape on the top. Then, thermal oxidation is performed to form the field insulating film 202. The field insulating film 202 is formed to a thickness of 600 nm to 800 nm. The nitride film is removed, and a first insulating film 203 is formed on the semiconductor substrate 201 by a thermal oxidation method. For example, the first insulating film 203 having a thickness of about 15 nm is formed by performing oxidation in a dry atmosphere having an oxygen concentration of 40% at 1000 degrees. Then, a region of the semiconductor memory device to be a driving element is covered with a photoresist 204, and the first insulating film 203 in the region of the semiconductor memory element is removed. For example, the semiconductor substrate 201, the field insulating film 202, and the first insulating film 203 are put in a solution having a mixing ratio of water and hydrogen fluoride of 1:10 for about 120 seconds, and etching is performed.

Next, as shown in FIG. 2B, the photoresist 204 is removed, and the first insulating film 203 on the semiconductor substrate formed in FIG.
A second insulating film 205 is formed on the semiconductor substrate on which a semiconductor memory element is to be formed by growing an insulating film having a thickness of about nm. The first insulating film is used as a gate insulating film of a driving element of a semiconductor memory element, and the second insulating film 205 is used as a gate insulating film of a driving element of a semiconductor memory element. The second insulating film 205 is 30 nm to 50 nm in the case of EPROM,
In the case of EEPROM, about 10 nm will be suitable.

Next, as shown in FIG. 2C, 200 n of a first polycrystalline silicon film 206 is formed on the first insulating film 203, the second insulating film 205 and the field insulating film 202.
Form about m. Usually, monosilane gas is thermally decomposed at around 620 ° C. to deposit the first polycrystalline silicon 207. Then, in order to reduce the resistance of the first polycrystalline silicon film 206, for example, a group 5 element (for example, a conductive impurity such as phosphorus element or arsenic) is used by an ion implantation method from 1 × 10 ¹⁵ to 1 ×. Implant about 10 ¹⁶ atoms · cm ⁻² .

Then, by the photo and etching method,
An unnecessary portion of the first polycrystalline silicon film 206 is removed.

Next, as shown in FIG. 2D, a third insulating film 207 is formed on the first polycrystalline silicon film 206. For example, oxidation is performed in a dry atmosphere having an oxygen concentration of about 40% at 1000 ° C. to form the third insulating film 207 having a thickness of about 30 nm.

Next, as shown in FIG. 2E, the third insulating film 207 on the first polycrystalline silicon 206, which becomes the gate electrode of the driving element of the semiconductor memory element, is completely removed by photo and etching methods.

Next, as shown in FIG. 2F, a second polycrystalline silicon film 208 is formed on the field insulating film 202, the third insulating film 207 and the first polycrystalline silicon film 206 by chemical vapor deposition. Of about 300 nm is formed. Then, in order to reduce the resistance of the second polycrystalline silicon film 208, for example, an element of Group 5 (for example, a conductive impurity such as phosphorus element or arsenic) is used by ion implantation to obtain 1 ×.
Implant about 10 ¹⁵ to 1 × 10 ¹⁶ atoms · cm ⁻² .

Next, as shown in FIG. 2G, the second polycrystalline silicon 208, the third insulating film 207, and the first polycrystalline silicon film 206 are formed by photo and etching methods.
Unnecessary portions are removed to form the gate electrode of the semiconductor memory element and the gate electrode of the driving element of the semiconductor memory element.

Finally, an ion implantation method is used to implant impurities such as phosphorus and arsenic to source 20 of the semiconductor memory device.
9 and a drain 210, and a source 211 and a drain 212 of the transistor of the peripheral circuit are formed.

The above manufacturing process is the semiconductor device and the manufacturing method thereof according to one embodiment of the present invention.

As described above, the third silicon oxide film 203 is removed by the photo and etching method only in the region of the semiconductor memory element. That is, the semiconductor substrate 201 is etched by not removing the third silicon oxide film 203 of the driving element of the semiconductor memory device until the step of etching the first silicon nitride film 208 in the region to be the driving element of the semiconductor memory device. It is possible to etch the first silicon nitride film 208 in the drive element region of the semiconductor memory element without performing the above. This is because the underlying third silicon oxide film 203 is thick. Further, it is desired to form the first silicon oxide film 207 as thin as possible in order to improve the writing efficiency of the semiconductor memory element. However, since the first silicon oxide film 207 can be arbitrarily formed thin, it is possible to improve the writing efficiency of the semiconductor memory element. It is possible to realize a method for manufacturing a semiconductor device.

Although the invention made by the present inventor has been concretely explained based on the above-mentioned embodiment, the present invention is not limited to the above-mentioned embodiment, and is modified within a range not departing from the gist thereof. Of course, you can do that. For example, in the embodiment of the manufacturing method of the present invention, the silicon oxide film formed by oxidizing polycrystalline silicon is used for the floating gate and control gate insulating film of the semiconductor memory element, but the ONO film (Si0 ₂ / SiN / Si0 _2), or is effective even when an NO film (SiN / Si0 _2).

[0040]

According to the present invention, the gate insulating film of the driving element of the semiconductor memory element is formed before forming the first polycrystalline silicon film, and is formed in the region to be the driving element of the semiconductor memory element. By removing the first polycrystal in the same step as the second polycrystal silicon, the semiconductor substrate in the region to be the driving element of the semiconductor memory element is not damaged. Thereby, a semiconductor device in which a gate insulating film of a driving element of the semiconductor memory element having a low defect density and a high breakdown voltage is formed, and a threshold voltage of the driving element of the semiconductor memory element is stable, and a manufacturing method thereof. Can be realized.

[Brief description of drawings]

FIG. 1 is a main sectional view for explaining an embodiment of a method for manufacturing a semiconductor device of the present invention in the order of steps, and a main sectional view for explaining the semiconductor device.

FIG. 2 is a main cross-sectional view for explaining one embodiment of a method for manufacturing a semiconductor device of the present invention in the order of steps, and a main cross-sectional view for explaining the semiconductor device.

FIG. 3 is a main cross-sectional view for explaining a conventional semiconductor device and a method for manufacturing the same in the order of steps.

[Explanation of symbols]

 101 semiconductor substrate 102 field insulating film 103 first insulating film 104 resist mask 105 second insulating film 106 first polycrystalline silicon film 107 third insulating film 108 second polycrystalline silicon film 109 source of semiconductor memory device 110 of semiconductor memory device Drain 111 Source of peripheral circuit transistor 112 Drain of peripheral circuit transistor 201 Semiconductor substrate 202 Field insulating film 203 First insulating film 204 Resist mask 205 Second insulating film 206 First polycrystalline silicon film 207 Third insulating film 208 Second polycrystalline Silicon film 209 Source of semiconductor memory device 210 Drain of semiconductor memory device 211 Source of peripheral circuit transistor 212 Drain of peripheral circuit transistor 301 Semiconductor substrate 302 Field insulating film 303 First insulating film 30 First drain polysilicon film 305 second insulating film 306 third insulating film 307 second source 311 peripheral circuit transistor of the drain 310 the peripheral circuit transistor source 309 a semiconductor memory device of the polycrystalline silicon film 308 a semiconductor memory device

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Internal reference number FI technical display location H01L 29/796

Claims (4)

[Claims] 1. A MOS type transistor structure having a floating gate and a control gate, wherein a control threshold voltage of the characteristic of the MOS transistor of the control gate changes depending on how the charge is injected into the floating gate. In the method for manufacturing a semiconductor device, the step of forming a field insulating film on a semiconductor substrate, the step of forming a first insulating film on the semiconductor substrate, and the first area of the region where the MOS transistor is formed are included.
Removing the insulating film, the MOS on the semiconductor substrate
A step of forming a second insulating film in a region where a transistor is formed, a step of forming a conductor layer on the second insulating film, the first insulating film and the field insulating film, a driving element of the MOS transistor and a semiconductor memory element Removing the conductor layer formed in a region other than the above, forming a third insulating film on the conductor layer, and forming the third insulating film on a part of the gate electrode of the driving element of the semiconductor memory element A method of manufacturing a semiconductor device, comprising: a step of removing a film; a step of forming a second conductor layer on the field insulating film, the third silicon insulating film, and the first conductor layer. 2. A MOS type transistor structure having a floating gate and a control gate, wherein a control threshold voltage of the characteristic of the MOS transistor of the control gate changes depending on how the charge is injected into the floating gate. In the method for manufacturing a semiconductor device, the step of forming a field insulating film on a semiconductor substrate, the step of forming a first insulating film on the semiconductor substrate, and the first area of the region where the MOS transistor is formed are included.
Removing the insulating film, the MOS on the semiconductor substrate
A step of forming a second insulating film in a region where a transistor is formed, a step of forming a conductor layer on the second insulating film, the first insulating film and the field insulating film, a driving element of the MOS transistor and a semiconductor memory element Except for the step of removing the conductor layer formed in a region other than the above, the step of forming a third insulating film on the conductor layer, and the third insulating film formed on the gate electrode of the drive element of the semiconductor memory element. A method of manufacturing a semiconductor device, comprising: a removing step; and a step of forming a second conductor layer on the field insulating film, the third silicon insulating film, and the first conductor layer. 3. A MOS type transistor structure having a floating gate and a control gate, wherein a control threshold voltage of the characteristic of the MOS transistor of the control gate changes depending on how the charge is injected into the floating gate. In the semiconductor device described above, a first insulating film is formed on a semiconductor substrate of a semiconductor memory element, and a first conductor layer (floating gate) is formed on the first insulating film. A third insulating film is formed on the conductor layer, a second conductor layer (control gate) is formed on the third insulating film, and is formed on the semiconductor substrate of the driving element of the semiconductor memory element. Has a second insulating film formed thereon, the third conductor layer is formed on the second insulating film, and the fourth conductor is formed on a part of the third conductor layer. Border membrane is formed, the fourth
A semiconductor device, wherein a fourth conductor layer is formed on the third conductor layer on which an insulating film and the fourth insulating film are not formed. 4. A MOS type transistor structure having a floating gate and a control gate is formed, and a control threshold voltage of the characteristic of the MOS transistor of the control gate is changed depending on how the charge is injected into the floating gate. In the semiconductor device described above, a first insulating film is formed on a semiconductor substrate of a semiconductor memory element, and a first conductor layer (floating gate) is formed on the first insulating film. A third insulating film is formed on the conductor layer, a second conductor layer (control gate) is formed on the third insulating film, and is formed on the semiconductor substrate of the driving element of the semiconductor memory element. A second insulating film is formed, the third conductor layer is formed on the second insulating film, and a fourth conductor layer is formed on the third conductor layer. Wherein a being formed.