JPH0629541A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To etch the silicon nitride film of the drive element region of a semiconductor storage element without etching a semiconductor substrate under the silicon oxide film without eliminating the silicon oxide film of the drive element of the semiconductor storage element until the etching process of the silicon nitride film. CONSTITUTION:A third silicon oxide film 103 of the drive element of a semiconductor storage element is not eliminated until the etching process of a first silicon nitride film 108 at a region to serve as the drive element of the semiconductor storage element, thus etching the first silicon nitride film 108 of the drive element of the semiconductor storage element without etching a semiconductor substrate 101. Therefore, a first silicon oxide film 107 can be formed thinly, thus achieving a method for manufacturing a semiconductor device of the semiconductor storage element with an improved writing efficiency.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a method of manufacturing a memory element and its driving element.

[0002]

2. Description of the Related Art A conventional method for manufacturing a semiconductor memory device is as shown in FIGS. 2 (a) to 2 (h). This process will be described step by step.

First, a semiconductor substrate 201 as shown in FIG.
A silicon nitride film is formed in a predetermined shape on the top. Then, thermal oxidation is performed to form the field insulating film 202. The field insulating film 202 is formed to a thickness of 600 nm to 800 nm. The nitride film is removed, and a first insulating film 203 is formed on the semiconductor substrate 201 by a thermal oxidation method. For example, it is oxidized in a dry atmosphere having an oxygen concentration of 40% at 1000 degrees. The first insulating film 203 is 30 in the case of EPROM.
nm to 50 nm, and in the case of EEPROM, about 10 nm is suitable. The first insulating film 203 is used as a gate insulating film of a semiconductor memory device.

Next, as shown in FIG. 2B, a first polycrystalline silicon film 204 of about 200 nm is formed on the field insulating film 202 and the first insulating film 203 by the CVD method. Usually, monosilane gas is thermally decomposed at around 620 ° C. to deposit the first polycrystalline silicon 204. Then, in order to reduce the resistance of the first polycrystalline silicon film 204, for example, a group 5 element (for example, a conductive impurity such as phosphorus element or arsenic) is ion-implanted to 1 × 1.
Implantation is performed from 0 ¹⁵ to about 1 × 10 ¹⁶ atoms · cm ⁻² .

Next, as shown in FIG. 2C, unnecessary portions of the first polycrystalline silicon film 204 and the first insulating film 203 are removed by photo and etching methods.

Next, as shown in FIG. 2D, a first silicon oxide film 205 is formed to a thickness of about 5 nm on the first polycrystalline silicon 204 and the semiconductor substrate by a thermal oxidation method. For example, it is oxidized at 1000 ° C. in a dry atmosphere having an oxygen concentration of about 40%. Then, a first silicon nitride film 206 is formed on the first silicon oxide film 205 by chemical vapor deposition to have a thickness of about 10 nm.

Next, as shown in FIG. 2 (e), the first silicon nitride film 206 in the region to be the driving element of the semiconductor memory element is removed by photo and etching methods. Then, the first silicon oxide film 205 in the region to be the driving element of the semiconductor memory element is removed by photo and etching methods.

Next, as shown in FIG. 2F, the first silicon nitride film 206 and the semiconductor substrate 201 are formed by a thermal oxidation method.
A second silicon oxide film 207 is formed thereon to a thickness of about 5 nm. For example, it is oxidized at 1000 ° C. in a dry atmosphere having an oxygen concentration of about 40%.

Next, as shown in FIG. 2G, a second polycrystalline silicon film 208 is formed on the field insulating film 202 and the second polycrystalline silicon film 208.
300 is formed on the silicon oxide film 207 by chemical vapor deposition.
about nm. Then, an impurity such as phosphorus or arsenic is implanted into the second polycrystalline silicon film 208 by using an ion implantation method to make it a conductor. For example, an element of Group 5 (for example, a conductive impurity such as phosphorus element or arsenic) is used by an ion implantation method to form 1 × 10 ¹⁵ to 1 × 10 ¹⁶ atoms · cm.
Inject about ^-2 .

Next, as shown in FIG. 2H, an unnecessary portion of the second polycrystalline silicon 208 on the second silicon oxide film 207 is removed by a photo and etching method. This becomes the gate electrode of the transistor (driving element of the semiconductor memory element) of the peripheral circuit. Then, the second polycrystalline silicon 208, the second silicon oxide film 207, and the first silicon nitride film 2 are formed by a photo and etching method.
06, the first silicon oxide film 205, and unnecessary portions of the first polycrystalline silicon 204 are removed. This becomes the gate electrode of the semiconductor memory element.

Finally, an ion implantation method is used to implant impurities such as phosphorus and arsenic to source 20 of the semiconductor memory device.
9 and a drain 210, and a source 211 and a drain 212 of the transistor of the peripheral circuit are formed.

The above steps are the conventional method of manufacturing a semiconductor device.

[0013]

However, according to the above-mentioned conventional technique, when the first silicon nitride film 206 in the region to be the driving element of the semiconductor memory element is removed by the etching method, the first silicon oxide film 205 is removed. Since it is about 5 nm thin, it is etched, and eventually the semiconductor substrate 201 is also etched. Since the first silicon oxide film 205 is a part of the insulating film between the floating gate and the control gate of the semiconductor memory element, the thicker it is, the worse the writing efficiency of the semiconductor memory element becomes. Therefore, in the above-described conventional technique, when the first silicon nitride film 206 is removed by an etching method, the first silicon oxide film 205 is thickened so as not to be etched, so that the write efficiency of the semiconductor memory device is improved. There is a problem that it becomes worse. Therefore, the present invention solves such a problem, and an object of the present invention is to remove the first silicon nitride film 206 by the etching method even if the first silicon oxide film 205 is thin. Another object of the present invention is to provide a method of manufacturing a semiconductor device in which the silicon oxide film 205 is not etched.

[0014]

A method of manufacturing a semiconductor device according to the present invention has a MOS type transistor structure having a floating gate and a control gate, and is dependent on how the charge is injected into the floating gate.
In a method of manufacturing a semiconductor device in which a control threshold voltage of a characteristic of the MOS transistor of the control gate changes, a step of forming a field insulating film on a semiconductor substrate, and a step of forming a first insulating film on the semiconductor substrate ,
Removing the first insulating film in a region where the MOS transistor is formed, forming a second insulating film on the semiconductor substrate, forming the second insulating film, the field insulating film, and the first insulating film on the second insulating film. The step of forming a conductor layer, M
Removing the conductor layer so as to leave it in the region where the OS transistor is to be formed, forming a silicon oxide film on the conductor layer, forming a silicon nitride film on the silicon oxide film, and forming the MOS transistor It is characterized in that it comprises a step of removing the silicon nitride film other than the region.

[0015]

1 (a) to 1 (f) are main cross-sectional views of respective steps of a method of manufacturing a semiconductor device according to an embodiment of the present invention. In all the drawings of the embodiments, those having the same function are designated by the same reference numeral, and the repeated description thereof will be omitted. Hereinafter, description will be made in order according to FIGS. 1A to 1F.

First, a semiconductor substrate 101 as shown in FIG.
A silicon nitride film is formed in a predetermined shape on the top. Then, thermal oxidation is performed to form the field insulating film 102. The field insulating film 102 is formed to have a thickness of 600 nm to 800 nm. The nitride film is removed, and a third silicon oxide film 103 is formed on the semiconductor substrate 101 by thermal oxidation to a thickness of 30 to 50 nm. For example, it is oxidized in a dry atmosphere having an oxygen concentration of 40% at 1000 degrees.

Next, as shown in FIG. 1B, the third silicon oxide film 103 in the region of the semiconductor memory element is removed by photo and etching methods.

Next, as shown in FIG. 1C, a first insulating film 105 is formed on the semiconductor substrate 101. For example, 1
It is oxidized in a dry atmosphere of oxygen concentration of 40% at 000 degrees.
The first insulating film 104 should be 30 nm to 50 nm in the case of EPROM, and 10 nm in the case of EEPROM. The first insulating film 105 is used as a gate insulating film of a semiconductor memory device. Then, the field insulating film 102, the first insulating film 105, and the third insulating film
A first polycrystalline silicon film 106 having a thickness of about 200 nm is formed on the silicon oxide film 103 by chemical vapor deposition. Usually, monosilane gas is thermally decomposed at around 620 ° C.
Polycrystalline silicon 106 is deposited. Then, in order to reduce the resistance of the first polycrystalline silicon film 106, for example, a Group 5 element (for example, a conductive impurity such as phosphorus element or arsenic) is used by an ion implantation method from 1 × 10 ¹⁵ to 1 ×.
Implant about 10 ¹⁶ atoms · cm ⁻² .

Next, as shown in FIG. 1D, unnecessary portions of the first polycrystalline silicon film 106 are removed by photo and etching methods.

Next, as shown in FIG. 1E, a first silicon oxide film 10 is formed on the first polycrystalline silicon 106 by a thermal oxidation method.
7 is formed to a thickness of about 5 nm. For example, it is oxidized at 1000 ° C. in a dry atmosphere having an oxygen concentration of about 40%. Then, a first silicon nitride film 108 is formed on the first silicon oxide film 107 by about 10 nm using a chemical vapor deposition method.

Next, as shown in FIG. 1F, the first silicon nitride film 108 in the region to be the driving element of the semiconductor memory element is removed by photo and etching methods. Then, the third silicon oxide film 103 in the region to be the driving element of the semiconductor memory element is removed by photo and etching methods.

Next, as shown in FIG. 1G, the first silicon nitride film 108 and the semiconductor substrate 101 are formed by a thermal oxidation method.
A second silicon oxide film 109 is formed on the upper surface to a thickness of about 15 nm. For example, it is oxidized at 1000 ° C. in a dry atmosphere having an oxygen concentration of about 40%. Then, the second polycrystalline silicon film 11
0 is formed on the field insulating film 102 and the second silicon oxide film 109 by chemical vapor deposition to a thickness of about 300 nm. Then, an impurity such as phosphorus or arsenic is added to the second polycrystalline silicon film 1 by using an ion implantation method to make it a conductor.
Inject 10. For example, a Group 5 element (for example, a conductive impurity such as phosphorus or arsenic) is implanted by ion implantation at a dose of about 1 × 10 ¹⁵ to 1 × 10 ¹⁶ atoms · cm ⁻² .

Next, as shown in FIG. 1H, an unnecessary portion of the second polycrystalline silicon 110 on the second silicon oxide film 109 is removed by a photo and etching method. This becomes the gate electrode of the transistor (driving element of the semiconductor memory element) of the peripheral circuit. Then, the second polycrystalline silicon 110, the second silicon oxide film 109, and the first silicon nitride film 1 are formed by a photo and etching method.
08, the first silicon oxide film 107, and unnecessary portions of the first polycrystalline silicon 106 are removed. This becomes the gate electrode of the semiconductor memory element.

Finally, an ion implantation method is used to implant impurities such as phosphorus and arsenic to source 11 of the semiconductor memory device.
1 and the drain 112, and the source 113 and the drain 114 of the transistor of the peripheral circuit are formed.

The above manufacturing process is the manufacturing method of the semiconductor device of one embodiment of the present invention.

In this way, the third silicon oxide film 103 is removed by the photo and etching method only in the region of the semiconductor memory element. That is, the semiconductor substrate 101 is etched by not removing the third silicon oxide film 103 of the driving element of the semiconductor memory device until the step of etching the first silicon nitride film 108 in the region to be the driving element of the semiconductor memory device. Without doing so, it becomes possible to etch the first silicon nitride film 108 in the region of the driving element of the semiconductor memory element. This is because the underlying third silicon oxide film 103 is thick. Further, it is desired to form the first silicon oxide film 107 as thin as possible in order to improve the writing efficiency of the semiconductor memory element, but since the first silicon oxide film 107 can be arbitrarily formed thin, the semiconductor memory element with high writing efficiency can be formed. It is possible to realize a method for manufacturing a semiconductor device.

The invention made by the present inventor has been specifically described based on the above embodiment, but the present invention is not limited to the above embodiment, and is modified within a range not departing from the gist thereof. Of course, you can do that. For example, the third silicon oxide film 103 may be formed of a silicon oxide film for removing a white ribbon due to a silicon nitride film generated when forming the field insulating film 102. In the embodiment of the manufacturing method of the present invention, the ONO film (Si0 ₂ / SiN / Si0 ₂ ) is used for the semiconductor device of the semiconductor memory element.
iN / Si0 ₂₎ is effective even when using.

[0028]

According to the present invention, the silicon oxide film of the driving element of the semiconductor memory element is not removed until the step of etching the silicon nitride film in the region to be the driving element of the semiconductor memory element. It is possible to etch the silicon nitride film in the drive element region of the semiconductor memory element without etching. Further, in order to improve the writing efficiency of the semiconductor memory element, it is desired to form a silicon oxide film between the floating gate and the control gate as thin as possible. However, since the silicon oxide film can be arbitrarily thinned, the semiconductor device of the semiconductor memory element having a high writing efficiency can be obtained. It is possible to realize the manufacturing method of.

[Brief description of drawings]

FIG. 1 is a main cross-sectional view for explaining an embodiment of a method for manufacturing a semiconductor device of the present invention in the order of steps.

FIG. 2 is a main cross-sectional view for explaining a conventional method for manufacturing a semiconductor device in the order of steps.

[Explanation of symbols]

 101 semiconductor substrate 102 field insulating film 103 third silicon oxide film 104 resist mask 105 first insulating film 106 first polycrystalline silicon film 107 first silicon oxide film 108 first silicon nitride film 109 second silicon oxide film 110 second poly Crystal silicon film 111 Source of semiconductor memory device 112 Drain of semiconductor memory device 113 Source of peripheral circuit transistor 114 Drain of peripheral circuit transistor 201 Semiconductor substrate 202 Field insulating film 203 First insulating film 204 First polycrystalline silicon film 205 First silicon Oxide film 206 First silicon nitride film 207 Second silicon oxide film 208 Second polycrystalline silicon film 209 Source of semiconductor memory device 210 Source of semiconductor memory device 211 Source of peripheral circuit transistor 212 Peripheral circuit The drain of the transistor

Claims (1)

[Claims] 1. A MOS type transistor structure having a floating gate and a control gate, wherein a control threshold voltage of the characteristic of the MOS transistor of the control gate changes depending on how the charge is injected into the floating gate. In the method for manufacturing a semiconductor device, the step of forming a field insulating film on a semiconductor substrate, the step of forming a first insulating film on the semiconductor substrate, and the first area of the region where the MOS transistor is formed are included.
A step of removing an insulating film, a step of forming a second insulating film on the semiconductor substrate, a step of forming a conductor layer on the second insulating film, the field insulating film, and the first insulating film; A step of removing the conductor layer so as to leave it in a region to be formed, a step of forming a silicon oxide film on the conductor layer, a step of forming a silicon nitride film on the silicon oxide film, except a region for forming the MOS transistor 2. A method for manufacturing a semiconductor device, comprising the step of removing the silicon nitride film.