JPH05343699A - Manufacture of semiconductor storage device - Google Patents

Abstract

PURPOSE:To make it possible to form an insulating film, which is thinner than a conventional insulating film, between a floating gate and a control gate and to obtain a semiconductor storage device, whose write time is short, by a method wherein after the insulating film is formed on a polycrystalline silicon film, conductive impurities are implanted in the polycrystalline silicon film. CONSTITUTION:When a semiconductor storage element, such as an EPROM, is manufactured, a silicon nitride film is formed on a semiconductor substrate 101, this silicon nitride film is heat-oxidized to form a field insulating film 2 and a first insulating film 3 is formed thereon. Then, a first polycrystalline silicon film 104 is formed on these films 102 and 103 by a CVD method and after unnecessary parts of both films 103 and 104 are removed, a second insulating film 105 and a third insulating film 106 are respectively formed on the film 104 and the substrate 101 by a thermal oxidation method. Then, the surface part other than the films 105 and 102 is covered with a resist 107 and after conductive impurities, such as arsenic impurities, boron impurities or phosphorus impurities, are implanted in the film 104 by an ion-implantation method or the like, a second polycrystalline silicon film 109 is formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor memory device.

[0002]

2. Description of the Related Art FIGS. 2A to 2E are main cross-sectional views of respective steps of a method of manufacturing a semiconductor memory device and a peripheral semiconductor device according to a first embodiment of the prior art. In addition,
In all the drawings of the conventional example, those having the same function are
The same reference numerals are given and the repeated description is omitted. In the following, description will be made in order according to FIGS. 2A to 2E.

First, a semiconductor substrate 201 as shown in FIG.
A silicon nitride film is formed in a predetermined shape on the top. Then, thermal oxidation is performed to form the field insulating film 202. The nitride film is removed and a first oxide film is formed on the semiconductor substrate 201 by a thermal oxidation method.
The insulating film 103 is formed. The first insulating film 203 is EPRO
In the case of M, 30 nm to 50 nm, and in the case of EEPROM, about 10 nm is appropriate.

Next, as shown in FIG. 2B, a first polycrystalline silicon film 204 of about 200 nm is formed on the field insulating film 202 and the first insulating film 203 by the CVD method. Usually, the first polycrystalline silicon 204 is deposited by thermal decomposition of monosilane gas. Then, in order to reduce the resistance of the first polycrystalline silicon film 204, for example, 5
An element of a group (for example, a conductive impurity such as phosphorus or arsenic) is used by an ion implantation method from 1 × 10 ¹⁵ to 1 × 10 ¹⁶
Inject about atoms · cm ⁻² .

Then, unnecessary portions of the first insulating film 203 and the first polycrystalline silicon film 204 are removed by photo and etching methods.

Next, as shown in FIG. 2C, a second insulating film 205 is formed on the first polycrystalline silicon 204 and a third insulating film 206 is formed on the semiconductor substrate by a thermal oxidation method. For example, the second insulating film 205 and the third insulating film 206 are formed in a dry oxygen atmosphere at 1000 ° C.

Next, as shown in FIG. 2D, a second polycrystalline silicon film 207 is formed on the field insulating film 202 and the second polycrystalline silicon film 207.
The insulating film 205 and the third insulating film 206 are formed by a CVD method. Then, an impurity such as phosphorus or arsenic is implanted into the second polycrystalline silicon film 207 by using an ion implantation method to make it a conductor.

Next, as shown in FIG. 2E, an unnecessary portion of the second polycrystalline silicon 207 on the third insulating film 206 is removed by photo and etching methods. This becomes the gate electrode of the transistor of the peripheral circuit. Then, the first polycrystalline silicon 2 is formed by a photo and etching method.
04, the second insulating film 205, and unnecessary portions of the second polycrystalline silicon 207 are removed. This becomes the gate electrode of the semiconductor memory element.

Finally, impurities such as phosphorus and arsenic are implanted by ion implantation to form sources 208 and 210 and drains 209 and 211. The semiconductor memory device is completed through the above conventional manufacturing steps.

[0010]

However, in the above-mentioned conventional technique, the second insulating film 205 between the floating gate (the first polycrystalline silicon 204) and the control gate (the second polycrystalline silicon 207) is formed. Since the first polycrystalline silicon 204 is doped with impurities at the time of forming, the oxidation rate of the second insulating film 205 is high and the second insulating film 205 becomes thick. The second
Since the insulating film 205 also serves as the gate insulating film of the transistor of the peripheral circuit in the process, the forming condition of the second insulating film 205 is left to the insulating film forming condition of the transistor of the peripheral circuit. In order to shorten the writing time of the semiconductor device, there is a method of increasing the capacitance between the floating gate (the first polycrystalline silicon 204) and the control gate (the second polycrystalline silicon 207). The thicker the second insulating film 205, the smaller the capacitance between the floating gate (the first polycrystalline silicon 204) and the control gate (the second polycrystalline silicon 207) and the longer the writing time becomes. . Therefore, a thin film must be formed without changing the conditions for forming the second insulating film 205. Therefore, the present invention solves such a problem, and an object of the present invention is to make the third insulating film 106 and the second insulating film 205, which are the gate electrodes of the peripheral circuit, simultaneously and to make the floating gate as thin as possible. The second insulating film 205 is provided between the (first polycrystalline silicon 204) and the control gate (the second polycrystalline silicon 207).

[0011]

According to the present invention, a MOS type transistor structure having a floating gate and a control gate is formed, and a characteristic of the MOS transistor of the control gate is determined according to a state of injection of charges into the floating gate. In the method of manufacturing a semiconductor memory device in which the control threshold voltage changes, the step of forming a field insulating film on a substrate, the step of forming a first insulating film on the substrate, the field insulating film and the first insulating film. Forming a first polycrystalline silicon film on the film, forming a second insulating film on the first polycrystalline silicon,
It is characterized in that it comprises a step of implanting a conductive impurity such as arsenic, boron or phosphorus into the first polycrystalline silicon film.

[0012]

1 (a) to 1 (f) are main cross-sectional views of respective steps of a method of manufacturing a semiconductor memory device and its peripheral semiconductor device according to an embodiment of the present invention. In all the drawings of the embodiments, those having the same function are designated by the same reference numeral, and the repeated description thereof will be omitted. Hereinafter, description will be made in order according to FIGS. 1A to 1F.

First, as shown in FIG. 1A, a semiconductor substrate 101
A silicon nitride film is formed in a predetermined shape on the top. Then, thermal oxidation is performed to form the field insulating film 102. The nitride film is removed and a first oxide film is formed on the semiconductor substrate 101 by a thermal oxidation method.
The insulating film 103 is formed. The first insulating film 103 is EPRO
In the case of M, 30 nm to 50 nm, and in the case of EEPROM, about 10 nm is appropriate.

Next, as shown in FIG. 1B, a first polycrystalline silicon film 104 having a thickness of about 200 nm is formed on the field insulating film 102 and the first insulating film 103 by a CVD method. Usually, the first polycrystalline silicon 104 is deposited by thermal decomposition of monosilane gas.

Then, unnecessary portions of the first insulating film 103 and the first polycrystalline silicon film 104 are removed by photo and etching methods.

Next, as shown in FIG. 1C, a second insulating film 105 is formed on the first polycrystalline silicon 104 and a third insulating film 106 is formed on the semiconductor substrate by a thermal oxidation method. For example, the second insulating film 105 and the third insulating film 106 are formed in a dry oxygen atmosphere at 1000 ° C.

Next, as shown in FIG. 1D, the second insulating film 10 is formed.
5 and a portion other than the field insulating film 102 are covered with a resist 107. Then, the first polycrystalline silicon film 1
In order to reduce the resistance of No. 04, for example, a group 5 element (for example, a conductive impurity such as phosphorus element or arsenic) is used by an ion implantation method 109, and 1 × 10 ¹⁵ to 1 × 10 ¹⁶ atoms
・ Inject about cm ^-2 . Next, as shown in FIG.
A portion other than the insulating film and the field insulating film is covered with the resist 107.

Next, as shown in FIG. 1E, the second polycrystalline silicon film 109 is formed on the field insulating film 102 and the second polycrystalline silicon film 109.
The insulating film 105 and the second insulating film 106 are formed by a CVD method. Then, an impurity such as phosphorus or arsenic is implanted into the second polycrystalline silicon film 109 by using an ion implantation method to make it a conductor.

Next, as shown in FIG. 1F, unnecessary portions of the second polycrystalline silicon 109 on the third insulating film 106 are removed by photo and etching methods. This becomes the gate electrode of the transistor of the peripheral circuit. Then, the first polycrystalline silicon 1 is formed by a photo and etching method.
04, the second insulating film 105, and unnecessary portions of the second polycrystalline silicon 109 are removed. This becomes the gate electrode of the semiconductor memory element. Finally, by ion implantation, impurities such as phosphorus and arsenic are implanted to form the sources 108, 11
0 and drains 109 and 110 are formed. Through the above manufacturing steps, the semiconductor memory device of one embodiment of the present invention is completed.

As described above, the first polycrystalline silicon 104 is formed.
The second insulating film 105, which is thinner than the conventional one, is formed by implanting impurities to reduce the resistance of the first polycrystalline silicon 104 after forming the second insulating film 105 thereon.
Can be formed. This is because, when the resistance of the first polycrystalline silicon 104 is reduced, if an impurity is implanted before the second insulating film 105 is formed, even if the insulating film is formed under the same conditions, the impurity concentration is high. This is because a thinner insulating film can be formed between the first polycrystalline silicon 104 and the first polycrystalline silicon 104 which is not impurity-implanted when the impurity is not implanted. Further, by using the manufacturing method of the present invention, it is possible to serve as the second insulating film 105 and the gate insulating film (the third insulating film 106) of the transistor of the peripheral circuit in the process.

The invention made by the present inventor has been specifically described based on the above-mentioned embodiment, but the present invention is not limited to the above-mentioned embodiment, and may be modified without departing from the scope of the invention. Of course, you can do that.

[0022]

As described above, according to the present invention, it is possible to form an insulating film between a floating gate and a control gate, which is thinner than before, by implanting impurities after forming the insulating film. Become. As a result, the capacity of the insulating film between the floating gate and the control gate increases, and a semiconductor memory device with a short writing time can be obtained.

[Brief description of drawings]

FIG. 1 is a main sectional view for explaining an embodiment of a method for manufacturing a semiconductor device of the present invention in the order of steps.

FIG. 2 is a main cross-sectional view for explaining a conventional method for manufacturing a semiconductor device in the order of steps.

[Explanation of symbols]

 101 semiconductor substrate 102 field insulating film 103 first insulating film 104 first polycrystalline silicon film 105 second insulating film 106 third insulating film 107 photoresist 108 impurity implantation 109 second polycrystalline silicon 110 semiconductor device 111 semiconductor device 112 semiconductor memory Source of peripheral transistor of device 113 Drain of peripheral transistor of semiconductor memory device 201 Semiconductor substrate 202 Field insulating film 203 First insulating film 204 First polycrystalline silicon film 205 Second insulating film 206 Third insulating film 207 Second polycrystalline silicon Film 208 Source of semiconductor device 209 Drain of semiconductor device 210 Source of peripheral transistor of semiconductor memory device 211 Drain of peripheral transistor of semiconductor memory device

Claims (1)

[Claims] 1. A MOS type transistor structure having a floating gate and a control gate, wherein a control threshold voltage of a characteristic of the MOS transistor of the control gate is changed depending on how an electric charge is injected into the floating gate. In the method of manufacturing a semiconductor memory device according to claim 1, a step of forming a field insulating film on a substrate, a step of forming a first insulating film on the substrate, a first polycrystalline silicon on the field insulating film and the first insulating film. A step of forming a film, a step of forming a second insulating film on the first polycrystalline silicon film, and a step of implanting a conductive impurity such as arsenic, boron or phosphorus into the first polycrystalline silicon film. Manufacturing method of semiconductor memory device.