JPH06295961A - Electronic part mounting device - Google Patents
Electronic part mounting deviceInfo
- Publication number
- JPH06295961A JPH06295961A JP10608993A JP10608993A JPH06295961A JP H06295961 A JPH06295961 A JP H06295961A JP 10608993 A JP10608993 A JP 10608993A JP 10608993 A JP10608993 A JP 10608993A JP H06295961 A JPH06295961 A JP H06295961A
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- lead frame
- wiring
- adhesive
- solder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
Landscapes
- Die Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、電子部品搭載装置に係
り、特に配線基板の表面側にリードフレームを配置させ
た構造の電子部品搭載装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic component mounting apparatus, and more particularly to an electronic component mounting apparatus having a structure in which a lead frame is arranged on the front surface side of a wiring board.
【０００２】[0002]
【従来の技術】従来、この種の電子部品搭載装置は、例
えば図５に示すように、配線基板１の表面側の所定領域
に接着剤層２を設けてこれにリードフレーム３を接着固
定させ、さらにリードフレーム３と配線基板１の配線部
及びスルーホール４間をはんだによって接合させてい
た。このとき、配線基板１とリードフレーム３との密着
性を確保し特にリードフレーム３と配線部等とのはんだ
接合箇所における配線基板１面からのリードフレーム３
の浮きを防止することで、はんだ接合の信頼性を確保す
るために、通常、接着剤２によるリードフレーム３と配
線部等との固定の少なくとも１か所は配線基板１の端面
近傍位置にて行われていた。2. Description of the Related Art Conventionally, in this type of electronic component mounting apparatus, as shown in FIG. 5, for example, an adhesive layer 2 is provided in a predetermined region on the front surface side of a wiring board 1 and a lead frame 3 is adhered and fixed thereto. Further, the lead frame 3 and the wiring portion of the wiring board 1 and the through hole 4 are joined by solder. At this time, the adhesion between the wiring board 1 and the lead frame 3 is ensured, and particularly the lead frame 3 from the surface of the wiring board 1 at the solder joint portion between the lead frame 3 and the wiring portion or the like
In order to ensure the reliability of the solder joint by preventing the floating of the lead frame, at least one position where the lead frame 3 and the wiring part are fixed by the adhesive 2 is usually at a position near the end face of the wiring board 1. It was done.
【０００３】[0003]
【発明が解決しようとする課題】しかし、上記電子部品
搭載装置は、配線基板の周縁近傍部分の広い領域がリー
ドフレームと配線基板の固定のために占有されることに
なり、従ってリードフレームと配線部とのはんだ接合箇
所が配線基板の内側の狭い領域に限られることになる。
このため、特に多ピンリードでファインピッチのリード
フレームの場合、リード間及び配線部間等の距離が狭く
なるため、配線基板とのはんだ接合の形成においてはん
だのブリッジ等の不良が生じやすくなり、はんだ接合を
信頼性良く形成することが非常に困難になるという問題
がある。本発明は、上記した問題を解決しようとするも
ので、ファインピッチのリードフレームと配線基板の配
線部とのはんだ接合の形成を容易かつ信頼性良く行わせ
るためにリードフレームの配線基板への接着固定方法を
改良した電子部品搭載装置を提供することを目的とす
る。However, in the above-described electronic component mounting apparatus, a large area near the peripheral edge of the wiring board is occupied for fixing the lead frame and the wiring board, and therefore the lead frame and the wiring are fixed. The solder joints with the parts are limited to a narrow area inside the wiring board.
For this reason, particularly in the case of a lead frame with a large number of pins and a fine pitch, the distances between the leads and between the wiring portions are narrowed, so that a defect such as a solder bridge is likely to occur in the formation of the solder joint with the wiring board. There is a problem that it is very difficult to form a bond with high reliability. SUMMARY OF THE INVENTION The present invention is intended to solve the above-mentioned problems, and in order to easily and reliably form a solder joint between a fine pitch lead frame and a wiring portion of a wiring board, the lead frame is bonded to the wiring board. An object is to provide an electronic component mounting apparatus with an improved fixing method.
【０００４】[0004]
【課題を解決するための手段】上記目的を達成するため
に、上記請求項１に係る発明の構成上の特徴は、配線基
板と、配線基板の表面側に配設されるリードフレームと
を設けた電子部品搭載装置であって、リードフレームと
配線基板の側面との交差部分に接着剤を介在させること
によって同リードフレームを同配線基板に接着固定させ
たことにある。In order to achieve the above object, the structural feature of the invention according to claim 1 is that a wiring board and a lead frame provided on the front surface side of the wiring board are provided. In another electronic component mounting apparatus, the lead frame is adhered and fixed to the wiring board by interposing an adhesive at the intersection of the lead frame and the side surface of the wiring board.
【０００５】[0005]
【発明の作用・効果】上記のように構成した請求項１に
係る発明においては、リードフレームを配線基板の側面
との交差部分に介在させた接着剤によって配線基板に接
着固定させるようにしたので、配線基板の表面の端部近
傍に接着剤層を設ける必要がなくなったため、リードフ
レームと配線基板の配線部，スルーホール等とのはんだ
接合形成位置を配線基板の周縁部の広い領域に設けるこ
とが可能になった。その結果、リードフレームが多ピン
リードでファインピッチであっても、はんだ接合形成位
置におけるリード間，配線部間等の距離に余裕が生じ、
従って、はんだブリッジ等の不良を生じることなくリー
ドフレームと配線基板とのはんだ接合が信頼性良く形成
される。In the invention according to claim 1 configured as described above, the lead frame is adhered and fixed to the wiring board by the adhesive interposed at the intersection with the side surface of the wiring board. Since it is no longer necessary to provide an adhesive layer near the edge of the surface of the wiring board, the solder joint formation position between the lead frame and the wiring section of the wiring board, the through hole, etc. should be provided in a wide area around the peripheral edge of the wiring board. Became possible. As a result, even if the lead frame has a multi-pin lead and a fine pitch, there is a margin in the distance between the leads at the solder joint formation position, between the wiring parts, etc.
Therefore, the solder joint between the lead frame and the wiring board can be formed with high reliability without causing defects such as solder bridges.
【０００６】[0006]
【実施例】以下、本発明の一実施例を図面により説明す
る。図１及び図２は、本発明に係る半導体チップ搭載装
置（半導体チップ組付け前）を横断面図及び斜視図によ
り概略的に示したものである。この半導体チップ搭載装
置は、０．２ｍｍ厚のビスマレイミドトリアジン基板に
プリント配線を施した配線基板１０を有している。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. 1 and 2 schematically show a semiconductor chip mounting apparatus (before assembling a semiconductor chip) according to the present invention by a cross-sectional view and a perspective view. This semiconductor chip mounting device has a wiring board 10 in which printed wiring is formed on a bismaleimide triazine substrate having a thickness of 0.2 mm.
【０００７】配線基板１０は、図２に示すように、中央
に半導体チップ搭載用のキャビティ１１を設けると共に
基板面を貫通した０．３ｍｍφの複数のスルーホール１
２を設けている。スルーホール１２の内壁には銅メッキ
後にニッケルメッキ及び金メッキを施した導電層が形成
されている。また、配線基板１０の表面側には、キャビ
ティ１１を囲んでリング状にグランド接続部１０ａと電
源接続部１０ｂが形成されており、グランド接続部１０
ａと電源接続部１０ｂは、それぞれスルーホール１０ａ
１，１０ｂ１により裏面の電極１０ｃ，１０ｄ（１０ｄ
は図示しない）に接続されている。さらに、裏面の電極
１０ｃ，１０ｄ表面には、ソルダーレジスト１０ｅが施
されており、ニッケルメッキ及び金メッキ面積の低減や
はんだ付着の防止及び放熱板との絶縁性の確保がなされ
ている。裏面の電極１０ｃ，１０ｄは、特定のスルーホ
ール１２を介して後述するリードフレーム２０の特定の
インナーリード２１に接続されている。As shown in FIG. 2, the wiring board 10 has a cavity 11 for mounting a semiconductor chip in the center and a plurality of through holes 1 of 0.3 mmφ penetrating the board surface.
2 is provided. On the inner wall of the through hole 12, a conductive layer plated with copper and then plated with nickel and gold is formed. Further, on the front surface side of the wiring board 10, a ring-shaped ground connecting portion 10a and a power supply connecting portion 10b are formed so as to surround the cavity 11, and the ground connecting portion 10 is formed.
a and the power supply connection portion 10b are respectively through holes 10a.
The electrodes 10c and 10d (10d
Are not shown). Further, a solder resist 10e is applied to the surfaces of the electrodes 10c and 10d on the back surface to reduce the nickel plating and gold plating areas, prevent solder adhesion, and ensure insulation with the heat sink. The electrodes 10c and 10d on the back surface are connected to specific inner leads 21 of a lead frame 20 described later through specific through holes 12.
【０００８】配線基板１０の表面側には、銅合金，鉄ニ
ッケル合金等の材質からなるリードフレーム２０の複数
のインナーリード２１が配置される。その際、インナー
リード２１の内の一部が、所定のスルーホール１２の上
部に重なるように位置合わせされる。そして、インナー
リード２１は、本発明の要部である配線基板１０の側面
に塗布されたエポキシ系の接着剤２２によって配線基板
１０に接着固定されている。また、配線基板１０の中央
にまで延びたインナーリード２１については、中央部分
にて接着剤２３によって配線基板１０に接着固定されて
いる。このインナーリード２１の配線基板１０の側面へ
の接着について詳細に説明すると、まずインナーリード
２１を配線基板１０に位置合わせし、液状のエポキシ接
着剤２２を配線基板１０の側面１０ｄに塗布してインナ
ーリード２１との間に接着剤を介在させる。その後、接
着剤２２を加熱硬化させることにより、インナーリード
２１は配線基板１０に接着固定される。このとき、配線
基板１０の側面１０ｄは、打ち抜き加工により面が荒れ
ているので接着剤との接着強度が高められる。また、接
着剤２０は、図４に示すように、表面張力によりインナ
ーリード２１の側面にまで盛り上がるため、接着面積が
増大し、両者間の接着強度が高められる。なお、この際
インナーリード２１の非接着面に離型シートを張り付け
ることにより、インナーリード２１表面への接着剤の流
れ込みを防止することができる。A plurality of inner leads 21 of a lead frame 20 made of a material such as a copper alloy and an iron-nickel alloy are arranged on the surface side of the wiring board 10. At that time, a part of the inner lead 21 is aligned so as to overlap the upper portion of the predetermined through hole 12. The inner lead 21 is adhesively fixed to the wiring board 10 by an epoxy adhesive 22 applied to the side surface of the wiring board 10 which is the main part of the present invention. The inner lead 21 extending to the center of the wiring board 10 is adhesively fixed to the wiring board 10 with an adhesive 23 at the center portion. Adhesion of the inner lead 21 to the side surface of the wiring board 10 will be described in detail. First, the inner lead 21 is aligned with the wiring board 10, and a liquid epoxy adhesive 22 is applied to the side surface 10d of the wiring board 10 to form an inner layer. An adhesive is interposed between the lead 21 and the lead 21. Thereafter, the inner lead 21 is adhesively fixed to the wiring board 10 by heating and curing the adhesive 22. At this time, since the side surface 10d of the wiring board 10 is roughened by punching, the adhesive strength with the adhesive is increased. Further, as shown in FIG. 4, the adhesive 20 swells up to the side surface of the inner lead 21 due to surface tension, so that the adhesive area is increased and the adhesive strength between the two is increased. At this time, by sticking a release sheet to the non-adhesive surface of the inner leads 21, it is possible to prevent the adhesive from flowing into the surface of the inner leads 21.
【０００９】以上に説明したように、上記実施例におい
ては、リードフレームを配線基板の側面との間に介在さ
せた接着剤層によって配線基板に接着固定させるように
したので、配線基板の表面の周縁近傍部に接着剤層を設
ける必要がなくなったため、リードフレームと配線基板
の配線部とのはんだ接合形成位置やスルーホールの形成
を配線基板の周縁部の広い領域に設けることが出来る。
このため、リードフレームが多ピンでファインピッチで
あっても、はんだ接合形成位置における配線部相互間，
スルーホール間の距離に余裕が生じ、従って、はんだブ
リッジ等の不良を生じることなくリードフレームと配線
基板とのはんだ接合を高い信頼性で形成することができ
る。また、リードフレームを配線基板の側面に固定させ
たことにより、リードの基板面からの浮きを防止するこ
とができ、リードフレームと配線基板とのはんだ接合を
信頼性良く形成することができる。As described above, in the above embodiment, the lead frame is adhered and fixed to the wiring board by the adhesive layer interposed between the lead frame and the side surface of the wiring board. Since it is not necessary to provide the adhesive layer in the vicinity of the peripheral edge, the solder joint forming position between the lead frame and the wiring portion of the wiring board and the formation of the through hole can be provided in a wide area of the peripheral edge of the wiring board.
Therefore, even if the lead frame has a large number of pins and a fine pitch, between the wiring portions at the solder joint forming position,
There is a margin in the distance between the through holes, and therefore, the solder joint between the lead frame and the wiring board can be formed with high reliability without causing defects such as solder bridges. Further, by fixing the lead frame to the side surface of the wiring board, it is possible to prevent the lead from floating from the board surface, and form the solder joint between the lead frame and the wiring board with high reliability.
【００１０】つぎに、配線基板１０の裏面側を噴流はん
だ槽（図示しない）の溶融はんだ面上に載置させること
により、溶融はんだ１３がスルーホール１２内に流入し
て上昇し、配線基板１０の表面側開口位置に達し、スル
ーホール１２上に位置するインナーリード２１との間に
はんだ接合が形成される。その後、配線基板１０の裏面
側に半導体チップ取り付けを兼ねた無酸素銅製の放熱板
３０がエポキシ等の接着剤３１により接着固定される。
放熱板３０としては、無酸素銅の他にアルミニウム等の
熱伝導性の良い金属、セラミック材料等を用いてもよ
い。さらに、配線基板１０のキャビティ１１位置の放熱
板３０に接着剤４１等を用いて半導体チップ４０をダイ
ボンディングし、さらに半導体チップ４０の電極パッド
と配線基板１０のグランド接続部１０ａ，電源接続部１
０ｂ及びインナーリード２１間をワイヤボンディングに
より接続させる。半導体チップ４０の組付けの完了した
配線基板１０ａを、エポキシ樹脂４２等によりモールド
し、リードフレーム２０を切断することにより、図３に
示すように、最終的な半導体装置に形成される。Next, by placing the back surface side of the wiring board 10 on the molten solder surface of a jet solder bath (not shown), the molten solder 13 flows into the through holes 12 and rises, and the wiring board 10 The solder joint is formed between the inner lead 21 and the inner lead 21 located on the surface of the through hole 12. After that, a heat dissipation plate 30 made of oxygen-free copper, which also serves as a semiconductor chip attachment, is bonded and fixed to the back surface side of the wiring board 10 with an adhesive 31 such as epoxy.
As the heat dissipation plate 30, in addition to oxygen-free copper, a metal having good thermal conductivity such as aluminum, a ceramic material, or the like may be used. Further, the semiconductor chip 40 is die-bonded to the heat dissipation plate 30 at the position of the cavity 11 of the wiring board 10 using the adhesive 41 or the like, and the electrode pad of the semiconductor chip 40 and the ground connection portion 10a of the wiring board 10 and the power supply connection portion 1 are further attached.
0b and the inner lead 21 are connected by wire bonding. The wiring board 10a on which the semiconductor chip 40 has been assembled is molded with an epoxy resin 42 or the like, and the lead frame 20 is cut to form a final semiconductor device as shown in FIG.
【００１１】なお、インナーリード２１の配線基板１０
への接着について、上記実施例に示した方法の他に、予
めインナーリード２１に配線基板に対して枠形状に半硬
化状態の接着剤を仮接着させておき、配線基板１０をこ
の枠形状の接着剤層に位置合わせしてセットし、その
後、接着剤層を加熱硬化させることにより、インナーリ
ード２１を配線基板１０に接着固定させるようにしても
よい。この接着方法を用いることにより、インナーリー
ド２１が接着剤層によって補強されるためリード曲がり
が防止され、またこの接着剤層が、インナーリード２１
と配線基板１０との接着の位置合わせにもなる。The wiring board 10 for the inner leads 21
In addition to the method shown in the above embodiment, the semi-cured adhesive in a frame shape is temporarily attached to the inner lead 21 in advance in the inner lead 21 so that the wiring board 10 is adhered to the frame shape. The inner leads 21 may be adhesively fixed to the wiring board 10 by aligning and setting them on the adhesive layer and then heating and curing the adhesive layer. By using this bonding method, since the inner lead 21 is reinforced by the adhesive layer, lead bending is prevented, and this adhesive layer is used as the inner lead 21.
It also serves as a position for bonding the wiring board 10 and the wiring board 10.
【００１２】また、上記実施例においては、配線基板に
半導体チップを組み付けた半導体チップ搭載装置につい
て説明しているが、その他の電子部品を組み付けるよう
にしてもよい。In the above embodiment, the semiconductor chip mounting device in which the semiconductor chip is mounted on the wiring board has been described, but other electronic parts may be mounted.
【図１】本発明の一実施例に係る半導体チップ搭載装置
を概略的に示す断面図である。FIG. 1 is a sectional view schematically showing a semiconductor chip mounting device according to an embodiment of the present invention.
【図２】同半導体チップ搭載装置の一部を示す斜視図で
ある。FIG. 2 is a perspective view showing a part of the same semiconductor chip mounting apparatus.
【図３】同半導体チップ搭載装置の完成状態を概略的に
示す断面図である。FIG. 3 is a sectional view schematically showing a completed state of the semiconductor chip mounting apparatus.
【図４】インナーリードと配線基板の側面との接着剤に
よる接着状態を示す部分断面図である。FIG. 4 is a partial cross-sectional view showing an adhesion state of an inner lead and a side surface of a wiring board with an adhesive.
【図５】従来例に係る半導体チップ搭載装置を概略的に
示す断面図である。FIG. 5 is a sectional view schematically showing a semiconductor chip mounting device according to a conventional example.
１０；配線基板、１１；キャビティ、１２；スルーホー
ル、１３；はんだ、２０；リードフレーム、２１；イン
ナーリード、２２，２３；接着剤、３０；放熱板、３
１；接着剤、４０；半導体チップ、４１；接着剤、４
２；モールド樹脂。10; wiring board, 11; cavity, 12; through hole, 13; solder, 20; lead frame, 21; inner leads, 22, 23; adhesive, 30; heat sink, 3
1; adhesive, 40; semiconductor chip, 41; adhesive, 4
2; Mold resin.
Claims (1)
されるリードフレームとを設けた電子部品搭載装置であ
って、 前記リードフレームと前記配線基板の側面との交差部分
に接着剤を介在させることによって同リードフレームを
同配線基板に接着固定させたことを特徴とする電子部品
搭載装置。1. An electronic component mounting apparatus comprising a wiring board and a lead frame arranged on the front surface side of the wiring board, wherein an adhesive is provided at an intersection of the lead frame and a side surface of the wiring board. An electronic component mounting apparatus characterized in that the lead frame is adhered and fixed to the wiring board by interposing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10608993A JPH06295961A (en) | 1993-04-07 | 1993-04-07 | Electronic part mounting device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10608993A JPH06295961A (en) | 1993-04-07 | 1993-04-07 | Electronic part mounting device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06295961A true JPH06295961A (en) | 1994-10-21 |
Family
ID=14424828
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10608993A Pending JPH06295961A (en) | 1993-04-07 | 1993-04-07 | Electronic part mounting device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06295961A (en) |
-
1993
- 1993-04-07 JP JP10608993A patent/JPH06295961A/en active Pending
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