JPH077033A - Manufacture of semiconductor packaging device - Google Patents

Manufacture of semiconductor packaging device

Info

Publication number
JPH077033A
JPH077033A JP5172705A JP17270593A JPH077033A JP H077033 A JPH077033 A JP H077033A JP 5172705 A JP5172705 A JP 5172705A JP 17270593 A JP17270593 A JP 17270593A JP H077033 A JPH077033 A JP H077033A
Authority
JP
Japan
Prior art keywords
wiring board
resin
mold
cavity
inner lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5172705A
Other languages
Japanese (ja)
Inventor
Mitsuhiro Kondo
光広 近藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to JP5172705A priority Critical patent/JPH077033A/en
Publication of JPH077033A publication Critical patent/JPH077033A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Landscapes

  • Injection Moulding Of Plastics Or The Like (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent resin from being squeezed out from a mold to outer lead wires in a resin mold for an electronic component packaging device. CONSTITUTION:An area from a peripheral edge on the surface of a wiring board 10 up to a through hole inside is coated with a bonding agent 15 at a specified thickness. An inner lead wire 21 of a lead frame 20 is heated and contact-bonded with a bonding agent layer, thereby fixing the inner lead with the wiring board 10. During this operation, the bonding agent softened by the heat is pressed by the inner lead wire and swelled between the inner lead wires so that the top of the bonding agent may be substantially flush with the top of the inner lead wires. A peripheral edge of a cavity of a top force 51 of a molding die 50 is laid out on the inner lead wire near the rear side-peripheral edge of the wiring board while a peripheral edge of a cavity of a bottom tool 52 is aligned with an area near the rear side-peripheral edge of the wiring board and clamped. When resin is injected into the cavity, no resin will be squeezed out from the cavity since there is no clearance between the top force and the inner lead.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、電子部品搭載装置の製
造方法に係り、特に配線基板にリードフレームを固定
し、電子部品を組み付けた後に樹脂モールドを行うタイ
プの電子部品搭載装置の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing an electronic component mounting apparatus, and more particularly to a method of manufacturing an electronic component mounting apparatus of a type in which a lead frame is fixed to a wiring board, electronic components are assembled and then resin molding is performed. Regarding

【0002】[0002]

【従来の技術】従来、多ピンファインピッチリードの半
導体装置に有効な組み付け方法として、例えば電子部品
搭載部を備えたプリント配線板にリードフレームのリー
ドを固定させ、半導体チップを搭載した後に、全体をト
ランスファモールド法により樹脂封止する方法が用いら
れていた。そして、リードフレームは、モールド用金型
の上下型の間のリードの厚み分の隙間からのモールド樹
脂の飛びだしを防止するために、樹脂モールド部分のわ
ずか外側のアウターリード間にダムバーを設けていた。
そして、金型のキャビティ部からはみ出してダムバーに
まで飛びだした樹脂バリについては、ダムバー除去用金
型によりダムバーの打ち抜きと同時に除去していた。
2. Description of the Related Art Conventionally, as an effective assembly method for a semiconductor device having a multi-pin fine pitch lead, for example, after fixing the lead of a lead frame to a printed wiring board having an electronic component mounting portion and mounting a semiconductor chip, A method of resin-sealing the resin has been used. Further, in the lead frame, a dam bar is provided between the outer leads slightly outside the resin mold portion in order to prevent the molding resin from jumping out from the gap corresponding to the thickness of the leads between the upper and lower molds of the molding die. .
The resin burrs protruding from the cavity of the mold to the dam bar were removed by the dam bar removing mold at the same time as the punching of the dam bar.

【0003】ところが、リードフレームのリードピッチ
が0.4mm以下のファインピッチになると、ダムバー
除去用の金型の製造が困難になり従って高価になると共
に、ダムバー除去作業自体の作業性も悪く歩留りを悪化
させるという問題もあった。このような問題を解決する
方法として、例えば特開平3ー136267号公報に示
されているように、樹脂モールド部分の外側のアウター
リード間を例えばポリイミドベースフィルムに接着剤を
重ねた樹脂製テープによって埋めることによりダムを設
け、キャビティ部からリード間へのモールド樹脂のはみ
出しを防止する方法が提案されている。
However, when the lead pitch of the lead frame becomes a fine pitch of 0.4 mm or less, it becomes difficult to manufacture a die for removing the dam bar, and therefore it becomes expensive, and the workability of the dam bar removing operation itself is poor and the yield is high. There was also the problem of making it worse. As a method of solving such a problem, for example, as disclosed in Japanese Patent Laid-Open No. 3-136267, a resin tape in which an adhesive is laminated on a polyimide base film is used between outer leads on the outside of the resin mold portion. A method has been proposed in which a dam is provided by filling the mold resin to prevent the molding resin from protruding from the cavity portion to between the leads.

【0004】[0004]

【発明が解決しようとする課題】しかし、上記製造方法
によれば、ドライフィルムやプリプレグ等を用いてダム
を形成するものであり材料コストが大幅に高くなるた
め、金属板にエッチッグやスタンピング加工等を施すこ
とにより安価に製造されたリードフレームを採用するに
もかかわらず、電子部品搭載装置の価格を高価にすると
いう問題がある。また、上記ダムの形成自体にも時間を
要し、電子部品搭載装置の生産性も悪化するという問題
もある。さらに、多ピンファインピッチのリードフレー
ムと配線基板との位置合わせは高精度で行われる必要が
あるが、樹脂のダムを設けたリードフレームと配線基板
とをはんだ等で接合させる場合、樹脂製のダムバーが加
熱により硬化収縮するため、リードの配線基板に対する
位置合わせ精度が悪くなり、両者間の接続に支障を来す
という問題もある。本発明は、上記した問題を解決しよ
うとするもので、電子部品搭載装置の樹脂モールド工程
におけるモールド用金型のキャビティ部からリード間へ
の樹脂の飛びだしを簡易に防止することのできる電子部
品搭載装置の製造方法を提供することを目的とする。
However, according to the above manufacturing method, the dam is formed by using the dry film, the prepreg, etc., and the material cost is significantly increased. However, there is a problem in that the price of the electronic component mounting apparatus becomes expensive, although the lead frame manufactured at low cost is adopted. Further, there is also a problem that it takes time to form the dam itself and productivity of the electronic component mounting apparatus is deteriorated. Further, the alignment of the multi-pin fine-pitch lead frame and the wiring board needs to be performed with high precision, but when the lead frame provided with the resin dam and the wiring board are joined by soldering or the like, the resin Since the dam bar is hardened and shrunk by heating, the accuracy of alignment of the leads with respect to the wiring board deteriorates, and there is also a problem that the connection between the two is disturbed. The present invention is intended to solve the above-mentioned problems, and is capable of easily preventing the resin from jumping out from the cavity portion of the molding die to the leads in the resin molding process of the electronic component mounting apparatus. An object is to provide a method for manufacturing a device.

【0005】[0005]

【課題を解決するための手段】上記目的を達成するため
に、上記請求項1に係る発明の構成上の特徴は、電子部
品搭載部を有する配線基板の表面側周縁部から内側へ向
けた所定の範囲に所定厚みの樹脂層を設ける樹脂層形成
工程と、配線基板の表面側にリードフレームの複数のリ
ードを接着固定させるリード接着工程と、リードの接着
固定された配線基板の電子部品搭載部に電子部品を組み
付ける電子部品組付け工程と、モールド用金型の上型及
び下型に設けたキャビティ部の周縁位置を配線基板の周
縁部の内側近傍に配置させて同上型及び下型を型締めし
た後、同キャビティ部にモールド樹脂を圧入させる樹脂
モールド工程とを設けたことにある。
In order to achieve the above-mentioned object, the structural feature of the invention according to claim 1 is that a wiring board having an electronic component mounting portion is provided with a predetermined inward direction from the peripheral portion on the front surface side. Layer forming step of providing a resin layer of a predetermined thickness within the range, a lead adhering step of adhering and fixing a plurality of leads of the lead frame to the surface side of the wiring board, and an electronic component mounting portion of the wiring board to which the leads are adhering and fixing The electronic part assembling step of assembling the electronic parts to the mold and the peripheral parts of the cavities provided in the upper mold and the lower mold of the molding die are arranged near the inside of the peripheral part of the wiring board to form the upper mold and the lower mold. After tightening, a resin molding step of press-fitting a mold resin into the cavity portion is provided.

【0006】また、上記請求項2に係る発明の構成上の
特徴は、前記請求項1に記載の電子部品搭載装置の製造
方法において、配線基板のモールド樹脂によって被覆さ
れる部分の一部に所定形状の貫通孔を設けたことにあ
る。
Further, the structural feature of the invention according to claim 2 is that, in the method of manufacturing an electronic component mounting apparatus according to claim 1, a part of a portion of the wiring substrate covered with the mold resin is predetermined. There is a through hole having a shape.

【0007】[0007]

【発明の作用・効果】上記のように構成した請求項1に
係る発明においては、配線基板の表面側に接着固定され
たリード間は、配線基板の周縁部から内側へ向け設けた
一定厚みの樹脂層によって充填されるので、樹脂層を設
けたリード上にモールド用金型の上型を配置させたとき
に、リード間の樹脂層と上型の型合わせ面との間に隙間
を生じることがない。また、下型の型合わせ面と配線基
板の裏面との間も密着している。従って、この状態で上
型と下型とを型締めし、キャビティ部にモールド樹脂を
圧入したときに、モールド樹脂がキャビティ部から外側
のリード間に飛びだすことはなく、従って、リード間の
樹脂バリを除去することもない。即ち、請求項1に係る
発明によれば、簡易な方法により樹脂モールド部からの
樹脂バリの発生を防止することが出来るので、電子部品
搭載装置を高歩留りで安価にかつ信頼性よく製造するこ
とができる。また、本発明においては、従来のようにリ
ード間に樹脂製ダムを設けないので、リードと配線基板
との加熱接着時に加わる熱によるダムの硬化収縮により
リードと配線基板間に位置ずれ等の問題が生じることも
ない。
In the invention according to claim 1 configured as described above, between the leads that are adhesively fixed to the front surface side of the wiring board, there is a fixed thickness provided from the peripheral portion of the wiring board toward the inside. Since it is filled with the resin layer, when the upper die of the molding die is placed on the lead provided with the resin layer, a gap is created between the resin layer between the leads and the die matching surface of the upper die. There is no. Also, the lower die matching surface and the back surface of the wiring board are in close contact with each other. Therefore, when the upper mold and the lower mold are clamped in this state and the mold resin is pressed into the cavity, the mold resin does not jump out from the cavity to the outer leads. Will not be removed. That is, according to the invention of claim 1, it is possible to prevent the generation of resin burr from the resin mold portion by a simple method, so that the electronic component mounting apparatus can be manufactured at high yield at low cost and with high reliability. You can Further, in the present invention, since the resin dam is not provided between the leads as in the conventional case, there is a problem such as misalignment between the leads and the wiring substrate due to curing shrinkage of the dam due to heat applied during heat bonding between the leads and the wiring substrate. Does not occur.

【0008】また、上記のように構成した請求項2に係
る発明においては、配線基板のモールド樹脂によって被
覆される部分の一部に所定形状の貫通孔を設けたことに
より、前記請求項1に記載の作用効果に加えて、貫通孔
を通してモールド樹脂が配線基板の上下面間で一体化す
るため、モールド樹脂とリード及び配線基板間の密着性
が向上し、電子部品搭載装置の信頼性が向上する。
Further, in the invention according to claim 2 configured as described above, since a through hole having a predetermined shape is provided in a part of a portion of the wiring substrate covered with the mold resin, the invention according to claim 1 is provided. In addition to the effects described above, the molding resin is integrated between the upper and lower surfaces of the wiring board through the through holes, improving the adhesion between the molding resin and the leads and wiring board, and improving the reliability of the electronic component mounting device. To do.

【0009】[0009]

【実施例】以下、本発明の一実施例を図面により説明す
る。図1及び図2は、本発明に係る半導体チップ搭載装
置の製造工程を横断面図により概略的に示したものであ
る。まず、ガラス布にビスマレイミドトリアジン樹脂を
含浸させた基材を用いた多数個取り両面銅張積層板B
に、スルーホール11を設け、さらに公知のサブトラク
ティブ法等により導体回路パターンを形成する。次に、
両面銅張積層板Bの両面の導体回路12の一部にスクリ
ーン印刷法によりソルダーレジスト層13を印刷塗布し
加熱硬化させる(図1(a)参照)。これにより、スル
ーホール11のはんだ接合部のはんだブリッジを避ける
ことが出来、また、後述する放熱板接着時の導体回路1
2との絶縁を確実にすることができる。ただし、ソルダ
ーレジスト層13の形成は、用途等に応じて省略しても
よい。その後、両面銅張積層板Bの半導体チップ搭載部
14を構成する角孔をルーター加工又はレーザー加工等
により形成し、さらに、多数個取り両面銅張積層板Bを
ルーター加工,ダイシング加工等により個別の配線基板
10に分割する(図1(a)参照)。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. 1 and 2 are schematic cross-sectional views showing a manufacturing process of a semiconductor chip mounting device according to the present invention. First, a multi-cavity double-sided copper-clad laminate B using a base material in which a glass cloth is impregnated with a bismaleimide triazine resin
A through hole 11 is provided in the above, and a conductor circuit pattern is formed by a known subtractive method or the like. next,
A solder resist layer 13 is applied by printing on a part of the conductor circuits 12 on both sides of the double-sided copper-clad laminate B by screen printing and heat-cured (see FIG. 1A). As a result, a solder bridge at the solder joint portion of the through hole 11 can be avoided, and the conductor circuit 1 at the time of bonding a heat sink, which will be described later, can be avoided.
It is possible to ensure the insulation with 2. However, the formation of the solder resist layer 13 may be omitted depending on the application and the like. After that, the square holes constituting the semiconductor chip mounting portion 14 of the double-sided copper-clad laminate B are formed by router processing, laser processing, or the like, and the multiple-sided copper-clad laminate B is individually processed by router processing, dicing, or the like. The wiring board 10 is divided (see FIG. 1A).

【0010】つぎに、配線基板10の表面側の周縁部か
ら内側のスルーホール11に至る部分にエポキシ系の接
着剤15が、スクリーン印刷,ディスペンサ等により4
0〜100μmの厚みに塗布される(図1(b)参
照)。なお、接着剤としては、ポリイミド系,トリアジ
ン系等の耐熱性,絶縁性に優れており、かつ加熱圧着時
に流動性を有するものであればよい。この配線基板10
上に、複数のリードを支持した銅合金,鉄ニッケル合金
等で形成されたリードフレーム20(ピッチ0.4m
m,幅0.18mm,厚み0.125mm)のインナー
リード21が接着固定される(図1(b)参照)。その
際、インナーリード21の内の一部が、所定のスルーホ
ール11の上部に重なるように位置合わせされる。イン
ナーリード21の接着は、プレスによる熱圧着、常温で
の加圧接着後の加熱硬化等により行われるが、この加熱
により接着剤15が軟化してインナーリード21に押さ
れてインナーリード21間に盛り上がる。そのため、図
3に示すように、インナーリード間が接着剤15によっ
て充填され、インナーリード21の上面とインナーリー
ド21間の接着剤層15の上面が略面一にされる。
Next, an epoxy adhesive 15 is applied to a portion from the peripheral portion on the front surface side of the wiring board 10 to the through hole 11 on the inside by screen printing, dispenser or the like.
It is applied to a thickness of 0 to 100 μm (see FIG. 1 (b)). The adhesive may be polyimide, triazine, or the like that has excellent heat resistance and insulation properties, and has fluidity during thermocompression bonding. This wiring board 10
A lead frame 20 (pitch 0.4 m) formed of a copper alloy, an iron-nickel alloy, or the like supporting a plurality of leads thereon.
The inner lead 21 of m, width 0.18 mm, thickness 0.125 mm) is adhesively fixed (see FIG. 1B). At that time, a part of the inner lead 21 is aligned so as to overlap the upper portion of the predetermined through hole 11. The inner leads 21 are bonded by thermocompression bonding by a press, heat curing after pressure bonding at room temperature, and the like, the adhesive 15 is softened and pressed by the inner leads 21 between the inner leads 21. Get excited. Therefore, as shown in FIG. 3, the space between the inner leads is filled with the adhesive 15, and the upper surfaces of the inner leads 21 and the upper surface of the adhesive layer 15 between the inner leads 21 are substantially flush with each other.

【0011】つぎに、配線基板10の裏面側をはんだ槽
(図示しない)の溶融はんだ面上に載置させることによ
り、溶融はんだ16がスルーホール11内に流入して上
昇し、配線基板10の表面側開口位置に達する。そし
て、表面側開口位置に達したはんだ16は、スルーホー
ル11の表面側のランド上に盛り上がってインナーリー
ド21に接続され、インナーリード21にはんだのフィ
レットが形成される(図1(c)参照)。はんだとして
は、スズー鉛,スズー銀,スズーアンチモンはんだ等を
用いることが出来るが、はんだ接合時の配線基板の熱劣
化、そして、接合後のはんだの耐熱性を考慮すると、錫
9:鉛1の配合のはんだを用いるのが好ましい。
Next, by placing the back surface side of the wiring board 10 on the molten solder surface of a solder bath (not shown), the molten solder 16 flows into the through holes 11 and rises, and Reach the front side opening position. Then, the solder 16 reaching the front surface side opening position rises on the front surface side land of the through hole 11 and is connected to the inner lead 21, and a solder fillet is formed on the inner lead 21 (see FIG. 1C). ). As the solder, tin-lead, tin-silver, tin-antimony solder, etc. can be used. However, considering the heat deterioration of the wiring board at the time of solder joining and the heat resistance of the solder after joining, tin 9: lead 1 It is preferable to use a solder of the following composition.

【0012】つぎに、配線基板10の裏面側の半導体チ
ップ搭載部14位置に、半導体チップ取り付けを兼ねた
無酸素銅製の放熱板30がエポキシ等の接着剤31によ
り接着固定される(図1(c)参照)。放熱板30とし
ては、その他アルミニウム等の熱伝導性の良い金属、セ
ラミック材料等を用いてもよい。この配線基板10の半
導体チップ搭載部14位置の放熱板30上に樹脂ペース
ト41等を用いて半導体チップ40をダイボンディング
し、さらに半導体チップ40の電極パッドと配線基板1
0の導体回路12又はインナーリード21間をワイヤボ
ンディングにより接続させる(図2(d)参照)。この
とき、半導体チップ40の電源部やグランド部等の複数
の共通電極に関しては、半導体チップ搭載部14近傍の
スルーホール14aを通して裏面の共通電極に接続し、
さらに共通電極からスルーホール11を通してインナー
リード21に一括して接続することにより、配線のリー
ドインダクタンスを低減させることが出来、さらにイン
ナーリードの本数を削減することができる。
Next, at the position of the semiconductor chip mounting portion 14 on the back surface side of the wiring board 10, a heat sink 30 made of oxygen-free copper which also serves as a semiconductor chip attachment is adhered and fixed by an adhesive 31 such as epoxy (see FIG. See c)). As the heat dissipation plate 30, a metal such as aluminum having good heat conductivity, a ceramic material, or the like may be used. The semiconductor chip 40 is die-bonded onto the heat sink 30 at the position of the semiconductor chip mounting portion 14 of the wiring board 10 using a resin paste 41 or the like, and the electrode pads of the semiconductor chip 40 and the wiring board 1
The conductor circuits 12 of 0 and the inner leads 21 are connected by wire bonding (see FIG. 2D). At this time, the plurality of common electrodes such as the power supply portion and the ground portion of the semiconductor chip 40 are connected to the common electrode on the back surface through the through holes 14a near the semiconductor chip mounting portion 14,
Further, by collectively connecting the common electrode to the inner leads 21 through the through holes 11, the lead inductance of the wiring can be reduced, and the number of inner leads can be reduced.

【0013】次に、上型51と下型52とを有し内部に
キャビティ部53を設け、キャビティ部53の周縁部5
3a,53bが配線基板10の周縁部の若干内側に来る
ように設計された樹脂モールド用金型50を用いて、図
2(d)に示すように、下型52に配線基板10をセッ
トし、上型51を重ね合わせて型締めし、キャビティ5
3内にエポキシ樹脂61を圧入して樹脂モールドを行
う。このとき、上型51の型合わせ面51aは、インナ
ーリード21に密着すると共にインナーリード間におい
ても、充填された接着剤層15に略密着した状態になっ
ており、下型52の型合わせ面52aも、配線基板10
の裏面に密着した状態になっている。従って、圧入され
たモールド樹脂61は、インナーリード21間からキャ
ビティ部53の外側に飛びだすことがなく、アウターリ
ード22間に樹脂バリが形成されることがない。この樹
脂モールドされた半導体装置を図4に示す。その結果、
モールド工程終了後に、樹脂バリを除去する必要がな
く、直ちにリードフレーム20の各アウターリードを切
断し、フォーミングすることにより最終的な半導体装置
に形成される(図2(e)参照)。
Next, the upper die 51 and the lower die 52 are provided, and the cavity portion 53 is provided inside, and the peripheral edge portion 5 of the cavity portion 53 is provided.
As shown in FIG. 2D, the wiring board 10 is set on the lower mold 52 by using the resin molding die 50 designed so that 3a and 53b are slightly inside the peripheral portion of the wiring board 10. , The upper mold 51 is overlaid and clamped, and the cavity 5
Epoxy resin 61 is press-fitted in 3 to perform resin molding. At this time, the die-matching surface 51a of the upper die 51 is in close contact with the inner leads 21, and is also in close contact with the filled adhesive layer 15 even between the inner leads 21. 52a is also the wiring board 10
It is in close contact with the back of the. Therefore, the press-fitted mold resin 61 does not fly out from between the inner leads 21 to the outside of the cavity 53, and a resin burr is not formed between the outer leads 22. This resin-molded semiconductor device is shown in FIG. as a result,
It is not necessary to remove the resin burr after the molding process, and each outer lead of the lead frame 20 is immediately cut and formed into a final semiconductor device (see FIG. 2E).

【0014】以上に説明したように、上記第1実施例に
おいては、配線基板の周縁部から内側へ向けて設けた一
定厚みの接着剤層にインナーリードを接着固定させるこ
とにより、同時にインナーリード間に接着剤層を充填さ
せるという簡易な方法によりアウターリード間への樹脂
バリの発生を防止することが出来るので、電子部品搭載
装置を高歩留りで安価にかつ信頼性よく製造することが
できる。また、上記第1実施例においては、従来のよう
にリード間に樹脂製ダムを設けていないので、インナー
リードと配線基板とのはんだ接合形成時に加わる熱によ
るダムの硬化収縮によりインナーリードと配線基板間に
位置ずれ等の問題が生じることもない。
As described above, in the first embodiment described above, the inner leads are bonded and fixed to the adhesive layer having a constant thickness provided from the peripheral portion of the wiring board toward the inner side. Since it is possible to prevent the occurrence of resin burr between the outer leads by a simple method of filling the adhesive layer with the adhesive layer, it is possible to manufacture the electronic component mounting device at a high yield at low cost and with high reliability. Further, in the first embodiment, since the resin dam is not provided between the leads as in the conventional case, the dam is cured and shrunk by the heat applied when the solder joint is formed between the inner lead and the wiring board, so that the inner lead and the wiring board are contracted. There is no problem such as misalignment.

【0015】なお、上記第1実施例においては、配線基
板の周縁部から内側のスルーホールに至る部分に一定厚
みの接着剤層を設けているが、変形例として、配線基板
のインナーリード配置位置の間に印刷法等により略イン
ナーリードの厚みの樹脂層を形成し、この樹脂層間の配
線基板上にインナーリードを配置させて、はんだ等によ
り配線基板に接着させるようにしてもよい。これによっ
ても上記実施例と同様の効果が得られる。
In the first embodiment, the adhesive layer having a constant thickness is provided from the peripheral portion of the wiring board to the inner through hole. However, as a modification, the inner lead arrangement position of the wiring board is arranged. It is also possible to form a resin layer having a thickness of approximately the inner lead between them by a printing method or the like, dispose the inner lead on the wiring board between the resin layers, and adhere to the wiring board by soldering or the like. With this, the same effect as that of the above embodiment can be obtained.

【0016】次に、本発明の第2実施例について図5,
図6により説明する。本実施例においては、配線基板1
0の周縁部近傍の樹脂モールドされる部分(図6(a)
の点線の右側部分)のインナーリード21間に円筒形の
貫通孔17を設けたものである。そして、配線基板は、
半導体チップ搭載用の凹部を中央に設けており放熱板は
備えていない。その他の構成は上記第1実施例と同様で
あり、説明を省略する。上記のように第2実施例を構成
したことにより、樹脂モールドを行ったときに、モール
ド樹脂61が貫通孔17を通して配線基板10の上下面
間で一体化するため、モールド樹脂61とインナーリー
ド21及び配線基板10間の密着性が向上し、電子部品
搭載装置の信頼性が向上する。なお、貫通孔の形状につ
いては、図6(b)に示すように、円筒形に限らずスリ
ット形状であってもよく、またはインナーリード21の
配線基板10との接着部分も含めて設けてもよい。ま
た、貫通孔の配設位置に関しても、配線基板の周縁部近
傍に限らず、配線基板の形状等に応じて適宜変更するこ
とができる。
Next, a second embodiment of the present invention will be described with reference to FIG.
This will be described with reference to FIG. In this embodiment, the wiring board 1
No. 0, which is to be resin-molded near the peripheral edge (FIG. 6A)
A cylindrical through hole 17 is provided between the inner leads 21 (on the right side of the dotted line). And the wiring board is
A recess for mounting a semiconductor chip is provided in the center and no heat sink is provided. The other structure is the same as that of the first embodiment, and the description thereof is omitted. By configuring the second embodiment as described above, when the resin molding is performed, the molding resin 61 is integrated between the upper and lower surfaces of the wiring board 10 through the through holes 17, so that the molding resin 61 and the inner leads 21 are integrated. Also, the adhesion between the wiring boards 10 is improved, and the reliability of the electronic component mounting device is improved. The shape of the through hole is not limited to a cylindrical shape, as shown in FIG. 6B, and may be a slit shape, or may be provided including a portion where the inner lead 21 is bonded to the wiring board 10. Good. Further, the position of the through hole is not limited to the vicinity of the peripheral portion of the wiring board, and can be changed appropriately according to the shape of the wiring board.

【0017】なお、上記実施例においては、配線基板と
してビスマレイミドトリアジン樹脂等の樹脂を含浸させ
たガラス布基材の両面銅張配線基板を用いているが、そ
の他セラミック積層板等を用いてもよい。また、配線基
板の構造についても、上記各実施例に記載したものに限
らず、種々の構造の配線基板を用いることができる。さ
らに、上記実施例においては、配線基板に半導体チップ
を組付けした半導体チップ搭載装置について説明してい
るが、その他の電子部品を組付けるようにしてもよい。
Although a double-sided copper-clad wiring board of a glass cloth substrate impregnated with a resin such as a bismaleimide triazine resin is used as the wiring board in the above-mentioned embodiment, a ceramic laminated board or the like may be used. Good. Further, the structure of the wiring board is not limited to the one described in each of the above embodiments, and wiring boards having various structures can be used. Further, although the semiconductor chip mounting device in which the semiconductor chip is mounted on the wiring board is described in the above embodiment, other electronic components may be mounted.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1実施例に係る半導体チップ搭載装
置の製造工程の一部を概略的に示す断面図である。
FIG. 1 is a cross sectional view schematically showing a part of a manufacturing process of a semiconductor chip mounting device according to a first embodiment of the present invention.

【図2】同半導体チップ搭載装置の製造工程の一部を概
略的に示す断面図である。
FIG. 2 is a cross sectional view schematically showing a part of the manufacturing process of the semiconductor chip mounting device.

【図3】図1のIIIーIII線方向の断面図である。3 is a sectional view taken along the line III-III of FIG.

【図4】同半導体チップ搭載装置の樹脂モールド後の状
態を示す斜視図である。
FIG. 4 is a perspective view showing a state after resin molding of the semiconductor chip mounting apparatus.

【図5】第2実施例に係る半導体チップ搭載装置の断面
図である。
FIG. 5 is a sectional view of a semiconductor chip mounting device according to a second embodiment.

【図6】同半導体チップ搭載装置における配線基板とイ
ンナーリードとの接着部分を示す部分平面図である。
FIG. 6 is a partial plan view showing a bonded portion between a wiring board and an inner lead in the same semiconductor chip mounting apparatus.

【符号の説明】[Explanation of symbols]

10;配線基板、11;スルーホール、12;導体回
路、13;ソルダーレジスト層、14;半導体チップ搭
載部、15;接着剤層、16;はんだ、17;貫通孔、
20;リードフレーム、21;インナーリード、22;
アウターリード、30;放熱板、31;接着剤、40;
半導体チップ、41;接着剤、50;樹脂モールド用金
型、51;上型、52;下型、53;キャビティ部、6
1;モールド樹脂。
10: Wiring board, 11; Through hole, 12; Conductor circuit, 13; Solder resist layer, 14; Semiconductor chip mounting part, 15; Adhesive layer, 16; Solder, 17; Through hole,
20; lead frame, 21; inner lead, 22;
Outer lead, 30; Heat sink, 31; Adhesive, 40;
Semiconductor chip, 41; Adhesive, 50; Resin mold, 51; Upper mold, 52; Lower mold, 53; Cavity part, 6
1; Mold resin.

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 // B29L 31:34 ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification code Office reference number FI technical display area // B29L 31:34

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 電子部品搭載部を有する配線基板の表面
側周縁部から内側へ向けた所定の範囲に所定厚みの樹脂
層を設ける樹脂層形成工程と、 前記配線基板の表面側にリードフレームの複数のリード
を接着固定させるリード接着工程と、 前記リードの接着固定された配線基板の電子部品搭載部
に電子部品を組み付ける電子部品組付け工程と、 モールド用金型の上型及び下型に設けたキャビティ部の
周縁位置を前記配線基板の周縁部の内側近傍に配置させ
て同上型及び下型を型締めした後、同キャビティ部にモ
ールド樹脂を圧入させる樹脂モールド工程とを設けたこ
とを特徴とする電子部品搭載装置の製造方法。
1. A resin layer forming step of providing a resin layer having a predetermined thickness in a predetermined range from a peripheral portion on the front surface side of a wiring board having an electronic component mounting portion toward the inside, and a lead frame on the front surface side of the wiring board. A lead bonding process for bonding and fixing a plurality of leads, an electronic component mounting process for mounting electronic components on the electronic component mounting portion of the wiring substrate to which the leads are bonded and fixed, and an upper mold and a lower mold for the molding die. And a resin molding step of placing a mold resin into the cavity after the mold is clamped in the cavity by disposing the periphery of the cavity near the inside of the periphery of the wiring board. And a method of manufacturing an electronic component mounting device.
【請求項2】 前記請求項1に記載の電子部品搭載装置
の製造方法において、 前記配線基板のモールド樹脂によって被覆される部分の
一部に所定形状の貫通孔を設けたことを特徴とする電子
部品搭載装置の製造方法。
2. The method of manufacturing an electronic component mounting apparatus according to claim 1, wherein a through hole having a predetermined shape is provided in a part of a portion of the wiring board covered with the mold resin. Manufacturing method of component mounting device.
JP5172705A 1993-06-17 1993-06-17 Manufacture of semiconductor packaging device Pending JPH077033A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5172705A JPH077033A (en) 1993-06-17 1993-06-17 Manufacture of semiconductor packaging device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5172705A JPH077033A (en) 1993-06-17 1993-06-17 Manufacture of semiconductor packaging device

Publications (1)

Publication Number Publication Date
JPH077033A true JPH077033A (en) 1995-01-10

Family

ID=15946820

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5172705A Pending JPH077033A (en) 1993-06-17 1993-06-17 Manufacture of semiconductor packaging device

Country Status (1)

Country Link
JP (1) JPH077033A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5728983A (en) * 1995-12-27 1998-03-17 Asmo Co., Ltd. Elongated tube-like pressure sensitive cable switch
US6107580A (en) * 1998-02-09 2000-08-22 Shinmei Rubber Industries Co., Ltd. Omnidirectional response cable switch
WO2014034411A1 (en) 2012-08-27 2014-03-06 三菱電機株式会社 Electric power semiconductor device
US11296069B2 (en) 2015-03-27 2022-04-05 Semiconductor Components Industries, Llc Substrate interposer on a leaderframe
JP7058813B1 (en) * 2021-08-25 2022-04-22 三菱電機株式会社 Semiconductor device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5728983A (en) * 1995-12-27 1998-03-17 Asmo Co., Ltd. Elongated tube-like pressure sensitive cable switch
US6107580A (en) * 1998-02-09 2000-08-22 Shinmei Rubber Industries Co., Ltd. Omnidirectional response cable switch
WO2014034411A1 (en) 2012-08-27 2014-03-06 三菱電機株式会社 Electric power semiconductor device
US9433075B2 (en) 2012-08-27 2016-08-30 Mitsubishi Electric Corporation Electric power semiconductor device
US11296069B2 (en) 2015-03-27 2022-04-05 Semiconductor Components Industries, Llc Substrate interposer on a leaderframe
JP7058813B1 (en) * 2021-08-25 2022-04-22 三菱電機株式会社 Semiconductor device
WO2023026381A1 (en) * 2021-08-25 2023-03-02 三菱電機株式会社 Semiconductor device

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