JPH0629557A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To make the connection with an upper electrode through wire bonding possible by forming recessed parts on the surface of a semiconductor element assembly to introduce an impurity, by increasing the effective area of PN junction to reduce a forward voltage loss, and by flattening an electrode metal layer formed on an irregular surface through cutting projecting parts. CONSTITUTION:An epitaxial wafer having N-layer 2 formed on N<+>-silicon substrate 1 by epitaxial growth is used and square recessed parts 3 are made from the surface of the N-layer 2. Then, P<+>-region 4 is formed by impurity diffusion from the surface. After that, an anode electrode metal layer 6 is formed so as to come in contact with the P-region 4 in the opening of an oxide film 5 and a cathode electrode metal layer 7 is attached to the rear face of the N-substrate 1. Then, the electrode metal layer 6 is cut from the surface to the bottoms of the recessed parts 3 so that a flat face 8 is obtained. Thus, it is easily possible to connect an Al conductor 9 with the flat part 8 by ultrasonic wire bonding.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device having a rectifying function using a pn junction or a Schottky barrier.

[0002]

2. Description of the Related Art In recent years, in the switching power supply market, a low loss power source has been in high demand, and a low loss diode is also strongly required for a secondary side rectifying element which is a large loss source of the power source. As a general diode structure, PN
Junction diodes and Schottky barrier diodes are known. The PN junction diode is easy to have high reverse breakdown voltage, but has a long reverse recovery time. On the other hand, the Schottky barrier diode has a short reverse recovery time and a lower forward rising voltage than the pn junction diode, but has a drawback that the forward voltage becomes higher and the forward voltage loss increases as the current density increases, Low reverse breakdown voltage. Thus, these two types of diodes have advantages and disadvantages. Therefore, for example, Japanese Patent Publication No. 59-3518
As seen in Japanese Patent Publication No. 3, a hybrid structure of a PN junction diode and a Schottky barrier diode is considered. In the semiconductor device having this hybrid structure, the Schottky barrier portion is dominant in the low current region during forward bias, but the PN junction is dominant in the high current region, and the forward voltage loss is small.

[0003]

Further, as a method of reducing the forward voltage loss, it is known to increase the effective junction area by forming irregularities on the PN junction surface. However, in order to provide unevenness on the PN junction surface, it is necessary to form unevenness on the surface of the semiconductor substrate, and unevenness also occurs on the surface of the electrode metal layer deposited on the semiconductor substrate surface. Since it is impossible to use wiring by wire bonding, the assembly method is restricted.

The object of the present invention is to solve such a problem and to make the PN junction uneven so that the forward current loss is small.
Another object of the present invention is to provide a method for manufacturing a semiconductor device in which wire bonding can be applied to electrode connection.

[0005]

In order to achieve the above object, a method of manufacturing a semiconductor device according to the present invention comprises forming a recess on the surface of a semiconductor layer of the first conductivity type and then introducing impurities from the surface. Then, the surface layer is made to have the second conductivity type, and then the electrode metal layer is deposited on the surface of the layer of the second conductivity type, and the electrode metal layer is processed to make the surface flat. Alternatively, after forming a recess on the surface of the semiconductor layer of the first conductivity type, impurities are introduced from the surface to make the surface layer a second conductivity type, and then the surface of the protrusion between the recesses is made to have the first conductivity type. After removing until the layer is exposed, a layer of the exposed first conductivity type and a Schottky barrier are formed, and an electrode metal layer in ohmic contact with the layer of the second conductivity type is deposited on the inner surface of the recess,
The electrode metal layer is processed to have a flat surface. In either case, it is effective to bond the conductor wire to the flattened surface of the electrode metal layer.

[0006]

The PN junction is formed along the inner wall of the recess by forming the recess on the surface of the first conductivity type and then forming the second conductivity type surface layer by introducing impurities. The effective area is increased and the forward power loss is reduced. On the other hand, by flattening the surface having irregularities associated with the electrode metal layer deposited thereon by processing, the conductor wires can be easily bonded by wire bonding.

[0007]

1 (a) and 1 (b) show a manufacturing process of a semiconductor device consisting only of a PN junction diode of an embodiment of the present invention, in which an N layer 2 formed by epitaxial growth on an N ⁺ silicon substrate 1 Using the epitaxial wafer having, the rectangular recess 3 is dug from the surface of the N layer 2. Figure 2
FIG. 6 is a plan view showing the arrangement of concave portions 3. Next, P ⁺ region 4 is formed by impurity diffusion from the surface. Then, the anode electrode metal layer 6 is formed by vapor deposition of Al, for example, so as to contact the P region 4 at the opening of the oxide film 5, and the cathode electrode metal layer 7 is deposited on the back surface of the N ⁺ substrate 1. [Fig. 1
(a)]. Next, the electrode metal layer 6 is ground from the surface to the bottom of the recess 3 to obtain a flat surface 8. It is easy to connect the Al conducting wire 9 to the flat surface 8 by ultrasonic wire bonding [FIG. 1 (b)].

FIGS. 3 (a), 3 (b) and 3 (c) show a manufacturing process of a semiconductor device having a hybrid structure of a PN junction diode and a Schottky barrier diode according to another embodiment of the present invention. The common parts are given the same reference numerals. As in the case of FIG. 1, a rectangular recess 3 having a matrix arrangement similar to that of FIG. 2 is dug from the surface of an epitaxial wafer composed of an N ⁺ substrate 1 and an N layer 2, and P ⁺ is formed by impurity diffusion using the oxide film 51 as a mask.
Region 4 is formed [FIG. 3 (a)]. Then, scraping P ⁺ region 4 so as to leave only the P ⁺ region 4 in contact with the inner surface of the recess 3 in contact with the surface of the projecting surface 31 between the recesses 3, monkey expose the N layer 2. Next, the barrier metal layer 10 using, for example, Mo is brought into contact with the P ⁺ region 4 on the inner surface of the recess 3 and the N layer 2 on the protruding surface 31 between the recesses at the opening of the oxide film 5. This metal layer 10 is P
⁺ Region 4 makes ohmic contact [Fig. 3 (b)]. After that, as in the case of FIG. 1, the metal layer 10 is shaved from the surface to obtain a flat surface 8 and the Al conducting wire 9 can be wire-bonded [FIG. 3 (c)].

[0009]

According to the present invention, a concave portion is formed on the surface of a semiconductor element body to introduce impurities to increase the effective area of a PN junction to reduce forward voltage loss. By making the layer flat by scraping the projecting portion, connection to the upper electrode by wire bonding is possible, and a semiconductor device that is easy to assemble can be used as a PN junction diode and a Schottky barrier diode even when it is made of a PN junction diode. It was possible to obtain even in the case of the hybrid structure of.

[Brief description of drawings]

FIG. 1 shows a manufacturing process of a semiconductor device according to an embodiment of the present invention.
Sectional views shown in order of (a) and (b)

FIG. 2 is a plan view of the semiconductor device of FIG. 1 during a manufacturing process.

FIG. 3 shows a manufacturing process of a semiconductor device according to another embodiment of the present invention.
Sectional views shown in order of (a), (b), and (c)

[Explanation of symbols]

DESCRIPTION ^OF SYMBOLS 1 N ⁺ substrate 2 N layer 3 concave portion 31 protruding surface 4 P ⁺ region 6 anode electrode metal layer 7 cathode electrode metal layer 8 flat surface 9 Al conductor wire 10 barrier metal layer

Claims (3)

[Claims] 1. A recess is formed on the surface of a semiconductor layer of the first conductivity type, impurities are introduced from the surface to make the surface layer a second conductivity type, and an electrode metal is formed on the surface of the layer of the second conductivity type. A method of manufacturing a semiconductor device, comprising depositing a layer and processing the electrode metal layer to make the surface flat. 2. A recess is formed on the surface of a semiconductor layer of the first conductivity type, impurities are introduced from the surface to make the surface layer a second conductivity type, and then the surface of the protrusion between the recesses is made to be the first surface. After removing the conductivity type layer until it is exposed, a Schottky barrier is formed with the exposed first conductivity type layer, and an electrode metal layer that makes ohmic contact with the second conductivity type layer is deposited on the inner surface of the recess. And processing the electrode metal layer to make the surface flat. 3. The method of manufacturing a semiconductor device according to claim 1, wherein a conductive wire is bonded to the flattened surface of the electrode metal layer.