JP3067034B2 - Schottky barrier semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a Schottky barrier semiconductor device realizing high reverse withstand voltage and high speed.

[0002]

2. Description of the Related Art In recent years, as switching power supplies have become higher in frequency, Schottky barrier diodes have been developed as rectifying elements from the viewpoint of high-speed response and low loss (low forward voltage).
Widely applied.

However, in a Schottky barrier diode, when a reverse voltage is applied, the reverse withstand voltage at the junction between the semiconductor layer and the Schottky barrier electrode is lower than the reverse withstand voltage at the center, that is, an electric field is applied to the peripheral portion. Is concentrated. In the case of a semiconductor substrate made of a Group 3-5 compound such as GaAs, it is difficult to achieve a reverse high breakdown voltage due to surface instability and the like.

[0004] Therefore, in the prior art, as shown in FIG. 5, n ⁺
N ⁻ type epitaxial layer 2 on the upper surface of semiconductor substrate 1 of type
To form an electrode 3 on the lower surface, a Schottky barrier electrode 4 at the center of the main surface of the epitaxial layer 2, and a nitride film 5 as a protective film. 4 of that attempt to reverse breakdown voltage improved by forming the field plate 6 in succession around, or as shown in FIG. 6, the guard ring region 7 consisting of the P ⁺ layer in the lower portion of the periphery of the Schottky barrier electrode 4 To form a PN junction diode connected in anti-parallel with the Schottky barrier diode,
There have been proposals for improving the reverse withstand voltage in the peripheral portion.

[0005]

However, the structure shown in FIG. 5 increases the capacitance due to the field plate 6 to reduce the response speed, and the structure shown in FIG. Schottky barrier electrode 4
And ohmic contact (a Schottky barrier is not formed) between them, so that when the forward current increases, there is a problem that the response speed becomes slow due to the injection of minority carriers from the region 7.

It is an object of the present invention to provide a Schottky barrier which satisfies both an improved withstand voltage and a high speed by making the PN junction diode in FIG. It is to provide a semiconductor device.

[0007]

SUMMARY OF THE INVENTION To this end, the present invention provides a semiconductor layer of a first conductivity type, a guard ring region of a second conductivity type formed in a ring shape on the upper surface of the semiconductor layer, A Schottky barrier electrode deposited on the upper surface of the ring region and the upper surface inside the guard ring region so that a Schottky barrier is formed between the semiconductor layer and the Schottky barrier electrode;
In the Schottky barrier semiconductor device comprising the ohmic electrode formed on the opposite side of the semiconductor layer, the Schottky barrier between the upper Symbol guard ring region and the Schottky barrier electrode, the impurity concentration of the guard ring region is formed And the guard ring
Conduction between the upper surface of the region and the Schottky barrier electrode
It is configured with a conductive oxide film interposed.

[0008]

According to the present invention, another Schottky barrier diode and a high-resistance diode are provided between the guard ring region and the Schottky barrier electrode in the opposite direction to the PN junction diode formed between the guard ring region and the semiconductor layer . A series circuit is formed. As a result, the PN junction diode contributes to the improvement of the reverse breakdown voltage, and the Schottky barrier diode and
The high resistance blocks the current flowing through the PN junction to almost zero and improves the response speed.

[0009]

Hereinafter, embodiments of the present invention will be described .
Before that, there are reference examples that will be helpful in understanding the present invention.
Will be described. FIG. 1 is a cross-sectional view of a Schottky barrier diode of the reference example , and FIG. 4 is a view illustrating a manufacturing process of the Schottky barrier diode. Here, first, G
thickness of 300 μm made of aAs, impurity concentration of about 1.0 × 1
An n ⁻ -type epitaxial layer 22 having an impurity concentration of about 1.0 × 10 ¹⁵ cm ^{−3 is} grown on the n ⁺ -type semiconductor substrate 21 of 0 ¹⁸ cm ⁻³ to a thickness of 5 to 10 μm (see FIG. 4). A). Next, CVD is performed on the upper surface of the epitaxial layer 22.
An oxide film 23 made of SiO _{2 having} a thickness of about 5000 Å is formed in a furnace, and a window 24 is partially formed by photolithography (FIG. 4B). Then, Zn is diffused from the window 24 to a surface concentration of 1.0 × 10 ¹⁶ cm ⁻³ or less to form a p ⁻ -type ring-shaped guard ring region 25 (C in FIG. 4). At this time, in order to control the surface concentration to be thin, after forming the window 24, an SiO ₂ film of about 500 Å may be formed and diffusion may be performed through the film. Alternatively, annealing may be performed by implanting Zn at a low concentration by ion implantation.
Next, a metal such as an Al metal or a Ti / Al alloy is deposited and unnecessary portions are removed by photolithography to form a Schottky barrier electrode 26 (D in FIG. 4). Then, an ohmic electrode 27 is deposited on the lower surface of the substrate 21 with a metal such as Au-Ge, Ni, or Au (E in FIG. 4). Thereafter, heat treatment is performed in N ₂ at about 450 ° C. for about 1 minute.

The Schottky created as described above
Barrier diode, a Schottky barrier electrode 26 → the epitaxial layer 22 → the semiconductor substrate 21 → original Schottky barrier diode D1 path forward of the ohmic electrode 27 is formed, also a Schottky barrier electrode 26
→ A reverse Schottky barrier diode D2 is formed in the path of the guard ring region 25, and a forward diode D3 is formed in the path of the guard ring region 25 → epitaxial layer 22, as shown in FIG. Equivalent circuit.

As a result, in the peripheral portion, a high reverse breakdown voltage can be realized by the diode D3 in the forward direction and the reverse direction of the Schottky barrier diode D1, and the diode D3 can be realized in the forward direction by the presence of the Schottky barrier diode D2. Does not flow, that is, the injection of minority carriers from the guard ring region 25 toward the epitaxial layer 22 is prevented, and the response speed is increased.

FIG. 3 shows a Schottky according to one embodiment of the present invention .
FIG. 3 is a diagram illustrating a barrier diode . Here, area 2
Between 5 and Schottky barrier electrode 26, it is interposed a high resistance of the conductive oxide film 28. This conductive oxide film 2
As for 8, ZnOx, SnOx and the like are preferable. this
According to the embodiment , the high resistance is equivalent to the diodes D2, D3 of FIG.
Is inserted in series in the path, the current flowing through the path becomes almost zero, and the response is greatly improved.

As described above, according to the present invention, another Schottky barrier and a high resistance in the opposite direction are formed between a PN junction diode and a Schottky barrier electrode formed to obtain a high breakdown voltage. than was so that, high-speed response not only high resistance to <br/> pressure also has the advantage that it becomes possible to greatly improve.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a Schottky barrier diode as a reference example for understanding the present invention.

Figure 2 is an equivalent circuit diagram of a Schottky barrier diode of FIG.

FIG. 3 is a cross-sectional view of a Schottky barrier diode according to one embodiment of the present invention .

4 is an explanatory view of a manufacturing method of the Schottky barrier diode shown in FIG.

FIG. 5 is a cross-sectional view of a conventional Schottky barrier diode.

FIG. 6 is a cross-sectional view of another conventional Schottky barrier diode.

[Explanation of symbols]

21: GaAs semiconductor substrate, 22: epitaxial layer, 23: oxide film, 24: window, 25: guard ring region, 26: Schottky barrier electrode, 27: ohmic electrode, 28: conductive oxide film.

Continuation of front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 29/872 H01L 29/861

Claims (1)

(57) [Claims] 1. A semiconductor layer of a first conductivity type, a guard ring region of a second conductivity type formed in a ring shape on an upper surface of the semiconductor layer, an upper surface of the guard ring region and an inner side of the guard ring region. A Schottky barrier electrode, which is formed on the upper surface of the semiconductor layer and forms a Schottky barrier between the semiconductor layer and an ohmic electrode formed on the opposite side of the semiconductor layer, and sets the concentration of the Schottky barrier is formed between the upper Symbol guard ring region and the Schottky barrier electrode, the impurity concentration of the guard ring region, the gar
Between the upper surface of the dring region and the Schottky barrier electrode.
A Schottky barrier semiconductor device having a conductive oxide film interposed therebetween .