JP2012248736A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device that has a Schottky barrier diode (SBD) composed of a SiC semiconductor and has high yield.SOLUTION: A semiconductor device comprises: a package in which first and second die pads are arranged spaced apart from each other; a Schottky barrier diode that is mounted on the first die pad, has a semiconductor layer composed of silicon carbide, and in which a Schottky junction and a pn junction are parallelly provided; and a pn junction diode that is connected in parallel to the Schottky barrier diode, is mounted on the second die pad, and has a semiconductor layer composed of silicon. In the Schottky barrier diode, a high-concentration impurity region constituting the pn junction and a Schottky electrode constituting the Schottky junction are directly contacted to each other.

Description

  The present invention relates to a semiconductor device having a Schottky barrier diode.

  A Schottky barrier diode (SBD) is easy to lower the forward voltage and has a small recovery current during switching. However, the reverse breakdown voltage of SBD is low and has a trade-off characteristic that the forward voltage increases as the reverse breakdown voltage is increased. On the other hand, the pn junction diode has a higher reverse breakdown voltage than the SBD, but has a high forward voltage and a large recovery current during switching.

  As a diode for improving these problems, there is a fast recovery diode (FRD). In FRD, a recombination center of bipolar current is formed at a pn junction, and a recovery current at the time of switching is suppressed. When a large number of recombination centers are injected, the recovery current is suppressed, but the leakage current increases when the reverse voltage is applied, and the forward voltage increases.

  In addition, a diode having an MPS (Merged PiN Schottoky) structure in which a pn junction region is added to the SBD and a Schottky junction and a pn junction are provided is an element having improved forward characteristics in the SBD. Since the SBD is a monopolar conductive element, the forward characteristics are linear, and the breakdown resistance against the forward surge current (forward surge resistance) is small. On the other hand, the pn junction diode formed in the pn junction region is a bipolar conduction element, and since the forward current increases nonlinearly and rapidly with increasing voltage, the forward surge resistance is higher than that of SBD. That is, in a diode having an MPS structure, the forward surge resistance is improved by providing a Schottky junction and a pn junction (see, for example, Patent Document 1).

  Not only the semiconductor device made of silicon (Si) but also the semiconductor device made of silicon carbide (SiC) has the same characteristics as described above. SiC has a band gap of about 3 times larger than Si and a dielectric breakdown strength of about 10 times larger. For this reason, compared with a semiconductor device made of Si, in a semiconductor device made of SiC, the thickness of the withstand voltage layer can be significantly reduced, and a high impurity concentration can be achieved. As a result, a high breakdown voltage, low resistance element can be formed.

JP 53-53267 A

  In the SBD of the SiC semiconductor, the forward voltage and the reverse breakdown voltage equal to or higher than those of the Si semiconductor FRD can be obtained, and the recovery current can be greatly reduced. However, the SBD of the SiC semiconductor has an element area of about 1/10 when the forward current is the same as that of the FR of the Si semiconductor. For this reason, the rated current density of the SBD of the SiC semiconductor is about 10 times that of the FR of the Si semiconductor, and the forward surge resistance that requires a larger current drive is as low as about 10 times the rated current.

  It is effective to adopt the MPS structure as a method for increasing the forward surge withstand capability for the SBD of the SiC semiconductor. However, in the MPS structure, it is necessary to reduce the contact resistance between the high concentration impurity region forming the pn junction and the metal electrode. This is because when the contact resistance is not sufficiently small, the voltage applied to the pn junction decreases, and a large bipolar current hardly flows when the pn junction diode performs a bipolar operation. Therefore, a contact electrode is formed between the high concentration impurity region and the metal electrode.

  However, the cleanliness of the Schottky junction surface is reduced by forming the contact electrode on the region where the Schottky junction is to be formed and further removing the contact electrode. As a result, there is a problem that the yield of the semiconductor device having the SBD of SiC semiconductor is lowered.

  In view of the above problems, an object of the present invention is to provide a semiconductor device having an SBD made of a SiC semiconductor and having a high yield.

  According to one aspect of the present invention, it comprises (a) a package in which a first die pad and a second die pad are spaced apart from each other, and (b) a silicon carbide mounted on the first die pad. A Schottky barrier diode having a semiconductor layer and provided with a Schottky junction and a pn junction; and (c) a semiconductor layer made of silicon mounted in parallel with the Schottky barrier diode and mounted on the second die pad. There is provided a semiconductor device including a pn junction diode having a high concentration impurity region forming a pn junction and a Schottky electrode forming a Schottky junction in the Schottky barrier diode.

  According to the present invention, a semiconductor device having an SBD made of a SiC semiconductor and having a high yield can be provided.

It is a mimetic diagram showing the composition of the semiconductor device concerning the embodiment of the present invention. It is typical sectional drawing which shows the structure of SBD of the semiconductor device which concerns on embodiment of this invention. FIG. 3 is a process cross-sectional view for explaining the manufacturing method of the SBD shown in FIG. 2 (No. 1). FIG. 11 is a process cross-sectional view for explaining the manufacturing method of the SBD shown in FIG. 2 (No. 2). FIG. 11 is a process cross-sectional view for explaining the manufacturing method of the SBD shown in FIG. 2 (No. 3). FIG. 11 is a process cross-sectional view for explaining the manufacturing method of the SBD shown in FIG. 2 (No. 4). FIG. 9 is a process cross-sectional view for explaining the manufacturing method of the SBD shown in FIG. 2 (No. 5). FIG. 6 is a process cross-sectional view for explaining the manufacturing method of the SBD shown in FIG. 2 (No. 6). FIG. 11 is a process cross-sectional view for explaining the manufacturing method of the SBD shown in FIG. 2 (No. 7). It is process sectional drawing for demonstrating the manufacturing method of SBD of a comparative example (the 1). It is process sectional drawing for demonstrating the manufacturing method of SBD of a comparative example (the 2). FIGS. 12A and 12B are graphs for explaining the characteristics of the SBD shown in FIG. 2. FIG. 12A shows the variation in the leakage current of the comparative example, and FIG. 12B shows the variation in the leakage current of the SBD shown in FIG. Indicates. It is a graph which shows the distribution of the leakage current of the SBD shown in the comparative example and FIG. It is a graph which shows the forward direction characteristic of various semiconductor devices. 1 is an equivalent circuit diagram of a semiconductor device according to an embodiment of the present invention. 16A is a cross-sectional view along the AA direction in FIG. 1, and FIG. 16B is a cross-sectional view along the BB direction in FIG. It is a table | surface which shows the surge tolerance of various semiconductor devices. It is a schematic diagram which shows the other structure of the semiconductor device which concerns on embodiment of this invention. 19A is a cross-sectional view along the AA direction in FIG. 18, and FIG. 19B is a cross-sectional view along the BB direction in FIG.

  Next, an embodiment of the present invention will be described with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. However, it should be noted that the drawings are schematic, and the ratio of the thickness of each layer is different from the actual one. Therefore, specific thicknesses and dimensions should be determined in consideration of the following description. Moreover, it is a matter of course that portions having different dimensional relationships and ratios are included between the drawings.

  Further, the embodiments described below exemplify apparatuses and methods for embodying the technical idea of the present invention, and the embodiments of the present invention include the material, shape, structure, arrangement, etc. of the component parts. Is not specified as follows. The embodiment of the present invention can be variously modified within the scope of the claims.

  As shown in FIG. 1, the semiconductor device 1 according to the embodiment of the present invention is mounted on a package 100 in which a first die pad 101 and a second die pad 102 are spaced apart from each other, and on the first die pad 101. Schottky barrier diode 10 having a semiconductor layer made of silicon carbide, and a pn junction diode having a semiconductor layer made of silicon and connected in parallel to Schottky barrier diode 10 and mounted on second die pad 102 20. As will be described later, in the Schottky barrier diode 10, the high-concentration impurity region constituting the pn junction and the Schottky electrode constituting the Schottky junction are in direct contact.

  First, the Schottky barrier diode 10 will be described. As shown in FIG. 2, a first conductivity type semiconductor layer 112 made of SiC is laminated on a first conductivity type high-concentration impurity substrate 111 made of SiC to form a first conductivity type semiconductor stacked body 11. ing. A plurality of second conductivity type impurity regions 12 are embedded in a part of the upper surface of the peripheral region of the semiconductor layer 112 so as to be separated from each other. In the impurity region 12, a second conductivity type high-concentration impurity region 13 is embedded in a part of the upper surface of the impurity region 12 a formed in a region near the center of the semiconductor layer 112.

  Further, the surface protective film 14 is disposed on the outer edge of the upper surface of the semiconductor layer 112, and the Schottky electrode 15 is disposed on the surface protective film 14 in contact with the semiconductor layer 112 through the opening of the surface protective film 14. The high concentration impurity region 13 and the Schottky electrode 15 are in contact with each other at the periphery of the opening of the surface protective film 14. A surface electrode 16 is disposed on the Schottky electrode 15. An element protective film 17 is disposed so as to cover the periphery of the upper surface of the surface electrode 16 and the side surfaces of the Schottky electrode 15 and the surface electrode 16 so that the central region of the surface electrode 16 is exposed. A back electrode 18 is formed on the surface of the high concentration impurity substrate 111 that faces the surface on which the semiconductor layer 112 is formed.

  The first conductivity type and the second conductivity type are opposite to each other. That is, if the first conductivity type is n-type, the second conductivity type is p-type, and if the first conductivity type is p-type, the second conductivity type is n-type. Here, it is assumed that the first conductivity type is n-type and the second conductivity type is p-type. Therefore, in the Schottky barrier diode 10, the front electrode 16 is an anode terminal and the back electrode 18 is a cathode terminal.

  In the Schottky barrier diode 10, the Schottky barrier diode is formed in a region where the semiconductor layer 112 and the Schottky electrode 15 are in contact with each other in the remaining region where the impurity region 12 is formed. A region where the Schottky barrier diode is formed is referred to as a “Schottky junction portion”. A pn junction diode is formed in a region where the impurity region 12a in which the high concentration impurity region 13 is buried and the semiconductor layer 112 are in contact with each other. A region where the pn junction diode is formed is referred to as a “pn junction portion”. Of the impurity region 12, the impurity region 12b in contact with the surface protective film 14 around the upper surface of the semiconductor layer 112 functions as a guard ring.

  In general, in a semiconductor device having an MPS structure, the forward surge withstand capability is improved as compared with a single SBD because the pn junction diode performs a bipolar operation. That is, by injecting holes from the p-type semiconductor layer into the n-type semiconductor layer, electrons in the n-type semiconductor layer have a higher concentration than the original impurity concentration. As a result, a large current flows through the semiconductor device, and the forward surge resistance is improved.

  In the Schottky barrier diode 10, the Schottky electrode 15 is directly disposed on the upper surface of the semiconductor stacked body 11 at the pn junction portion. That is, the Schottky electrode 15 is continuously formed on the upper surface of the semiconductor stacked body 11 across the pn junction portion and the Schottky junction portion. Therefore, the high concentration impurity region 13 that forms the pn junction portion and the Schottky electrode 15 that forms the Schottky junction portion are in direct contact with each other, and the contact electrode is between the high concentration impurity region 13 and the Schottky electrode 15. Not formed.

  An example of a method for manufacturing the Schottky barrier diode 10 shown in FIG. 2 will be described with reference to FIGS.

As shown in FIG. 3, an n-type semiconductor layer 112 having a concentration suitable for a desired withstand voltage is formed on an n-type high-concentration impurity substrate 111 made of SiC to constitute a semiconductor stacked body 11. For example, the high-concentration impurity substrate 111 is a SiC substrate having an impurity concentration of about 5 × 10 ^{17 to} 5 × 10 ¹⁸ cm ⁻³ , and the semiconductor layer 112 is epitaxially grown on the SiC substrate with a film thickness of 4 μm to 50 μm and an impurity concentration of 1 It is a SiC semiconductor layer of about × 10 ^{15 to} 5 × 10 ¹⁶ cm ⁻³ .

As shown in FIG. 4, for example, a p-type impurity region 12 is formed in the semiconductor layer 112 by ion implantation of a p-type impurity such as aluminum (Al). As the ion implantation conditions for forming the impurity region 12, Al ions are implanted with an acceleration energy of 500 keV and a dose of 2 × 10 ¹³ cm ⁻² , for example.

Next, as shown in FIG. 5, a high concentration impurity region 13 is formed by ion implantation or the like on the surface of the impurity region 12a at the pn junction. The ion implantation conditions of Al ions for forming the high-concentration impurity region 13 are, for example, acceleration energy of 50 keV, 100 keV, and 150 keV, and dose amounts of 5 × 10 ¹⁴ cm ⁻² , 1 × 10 ¹⁵ cm ⁻² , and 1 × 10 ^15. cm ^-2 . In order to activate the ion-implanted layer, heat treatment is performed at 1800 ° C. for about 10 minutes.

For the purpose of surface damage after activation and surface protection in the subsequent steps, as shown in FIG. 6, a surface protective film 14 is formed on the surface of the semiconductor stacked body 11, and the back surface protection is performed on the back surface of the high-concentration impurity substrate 111. A film 141 is formed. The surface protective film 14 and the back surface protective film 141 are, for example, thermal oxide films with a film thickness of 50 nm. Then, as shown in FIG. 7, after removing the back surface protective film 141, the back surface electrode 18 is formed on the back surface of the high concentration impurity substrate 111. A metal material that forms an ohmic junction with the high-concentration impurity substrate 111 can be used for the back electrode 18. For example, a Ni film having a thickness of 100 nm is formed, and annealed at 1000 ° C. for 5 minutes in a nitrogen (N ₂ ) atmosphere to form the back electrode 18.

  Thereafter, as shown in FIG. 8, the surface protective film 14 at the Schottky junction and the pn junction is removed to form an opening 140. Then, as illustrated in FIG. 9, the Schottky electrode 15 is formed so as to be in contact with the semiconductor stacked body 11 through the opening 140. For the Schottky electrode 15, a metal material that forms a Schottky barrier junction at the interface with the semiconductor layer 112 can be used. For example, a titanium (Ti) film, a nickel (Ni) film, a molybdenum (Mo) film, a platinum (Pt) film, or the like can be used for the Schottky electrode 15. The film thickness of the Schottky electrode 15 is about 100 nm.

  Further, the surface electrode 16 is formed on the Schottky electrode 15. As the surface electrode 16, for example, an Al film having a film thickness of about 5 μm can be adopted.

Next, a silicon nitride (SiN) film or the like is formed as the element protective film 17. For example, a SiN film having a thickness of about 500 nm is formed by a plasma CVD method using SiH ₄ and NH ₃ . Then, the device protection film 17 on the surface electrode 16 is removed to expose the upper surface of the surface electrode 16, and the Schottky barrier diode 10 shown in FIG. 2 is completed.

  Unlike the manufacturing method of the Schottky barrier diode 10 described above, generally, in a semiconductor device having an MPS structure, the contact resistance between the high-concentration impurity region 13 in the pn junction portion and the Schottky electrode 15 is reduced. In addition, a contact electrode is formed between the high concentration impurity region 13 and the Schottky electrode 15.

  Specifically, after the surface protective film 14 is formed on the entire top surface of the semiconductor stacked body 11 on which the high concentration impurity region 13 is formed as shown in FIG. 6, the high concentration impurity region 13 is formed as shown in FIG. An opening is formed in the surface protection film 14 above, and a contact electrode 150 is formed on the high-concentration impurity region 13 so as to fill the opening. For example, after forming a metal film such as a Ti film, an Al film, or a Ni film, the metal film is silicided to form the contact electrode 150.

  In order to reduce the resistance value of the contact electrode 150, for example, after annealing at about 1000 ° C., the surface protection film 14 on the Schottky junction is removed to form an opening 140, as shown in FIG. . Thereafter, the Schottky electrode 15 and the surface electrode 16 are formed as in FIG. As a result, the contact electrode 150 is disposed between the high concentration impurity region 13 and the Schottky electrode 15.

  On the other hand, in the Schottky barrier diode 10 shown in FIG. 2, no contact electrode is disposed between the high concentration impurity region 13 and the Schottky electrode 15. In other words, there is no step of forming a contact electrode at the Schottky junction and further removing it, so that there is no problem of lowering the Schottky barrier, for example, by leaving the material for the contact electrode at the Schottky junction. . Therefore, the cleanliness of the Schottky junction can be sufficiently increased by inorganic cleaning before the formation of the Schottky electrode 15 or the like. As a result, the manufacturing yield of the Schottky barrier diode 10 is improved.

  FIG. 12A shows an example of reverse leakage current of an MPS structure semiconductor device (hereinafter referred to as “MPS element”) made of SiC and having a contact electrode 150. FIG. 12B shows an example of the reverse leakage current of the Schottky barrier diode 10. As is clear from comparison between FIG. 12A and FIG. 12B, according to the Schottky barrier diode 10, the variation in the reverse leakage current is suppressed to be small.

FIG. 13 shows an example of the reverse leakage current distribution when the reverse voltage is 600V. In FIG. 13, the black circle is the characteristic A of the Schottky barrier diode 10, and the white circle is the characteristic B of the MPS element. For example, when 1 × 10 ⁻⁶ A is set as the upper limit of the reverse leakage current, the yield of the MPS element is about 25%, whereas the yield of the Schottky barrier diode 10 shown in FIG. 2 is about 80%. 3 times or more.

  Further, in the Schottky barrier diode 10, the pn junction portion is formed only around the Schottky junction portion, and the contact electrode 150 is not formed. On the other hand, in a general MPS structure, a pn junction portion and a Schottky junction portion are mixed, and the contact electrode 150 is formed in the pn junction portion. For this reason, the Schottky barrier diode 10 can be processed with rougher processing accuracy than a general MPS structure semiconductor device, and the manufacturing process can be simplified.

  FIG. 14 shows examples of forward characteristics of the Schottky barrier diode, the pn junction diode, the MPS element, and the semiconductor device 1 shown in FIG. In FIG. 14, a characteristic A is a Schottky barrier diode, a characteristic B is an MPS element, a characteristic C is a pn junction diode, and a characteristic D is a forward characteristic of the semiconductor device 1.

  The MPS element has a dominant current (hereinafter referred to as “SBD current”) flowing through the Schottky junction portion at a low voltage, and is referred to as “pn junction current” below at a high voltage. ) Is dominant. This is because the n-type substrate and the n-type semiconductor layer are used as a common cathode. At a low voltage, the Schottky junction is turned on, an SBD current flows, and a voltage drop due to the substrate resistance occurs. Due to this voltage drop, the voltage applied to the pn junction decreases as compared to the case where the pn junction diode operates alone. As a result, the pn junction current hardly flows and the SBD current becomes dominant. When the voltage applied to the pn junction rises and current starts to flow in the pn junction, holes are injected into the n-type semiconductor layer 112 from the p-type high concentration impurity region 13, and the resistance of the semiconductor layer 112 is reduced. Decrease. Thereby, at a high voltage, the pn junction current becomes dominant.

  On the other hand, in the Schottky barrier diode 10, the contact resistance between the Schottky electrode 15 and the high concentration impurity region 13 is high. For this reason, the voltage applied to the pn junction decreases, and the bipolar current that flows after the pn junction diode performs a bipolar operation is less likely to flow. As a result, the forward surge withstand capability decreases with the Schottky barrier diode 10 alone.

  However, the semiconductor device 1 has a structure in which a Schottky barrier diode 10 that does not form a contact electrode at a pn junction portion and a pn junction diode 20 of a silicon substrate having a sufficiently large forward surge withstand capability are connected in parallel. Therefore, in the semiconductor device 1, a forward current corresponding to each area flows through the Schottky barrier diode 10 and the pn junction diode 20 connected in parallel, and the sum thereof is the total current flowing through the semiconductor device 1. For this reason, in the semiconductor device 1, the forward surge withstand capability is improved as compared with the MPS element.

  In the Schottky barrier diode 10, the reverse breakdown voltage is improved by forming the pn junction portion. In particular, a pn junction portion is formed around the Schottky junction portion where the electric field is concentrated. At this time, if the potential of the impurity region 12a in the pn junction portion is floating, it is difficult to alleviate the electric field concentration at the outer peripheral portion, so that the high concentration impurity region 13 is electrically connected to the Schottky electrode 15.

  As the pn junction diode 20 of the semiconductor device 1, a pn junction diode having a sufficiently large forward surge resistance is used. Furthermore, the pn junction diode 20 having the optimum characteristics is selected in accordance with the characteristics of the Schottky barrier diode 10. For example, a pn junction diode 20 having forward / reverse characteristics and switching characteristics equivalent to those of the MPS element is used.

  FIG. 15 shows an equivalent circuit diagram of the semiconductor device 1 having the characteristic D shown in FIG. The pn junction diode 20 shown in FIG. 15 has a configuration in which a plurality of pn junction diode elements are connected in series in parallel with the Schottky barrier diode 10. Specifically, pn junction diode elements 201 to 203 are connected in series to form a pn junction diode 20. The pn junction diode 20 is configured by using three pn junction diode elements because, for example, the forward voltage of the Schottky barrier diode 10 having a reverse breakdown voltage of 600 V or higher is about 1.5 V or higher. This is because the forward voltage of each of the junction diode elements 201 to 203 is about 0.7V. Since the pn junction diode 20 only needs to be in a conductive state when a surge current flows, the forward voltage of the pn junction diode 20 is preferably larger than the forward voltage of the Schottky barrier diode 10. For this reason, in the pn junction diode 20, it is necessary to connect three pn junction diode elements in series so that a forward current flows at 2 V or more.

  Therefore, the number of pn junction diode elements constituting the pn junction diode 20 is selected according to the characteristics of the Schottky barrier diode 10, and the number is not limited to three. Note that the reverse breakdown voltage of each pn junction diode element is 200 V or more. Thereby, the reverse breakdown voltage of the pn junction diode 20 can be made equal to the reverse breakdown voltage of the Schottky barrier diode 10.

  Furthermore, in order to improve the reverse surge withstand capability of the semiconductor device 1, the pn junction diode 20 needs to avalanche breakdown at a voltage lower than that of the Schottky barrier diode 10. For example, when the avalanche breakdown voltage of the Schottky barrier diode 10 is 800V, the breakdown voltage design is performed so that the pn junction diode 20 breakdowns at about 700V.

  When the pn junction diode 20 is formed using a Si semiconductor, the current density of the forward surge current can be reduced by about an order of magnitude as compared with the SBD using a SiC semiconductor by increasing the chip area. . In addition, by making the pn junction diode 20 a configuration in which a plurality of pn junction diode elements are connected in series, the heat radiation area when a forward surge current flows can be increased. For this reason, the forward surge resistance can be greatly improved.

  FIG. 16A shows a cross-sectional view along the direction AA in FIG. Further, FIG. 16B shows a cross-sectional view along the BB direction of FIG. The back electrode 18 that is the cathode terminal 10 k of the Schottky barrier diode 10 is electrically connected to the first die pad 101 via the solder 31. Further, the surface electrode 16 that is the anode terminal 10 a of the Schottky barrier diode 10 and the anode terminal 103 of the semiconductor device 1 are electrically connected by a wire 41. The first die pad 101 also serves as the cathode terminal of the semiconductor device 1.

  In addition, as shown in FIGS. 16A and 16B, pn junction diode elements 201 and 202 are mounted on the second die pad 102 via an insulating sheet 50. The cathode terminal 201k of the pn junction diode element 201 and the anode terminal 202a of the pn junction diode element 202 are electrically connected by solder 321 on the insulating sheet 50. The anode terminal 201 a of the pn junction diode element 201 is connected to the anode terminal 103 of the semiconductor device 1 by a wire 421. The cathode terminal 202 k of the pn junction diode element 202 is connected to the anode terminal 203 a of the pn junction diode element 203 by a wire 422. The cathode terminal 203k of the pn junction diode element 203 is electrically connected to the second die pad 102 via the solder 322. The second die pad 102 is electrically connected to the first die pad 101 by a wire 423.

  As described above, in the semiconductor device 1, the pn junction diode elements 201 to 203 connected in series on the second die pad 102 and the Schottky barrier diode 10 are connected in parallel.

  The first die pad 101 on which the Schottky barrier diode 10 is mounted and the second die pad 102 on which the pn junction diode 20 is mounted are physically separated. Thereby, heat generated from the Schottky barrier diode 10 is suppressed from being conducted to the pn junction diode 20, and the operation of the pn junction diode 20 is stabilized.

  For example, when a pulse current of 100 A with a duty of 50% flows through the semiconductor device 1 during steady operation, the Schottky barrier diode 10 with a forward voltage of 1.5 V has an average power consumption of about 75 W. When the heat dissipation of the package 100 is 2 ° C./W, the chip temperature of the Schottky barrier diode 10 at room temperature of 25 ° C. is 175 ° C. In a state where the first die pad 101 and the second die pad 102 are in contact with each other, the first die pad 101 and the second die pad 102 have substantially the same temperature. For this reason, the chip temperature of the pn junction diode 20 rises to near 175 ° C. In the case of a Si semiconductor element, the semiconductor characteristics are lost at a high temperature of 150 ° C. or higher, causing malfunction. Therefore, the separation of the first die pad 101 and the second die pad 102 is effective for normal operation of the semiconductor device 1.

  FIG. 17 shows a comparison between the forward surge current and the reverse surge withstand capability of a semiconductor device having a reverse breakdown voltage of 600 V and a forward rated current of 10 A. In FIG. 17, the element “SiC-SBD” is an SBD made of a SiC semiconductor and corresponds to the Schottky barrier diode 10. The element “SiC-MPS” is an MPS element made of a SiC semiconductor. The element “Si-PN” is a pn junction diode made of a Si semiconductor and corresponds to the pn junction diode 20.

In FIG. 17, the maximum forward surge current is shown as a multiple of the forward rated current. The reverse surge resistance of SiC-SBD is 100 mJ / cm ² , whereas the reverse surge resistance of SiC-MPS is ² J / cm ^2, which is about 20 times that of SiC-SBD. Furthermore, the reverse surge resistance of Si-PN is 20 J / cm ^2, which is 10 times that of SiC-MPS. Since the element area of the Si semiconductor element is about 10 times larger than that of the SiC semiconductor element at the same current, the current density becomes 1/10 or less and the surge resistance is improved.

  FIG. 18 shows a semiconductor device 1 according to a modification of the embodiment of the present invention. In the example shown in FIG. 18, pn junction diode elements 201 to 203 constituting the pn junction diode 20 are mounted on die pads 102 a to 102 c obtained by dividing the second die pad 102. FIG. 19A shows a cross-sectional view along the direction AA in FIG. 18, and FIG. 19B shows a cross-sectional view along the direction BB in FIG.

  As shown in FIGS. 19A and 19B, the cathode terminal 201k of the pn junction diode element 201 is connected to the die pad 102a via the solder 331, and the cathode terminal 202k of the pn junction diode element 202 is connected to the solder 332. The cathode terminal 203k of the pn junction diode element 203 is connected to the die pad 102c via the solder 333. The anode terminal 201a of the pn junction diode element 201 is connected to the anode terminal 103 by a wire 431, the anode terminal 202a of the pn junction diode element 202 is connected to the die pad 102a by a wire 432, and the anode terminal 203a of the pn junction diode element 203 is a wire. 433 is connected to the die pad 102b. Further, the die pad 102 c and the first die pad 101 are connected by a wire 434. Thereby, the pn junction diode elements 201 to 203 connected in series and the Schottky barrier diode 10 are connected in parallel.

  In the semiconductor device 1 shown in FIG. 18, the pn junction diode elements 201 to 203 are mounted on the die pads 102a to 102c without using an insulating sheet, respectively. For this reason, the heat dissipation efficiency is high. Therefore, the semiconductor device 1 shown in FIG. 18 has high stability at high temperatures.

  As described above, in the semiconductor device 1 according to the embodiment of the present invention, the Schottky barrier diode 10 having the semiconductor layer made of SiC and the pn junction diode 20 having the semiconductor layer made of Si are connected in parallel. , Realizing the rectification function. Bipolar operation when a surge current flows through the semiconductor device 1 is performed by the pn junction diode 20. For this reason, the contact electrode in the Schottky barrier diode 10 is unnecessary. Therefore, in the manufacture of the Schottky barrier diode 10, the step of forming a contact electrode between the high concentration impurity region 13 and the Schottky electrode 15 and the step of deleting this contact electrode are not performed. As a result, the yield of the Schottky barrier diode 10 can be improved.

  Therefore, according to the semiconductor device 1, it is possible to provide a semiconductor device having the Schottky barrier diode 10 made of a SiC semiconductor and having a high yield.

  Further, by mounting the Schottky barrier diode 10 on the first die pad 101 and mounting the pn junction diode 20 on the second die pad 102, the pn junction diode 20 causes malfunction due to heat generation of the Schottky barrier diode 10. Can be prevented. That is, the operation of the semiconductor device 1 can be further stabilized by separating the first die pad 101 and the second die pad 102.

  As described above, the present invention has been described according to the embodiments. However, it should not be understood that the descriptions and drawings constituting a part of this disclosure limit the present invention. From this disclosure, various alternative embodiments, examples and operational techniques will be apparent to those skilled in the art. That is, it goes without saying that the present invention includes various embodiments not described herein. Therefore, the technical scope of the present invention is defined only by the invention specifying matters according to the scope of claims reasonable from the above description.

DESCRIPTION OF SYMBOLS 1 ... Semiconductor device 10 ... Schottky barrier diode 11 ... Semiconductor laminated body 12 ... Impurity region 13 ... High concentration impurity region 14 ... Surface protective film 15 ... Schottky electrode 16 ... Surface electrode 17 ... Element protective film 18 ... Back surface electrode 20 ... pn junction diode 50 ... insulating sheet 100 ... package 101 ... first die pad 102 ... second die pad 102a-102c ... die pad 111 ... high concentration impurity substrate 112 ... semiconductor layer 141 ... back surface protective film 150 ... contact electrode 201-203 ... pn junction diode element

Claims (7)

A package in which the first die pad and the second die pad are spaced apart from each other;
A Schottky barrier diode mounted on the first die pad and having a semiconductor layer made of silicon carbide and provided with a Schottky junction and a pn junction;
A pn junction diode having a semiconductor layer made of silicon and mounted in parallel with the Schottky barrier diode and mounted on the second die pad, and a high-concentration impurity constituting the pn junction in the Schottky barrier diode A semiconductor device, wherein a region and a Schottky electrode constituting the Schottky junction are in direct contact with each other.   The semiconductor device according to claim 1, wherein the pn junction is formed at an outer edge portion of the Schottky barrier diode.   The semiconductor device according to claim 1, wherein a forward voltage of the pn junction diode is larger than a forward voltage of the Schottky barrier diode.   4. The semiconductor device according to claim 1, wherein the pn junction diode has a structure in which a plurality of pn junction diode elements are connected in series.   The semiconductor device according to claim 4, wherein a sum of forward voltages of the plurality of pn junction diode elements is larger than a forward voltage of the Schottky barrier diode.   6. The semiconductor device according to claim 4, wherein the plurality of pn junction diode elements are respectively mounted on a plurality of die pads obtained by dividing the second die pad.   The semiconductor device according to claim 1, wherein an avalanche breakdown voltage of the pn junction diode is smaller than an avalanche breakdown voltage of the Schottky barrier diode.

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