JPH0629438A - Lead frame for semiconductor device - Google Patents

Lead frame for semiconductor device

Info

Publication number
JPH0629438A
JPH0629438A JP17952792A JP17952792A JPH0629438A JP H0629438 A JPH0629438 A JP H0629438A JP 17952792 A JP17952792 A JP 17952792A JP 17952792 A JP17952792 A JP 17952792A JP H0629438 A JPH0629438 A JP H0629438A
Authority
JP
Japan
Prior art keywords
island
lead wires
lead frame
metal oxide
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP17952792A
Other languages
Japanese (ja)
Inventor
Kenji Suetake
健司 末竹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP17952792A priority Critical patent/JPH0629438A/en
Publication of JPH0629438A publication Critical patent/JPH0629438A/en
Withdrawn legal-status Critical Current

Links

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent generation of defective short circuit of a semiconductor element with no deterioration of moisture resistance by forming a metal oxide layer for coating the whole periphery of an island on a part of at least suspension lead wires and inner lead wires except for a plated layer. CONSTITUTION:A lead frame for semiconductor device is provided with an island 2 for mounting a semiconductor element, and suspension lead wires 7 for holding the island 2. The lead frame is also provided with the same number of inner lead wires 3 as the suspension lead wires 7, which are arranged in, at least, two directions in such way as to surround the island 2, and with a plated layer 5 for bonding which is formed at the ends of the inner lead wires 3. Particularly, a metal oxide 6 is formed to coat the whole periphery of the island on a part of individual suspension lead wires 7 and the inner lead wires 3, excluding the plated layer 5. As a result, impurity ions invading from the lead frame 1 and the resin interface can be caught by the metal oxide 6, and invasion to the semiconductor element can be prevented, and further no deterioration of moisture resistance can be ensured.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体装置用リードフレ
ームに関し、特に樹脂封止型の半導体装置用リードフレ
ームに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device lead frame, and more particularly to a resin-sealed lead frame for a semiconductor device.

【0002】[0002]

【従来の技術】従来の半導体装置用リードフレーム(以
下、リードフレームと記す)は、図3に示すように、半
導体素子を搭載するアイランド2とアイランド2の周囲
を囲むようにインナーリード3が配置されている。イン
ナーリード3は、半導体装置の種類によって2方向もし
くは4方向に同数配置されている。また、インナーリー
ド3の先端には半導体素子とボンディングで接続するた
めに表面にめっき層5が施されている。
2. Description of the Related Art In a conventional lead frame for a semiconductor device (hereinafter referred to as a lead frame), as shown in FIG. 3, an inner lead 3 is arranged so as to surround an island 2 on which a semiconductor element is mounted and the periphery of the island 2. Has been done. The inner leads 3 are arranged in the same number in two directions or four directions depending on the type of the semiconductor device. A plating layer 5 is provided on the surface of the inner lead 3 at the tip thereof so as to be connected to a semiconductor element by bonding.

【0003】[0003]

【発明が解決しようとする課題】この従来のリードフレ
ームを使用した半導体装置では、不純物性イオン(Cl
- SO4 2-)等がリードフレームと樹脂の界面から侵入
し、インナーリード・ワイヤを通じて半導体素子に達
し、耐湿性が劣化してショート不良等が発生している。
現在、耐湿性向上対策としてインナーリードの引き回し
設計を複雑にしているが、まだ完全な対策が施されてい
ないという問題点がある。
In the conventional semiconductor device using the lead frame, impurity ions (Cl
- SO 4 2-) and the like from entering from the interface of the lead frame and the resin, reaches the semiconductor element through the inner lead wire, short-circuit failure or the like moisture resistance is deteriorated occurs.
At present, the inner lead routing design is complicated as a measure for improving the moisture resistance, but there is a problem that a complete measure has not been taken yet.

【0004】また、メモリ等の製品にみられる大ペレッ
ト化の傾向に対し、インナーリードは短くなり、インナ
ーリードを引き回わす余裕がないという問題点がある。
Further, in contrast to the tendency toward larger pellets found in products such as memories, the inner leads are shortened, and there is a problem that there is no room to circulate the inner leads.

【0005】本発明の目的は、耐湿性の劣化がなく半導
体素子のショート不良の発生のないリードフレームを提
供することにある。
An object of the present invention is to provide a lead frame in which moisture resistance is not deteriorated and a short circuit defect of a semiconductor element does not occur.

【0006】[0006]

【課題を解決するための手段】本発明は、半導体素子を
搭載するアイランドと、該アイランドを支持する吊りリ
ードと、前記アイランドを囲むように少くとも2方向に
同数配置されたインナーリードと該インナーリードの先
端に形成されたボンディング用のめっき層とを有する半
導体装置用リードフレームにおいて、前記めっき層を残
して少くとも前記吊りリードと前記インナーリードの一
部に全周を被覆する金属酸化物を形成したことを特徴と
する。
SUMMARY OF THE INVENTION According to the present invention, an island for mounting a semiconductor element, a suspension lead for supporting the island, inner leads arranged in at least two directions so as to surround the island, and the inner lead. In a lead frame for a semiconductor device having a plating layer for bonding formed at the tip of the lead, a metal oxide that covers the entire circumference of at least a part of the suspension lead and the inner lead while leaving the plating layer. It is characterized by being formed.

【0007】[0007]

【実施例】次に、本発明の実施例について図面を参照し
て説明する。
Embodiments of the present invention will now be described with reference to the drawings.

【0008】図1は本発明の第1の実施例の平面図及び
そのA−A′線断面図である。
FIG. 1 is a plan view of a first embodiment of the present invention and a sectional view taken along the line AA '.

【0009】第1の実施例は、図1(a),(b)に示
すように、リードフレーム1の樹脂封止される部分の表
面全面にアンチモン系金属化合物または、ビスマス系金
属化合物等の金属酸化物6を被覆している。これらの金
属酸化物6は、インナーリード3の表面をつたわって侵
入し半導体素子の耐湿性に悪影響を与えるCl- ,Br
- 等の陰イオンを捕捉し、結合する性質を有している。
In the first embodiment, as shown in FIGS. 1A and 1B, an antimony-based metal compound or a bismuth-based metal compound is formed on the entire surface of the resin-sealed portion of the lead frame 1. The metal oxide 6 is covered. These metal oxides 6, adversely affect the moisture resistance of the semiconductor device invaded transmitted to the surface of the inner lead 3 Cl -, Br
- anion such as capture, and has a property of binding.

【0010】表1に、イオン性水溶液に浸した半導体素
子に対し、金属酸化物で表面を被覆したものと被覆しな
いもののイオンの量について測定した実験結果を示す。
Table 1 shows the experimental results obtained by measuring the amount of ions of the semiconductor element dipped in the ionic aqueous solution and the surface of the element not coated with the metal oxide.

【0011】[0011]

【表1】 [Table 1]

【0012】表1に示すように、金属酸化物を被覆した
ものは無しのものに比べCl- ,Br- のイオンが少な
く、半導体素子への侵入を防いでいることが確認でき
る。
[0012] As shown in Table 1, Cl than that of without those coated with a metal oxide -, Br - ions is small, and it can be confirmed that prevents from entering the semiconductor element.

【0013】図2(a),(b)は本発明の第2の実施
例の平面図及びそのB−B′線断面図である。
2A and 2B are a plan view and a sectional view taken along line BB 'of the second embodiment of the present invention.

【0014】第2の実施例は、図2(a),(b)に示
すように、アンチモン系金属化合物やビスマス系金属化
合等の金属酸化物6の被覆する範囲を露出する表面全面
ではなく、最小限度のボンディング位置周辺に限定した
例である。
In the second embodiment, as shown in FIGS. 2 (a) and 2 (b), not the entire surface exposing the area covered by the metal oxide 6 such as antimony-based metal compound or bismuth-based metal compound is exposed. The example is limited to the vicinity of the minimum bonding position.

【0015】第2の実施例は、第1の実施例の効果の他
に安価に入手できるという効果がある。
The second embodiment has an effect that it can be obtained at a low cost in addition to the effect of the first embodiment.

【0016】[0016]

【発明の効果】以上説明したように本発明は、めっき層
を残して少くとも吊りリードとインナーリードの一部に
全周を被覆する金属酸化物を形成することにより、リー
ドフレームと樹脂の界面から侵入する不純物性イオンを
金属酸化物が捕捉し、半導体素子への侵入を阻止し、耐
湿性の劣化がなく、半導体素子のショート不良の発生を
防止できるという効果がある。
As described above, according to the present invention, the metal oxide covering the entire circumference is formed on at least a part of the suspension lead and the inner lead while leaving the plating layer, and thereby the interface between the lead frame and the resin is formed. The metal oxide traps impurity ions that enter from the inside, prevents the ions from entering the semiconductor element, has no deterioration in moisture resistance, and has an effect that a short circuit defect of the semiconductor element can be prevented.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施例の平面図及びそのA−
A′線断面図である。
FIG. 1 is a plan view of a first embodiment of the present invention and its A-
It is an A'line sectional view.

【図2】本発明の第2の実施例の平面図及びそのB−
B′線断面図である。
FIG. 2 is a plan view of the second embodiment of the present invention and its B-
It is a B'line sectional drawing.

【図3】従来のリードフレームの平面図及びそのC−
C′線断面図である。
FIG. 3 is a plan view of a conventional lead frame and its C-
It is a C'line sectional view.

【符号の説明】[Explanation of symbols]

1 リードフレーム 2 アイランド 3 インナーリード 4 キャビティ 5 めっき層 6 金属酸化物 7 吊りリード 1 Lead Frame 2 Island 3 Inner Lead 4 Cavity 5 Plating Layer 6 Metal Oxide 7 Suspended Lead

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 半導体素子を搭載するアイランドと、該
アイランドを支持する吊りリードと、前記アイランドを
囲むように少くとも2方向に同数配置されたインナーリ
ードと該インナーリードの先端に形成されたボンディン
グ用のめっき層とを有する半導体装置用リードフレーム
において、前記めっき層を残して少くとも前記吊りリー
ドと前記インナーリードの一部に全周を被覆する金属酸
化物を形成したことを特徴とする半導体装置用リードフ
レーム。
1. An island on which a semiconductor element is mounted, suspension leads for supporting the island, inner leads arranged in the same number in at least two directions so as to surround the island, and bonding formed at the tips of the inner leads. In a lead frame for a semiconductor device having a plating layer for use with a semiconductor device, a metal oxide covering the entire circumference is formed on at least a part of the suspension lead and the inner lead while leaving the plating layer. Lead frame for equipment.
【請求項2】 前記金属酸化物がアンチモン系金属酸化
物とビスマス系金属酸化とのうちのいずれか一方の金属
酸化物であることを特徴とする半導体装置用リードフレ
ーム。
2. The lead frame for a semiconductor device, wherein the metal oxide is one of an antimony-based metal oxide and a bismuth-based metal oxide.
JP17952792A 1992-07-07 1992-07-07 Lead frame for semiconductor device Withdrawn JPH0629438A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17952792A JPH0629438A (en) 1992-07-07 1992-07-07 Lead frame for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17952792A JPH0629438A (en) 1992-07-07 1992-07-07 Lead frame for semiconductor device

Publications (1)

Publication Number Publication Date
JPH0629438A true JPH0629438A (en) 1994-02-04

Family

ID=16067323

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17952792A Withdrawn JPH0629438A (en) 1992-07-07 1992-07-07 Lead frame for semiconductor device

Country Status (1)

Country Link
JP (1) JPH0629438A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5608260A (en) * 1994-12-30 1997-03-04 International Business Machines Corporation Leadframe having contact pads defined by a polymer insulating film

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5608260A (en) * 1994-12-30 1997-03-04 International Business Machines Corporation Leadframe having contact pads defined by a polymer insulating film
US5776801A (en) * 1994-12-30 1998-07-07 International Business Machines Corporation Leadframe having contact pads defined by a polymer insulating film

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Legal Events

Date Code Title Description
A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 19991005