JPS58182252A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS58182252A
JPS58182252A JP6502782A JP6502782A JPS58182252A JP S58182252 A JPS58182252 A JP S58182252A JP 6502782 A JP6502782 A JP 6502782A JP 6502782 A JP6502782 A JP 6502782A JP S58182252 A JPS58182252 A JP S58182252A
Authority
JP
Japan
Prior art keywords
resin
terminal
case
terminals
semiconductor chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6502782A
Other languages
Japanese (ja)
Inventor
Mitsuoki Fujita
藤田　光興
Kanji Iwase
岩瀬　寛治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP6502782A priority Critical patent/JPS58182252A/en
Publication of JPS58182252A publication Critical patent/JPS58182252A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

PURPOSE:To prevent short-circuit between terminals and corrosion of bonding pad by covering, on the occasion of casing semiconductor chip and a part of terminal electrically connected thereto through resin sealing, at least the area near to the root of terminals and the surface of resin case in vicinity of such terminals with other resin thin film. CONSTITUTION:A case 1 is structured by sealing semiconductor chip and terminal 2 connected electrically thereto with resin and the area 3 near to the root of terminal 2 and the surface of case 1 in the vicinity of root of said terminal 2 are covered with a resin thin film 5 consisting of the silicon resin, epoxy resin and polyimide resin, etc. Thereby, metal is precipitated on the surface of the case between terminals at the time of moisture proof test and crystal does not grow, and moreover water does not penetrate into the inside from the interface of terminal 2 and resin case 1. Thereby, corrosion of bonding pad can be prevented.

Description

【発明の詳細な説明】 本発明は半導体装置に関し、特に樹脂封止型半導体装置
に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device, and particularly to a resin-sealed semiconductor device.

従来、樹脂封止型半導体装置の耐湿性を調査する試験（
高温高湿富囲気中に保管もしくは同雰囲気中にてバイア
ス印加する試験）において、被試験半導体装置の端子部
の構成物質であるところの鉄、ニッケル、銀、錫、鉛と
いった金輌がその試験環境の為に端子間のケース表面に
析出し、結晶成長することによって、端子間の短絡もし
くは漏れ電気が発生すること、端子と封止樹脂との界面
からの水の浸入によりポンディングパッド部に腐食が発
生することなどの欠点があった。Conventionally, tests to investigate the moisture resistance of resin-encapsulated semiconductor devices (
In tests in which the semiconductor device under test is stored in a high-temperature, high-humidity, rich atmosphere or a bias is applied in the same atmosphere, metals such as iron, nickel, silver, tin, and lead, which are the constituent materials of the terminals of the semiconductor device under test, are tested. Due to the environment, precipitation and crystal growth on the case surface between the terminals may cause short circuits or leakage electricity between the terminals, and water may enter the bonding pad area from the interface between the terminal and the sealing resin. There were drawbacks such as corrosion.

本発明は上記欠点を除去し、端子部間の短絡と、ポンデ
ィングパッド部の腐食を防止する構造を有する半導体装
置を提供するものである。The present invention eliminates the above-mentioned drawbacks and provides a semiconductor device having a structure that prevents short circuits between terminal portions and corrosion of bonding pad portions.

本発明の半導体装置は、半導体チップと該半導体チップ
に電気的に接続する端子の一部とを樹脂で封止してケー
スが形成される半導体装置において、少くとも前記端子
の付根近傍部分と該付根近傍の前記樹脂表面を樹脂薄膜
で機ったことを特徴とする。The semiconductor device of the present invention is a semiconductor device in which a case is formed by sealing a semiconductor chip and a part of a terminal electrically connected to the semiconductor chip with resin, at least a portion near the base of the terminal and a part of the terminal electrically connected to the semiconductor chip. It is characterized in that the resin surface near the base is covered with a thin resin film.

本発明の実施例について図面を用いて説明する。Embodiments of the present invention will be described with reference to the drawings.

第１図＜８）　、　（ｂ）は本発明の一実施例の製造方
法を説明するための斜視図及び部分断面図である。FIG. 1<8) and (b) are a perspective view and a partial sectional view for explaining a manufacturing method according to an embodiment of the present invention.

半導体チップとこの半導体チップに電気的に接続する端
子２とを樹脂で封止してケースｌが形成される。第１図
（ａ）に示す端子２の付根近傍３と端子付根近傍のケー
ス表面４に、第１図（ｂ）で示すように樹脂薄膜５で榎
う。樹脂薄膜５は、シリコーン樹脂、エポキシ樹脂、ポ
リイミド樹脂等を用いることができる。A case 1 is formed by sealing a semiconductor chip and terminals 2 electrically connected to the semiconductor chip with resin. The vicinity 3 of the base of the terminal 2 shown in FIG. 1(a) and the case surface 4 near the base of the terminal are coated with a thin resin film 5 as shown in FIG. 1(b). The resin thin film 5 can be made of silicone resin, epoxy resin, polyimide resin, or the like.

このように樹脂薄膜５で榎うことにより、耐湿性試験に
おいて、端子間のケース表面に金属が析出し、結晶成長
することが防止され、また端子２と樹脂のケース１との
界面から水が侵入してポンディングパッド部が腐食する
ことが低減される。By covering with the resin thin film 5 in this way, metal precipitation and crystal growth on the case surface between the terminals is prevented in the moisture resistance test, and water is prevented from flowing from the interface between the terminal 2 and the resin case 1. Intrusion and corrosion of the bonding pad portion are reduced.

第２図（ａｌ　、　（ｂｌは本発明の第２の実施例の製
造方法を説明するための斜視図及び部分断面図である。FIGS. 2A and 2B are a perspective view and a partial sectional view for explaining the manufacturing method of the second embodiment of the present invention.

この実施例は端子２の付根部分１１を第１の実施例より
広くシ、付根部分１１とケースｌの全表面を樹脂薄膜１
２で憶ったものである。このようにすると樹脂を少し多
く使用するが樹脂液中にじやぶ漬けで被榎を行うことが
できるので作業が容易であるという利点がある。効果は
第１の実施例と同じである。In this embodiment, the root portion 11 of the terminal 2 is made wider than the first example, and the entire surface of the root portion 11 and the case l is covered with a thin resin film 1.
This is what I remembered from 2. This method requires a little more resin, but it has the advantage of being easier to work with since it can be soaked in jiyabu in the resin solution. The effect is the same as the first embodiment.

以上説明したように、本発明によれは、耐湿性を改御し
、金属の析出及び成長による端子間の短絡並びに端子と
樹脂との間からの水の侵入によるポンディングパッド部
の腐食とを防止できる樹脂封止型の半導体装置が得られ
るのでその効果は大きい。As explained above, the present invention improves moisture resistance and prevents short circuits between terminals due to metal precipitation and growth, and corrosion of the bonding pad portion due to water intrusion between the terminals and the resin. The effect is great because a resin-sealed semiconductor device that can prevent the above-mentioned problems can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図（ａｌｌ　、　（ｂ）は本発明の第１の実施例の
製造方法を説明するための斜視図及び部分断面図、第２
図（ａｔ　、　（ｂＪは本発明の第２の実施例の製造方
法を説明するための斜視図及び部分断面図である。 ｌ・・・・・・ケース、２・・・・・・端子、３・・・
・・・端子の付根近傍、４・・・・・・端子付根近傍の
ケース表面、５・・・・・・樹脂薄膜、１１・・・・・
・端子の付根近傍、１２・・・・・・樹脂薄膜。FIGS. 1(a) and 1(b) are a perspective view and a partial sectional view for explaining the manufacturing method of the first embodiment of the present invention, and FIGS.
Figures (at, bJ are a perspective view and a partial sectional view for explaining the manufacturing method of the second embodiment of the present invention. l... Case, 2... Terminal, 3...
...Near the base of the terminal, 4...Case surface near the base of the terminal, 5...Resin thin film, 11...
・Near the base of the terminal, 12...Resin thin film.

Claims (1)

【特許請求の範囲】[Claims] 半導体チップと該半導体チップに電気的に接続する端子
の一部とを樹脂で封止してケースが形成される半導体装
置において、少くとも前記端子の付根近傍部分と該付根
近傍の前記樹脂表面を樹脂薄膜で覆ったことを特徴とす
る半導体装置。In a semiconductor device in which a case is formed by sealing a semiconductor chip and a part of a terminal electrically connected to the semiconductor chip with a resin, at least a portion near the base of the terminal and the resin surface near the base are sealed. A semiconductor device characterized by being covered with a resin thin film.
JP6502782A 1982-04-19 1982-04-19 Semiconductor device Pending JPS58182252A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6502782A JPS58182252A (en) 1982-04-19 1982-04-19 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6502782A JPS58182252A (en) 1982-04-19 1982-04-19 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS58182252A true JPS58182252A (en) 1983-10-25

Family

ID=13275076

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6502782A Pending JPS58182252A (en) 1982-04-19 1982-04-19 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS58182252A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4987474A (en) * 1987-09-18 1991-01-22 Hitachi, Ltd. Semiconductor device and method of manufacturing the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4987474A (en) * 1987-09-18 1991-01-22 Hitachi, Ltd. Semiconductor device and method of manufacturing the same

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