JPH0629143A - Method for forming bump of layered electronic parts - Google Patents

Method for forming bump of layered electronic parts

Info

Publication number
JPH0629143A
JPH0629143A JP20452692A JP20452692A JPH0629143A JP H0629143 A JPH0629143 A JP H0629143A JP 20452692 A JP20452692 A JP 20452692A JP 20452692 A JP20452692 A JP 20452692A JP H0629143 A JPH0629143 A JP H0629143A
Authority
JP
Japan
Prior art keywords
bump
electrode
solder
capacitor
metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP20452692A
Other languages
Japanese (ja)
Other versions
JP3277389B2 (en
Inventor
Sadakichi Saruta
貞吉 猿田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=16491998&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=JPH0629143(A) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP20452692A priority Critical patent/JP3277389B2/en
Publication of JPH0629143A publication Critical patent/JPH0629143A/en
Application granted granted Critical
Publication of JP3277389B2 publication Critical patent/JP3277389B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components

Landscapes

  • Ceramic Capacitors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

PURPOSE:To obtain a method for forming a bump on layered electronic parts easily and positively without changing a conventional bump-manufacturing process greatly. CONSTITUTION:A ceramic sheet 5 where an external electrode 6 of a metal without any wetting property for solder is printed at both edges is stacked on a ceramic sheet 3 and the outermost layer of an internal electrode 4 and the entire part is calcined. Thin, a lower electrode 12 is connected to the external electrode 6 for interlocking to the internal electrode 4 and at the same time a bump electrode 11 with wetting property for solder is printed at the external electrode 6 while being matched to the bump-mounting position and then bump is piled up on the bump electrode 11, thus forming a bump 10.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、積層コンデンサ等の積
層電子部品にバンプを取り付ける場合のバンプの形成方
法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bump forming method for mounting a bump on a laminated electronic component such as a laminated capacitor.

【0002】[0002]

【従来の技術】近年、電子装置の小型化が望まれてお
り、その電子装置の小型化を達成するため内部に用いる
電子部品を小型化することと共に、数多くの電子部品を
一定の面積の基板内にできるかぎり組み込む高密度実装
の実施が望まれてきている。このような電子部品の高密
度実装を実現させるひとつの方法として、バンプを用い
た電子部品の取り付け方法が知られている。
2. Description of the Related Art In recent years, there has been a demand for downsizing of electronic devices. In order to achieve downsizing of the electronic devices, electronic parts used inside are downsized, and at the same time, a large number of electronic parts are formed on a substrate having a certain area. It has been desired to implement high-density packaging that incorporates as much as possible. As one method for realizing such high density mounting of electronic components, a mounting method of electronic components using bumps is known.

【0003】例えば、電極と誘電体を積層してなる積層
コンデンサ等にバンプを形成する場合、内部電極が露出
した両端面に金属を取り付けて個々の内部電極を接続さ
せるとともにこの金属をこの積層コンデンサの下面に延
ばし、そこにバンプを設けるようにしていた。
For example, when bumps are formed on a multilayer capacitor in which electrodes and dielectrics are laminated, metal is attached to both end surfaces where internal electrodes are exposed to connect individual internal electrodes, and this metal is used for this multilayer capacitor. It was extended to the lower surface of and the bump was provided there.

【0004】詳しくは、積層コンデンサの両側面に、ま
ずAg/Pb等を焼き付けて下部電極を作り、その下部
電極の上にNi等をメッキにより取り付けて中間電極を
設け、そして更にハンダをメッキして外部電極を形成し
てそこにバンプを設けるようにしていた。
More specifically, first, Ag / Pb or the like is baked on both sides of the multilayer capacitor to form a lower electrode, Ni or the like is attached on the lower electrode by plating to form an intermediate electrode, and then solder is further plated. Then, the external electrodes are formed and the bumps are provided there.

【0005】[0005]

【発明が解決しようとする課題】このように、金属をコ
ンデンサの端面及び下面や上面に取り付けなければなら
ないので、通常の場合、コンデンサを、溶融させた金属
内に端面を下に向けた状態で、金属がコンデンサの下面
に付着するまで入れて行っていた。したがって、コンデ
ンサを引き上げた際コンデンサの周囲に付着した金属が
自重により下方に溜ったり、又表面張力により丸まるこ
とより、形成された電極の表面がコンデンサの下面に対
して傾斜してしまい、この外部電極にバンプを取りつけ
る場合に非常に取り付けにくくなることがあった。しか
も、バンプを形成するためにバンプ取り付け位置以外の
部分に絶縁用のレジストを塗布しなければならず手間が
かかり、加えてコンデンサ自体の大きさが非常に小さい
ことから扱いにくく、製造にかかるコストが上昇してい
た。
As described above, since the metal has to be attached to the end face, the lower face and the upper face of the capacitor, the capacitor is usually placed in the molten metal with the end face facing downward. , It was done until the metal adhered to the bottom surface of the capacitor. Therefore, when the capacitor is pulled up, the metal attached to the periphery of the capacitor accumulates downward due to its own weight or is rounded by the surface tension, and the surface of the formed electrode inclines with respect to the lower surface of the capacitor. When attaching a bump to an electrode, it could be very difficult to attach. Moreover, in order to form the bumps, it is troublesome because the insulating resist must be applied to the parts other than the bump mounting positions. In addition, the size of the capacitor itself is very small, which makes it difficult to handle and the manufacturing cost is low. Was rising.

【0006】更に、側面に金属を設ける代わりにスルー
ホールを形成して個々の内部電極を接続させるものも知
られているが、このスルーホールの形成には、積層した
後にドリル等により各電極を貫く穴を設け、この穴の内
面に金属を塗布しなければならず製造に手間がかかると
いう問題があった。
Further, it is known that instead of providing a metal on the side surface, a through hole is formed to connect the individual internal electrodes. In order to form this through hole, each electrode is formed by drilling after laminating. There is a problem in that it is necessary to form a through hole and to apply a metal to the inner surface of this hole, which requires time and labor for manufacturing.

【0007】本発明は、従来の積層電子部品のバンプ形
成行程に大幅な変更を施すことなくこれを活用でき、し
かも容易且つ確実に積層電子部品にバンプが形成できる
方法を提供することを目的とする。
It is an object of the present invention to provide a method of utilizing a conventional bump forming process of a laminated electronic component without making a great change, and easily and surely forming a bump on the laminated electronic component. To do.

【0008】[0008]

【課題を解決するための手段】そこで、本発明では、上
記課題を解決するため、積層前にセラミックシートの両
端部にハンダに対して濡れ性のない金属を印刷してお
き、内部電極とセラミックシートとを順次積層した後こ
のセラミックシートを電子部品の外表面に積層する。そ
の後このセラミックシートを内部電極とともに焼成し
て、積層電子部品の外表面に、印刷した金属の焼成によ
る外部電極を形成する。次に、このようにして形成した
外部電極にハンダ濡れ性を備えた金属をバンプ取り付け
箇所に印刷してバンプ電極を設け、このバンプ電極にハ
ンダを盛りつけバンプを形成するようにしたのである。
尚、内部電極と外部電極とは、別途電気的に接続する。
In order to solve the above problems, therefore, in the present invention, a metal having no wettability with respect to solder is printed on both ends of the ceramic sheet before laminating, so that the internal electrodes and the ceramics are not printed. After sequentially laminating the sheets, the ceramic sheet is laminated on the outer surface of the electronic component. Thereafter, this ceramic sheet is fired together with the internal electrodes to form external electrodes by firing the printed metal on the outer surface of the laminated electronic component. Next, a metal having solder wettability is printed on the external electrodes thus formed at the bump mounting locations to provide bump electrodes, and solder is placed on the bump electrodes to form bumps.
The internal electrode and the external electrode are electrically connected separately.

【0009】[0009]

【作用】外部電極はセラミックシートの表面に直接印刷
等により塗布され焼成して形成されるので、焼成後は表
面が平坦に形成され、その表面にバンプ用の電極を印刷
するにも容易に行うことができ、かつ外部電極はバンプ
に対して濡れ性を有しないのでバンプ電極にのみバンプ
用のハンダが盛りつけられて簡単に、かつ確実にバンプ
を形成できる。
Since the external electrodes are formed by directly printing on the surface of the ceramic sheet and firing, the surface is formed flat after firing and the electrodes for bumps can be easily printed on the surface. Since the external electrodes do not have wettability with respect to the bumps, bump solder can be placed only on the bump electrodes to form the bumps easily and reliably.

【0010】[0010]

【実施例】以下、本発明にかかるバンプの形成方法の実
施例について図面を用いて説明する。
Embodiments of the bump forming method according to the present invention will be described below with reference to the drawings.

【0011】図1にコンデンサ2の分解組み立て図を示
す。(図では説明の都合上上下を逆にしてある。)セラ
ミックシート3は、チタン酸バリウムのような誘電体セ
ラミックからなり、このセラミックシート3の表面に内
部電極4が形成してある。内部電極4は、銀系あるいは
銅系の金属を印刷したもので、それぞれの電極毎に交互
にセラミックシート3に印刷され、それぞれの電極毎に
異なった端部に延長され、セラミックシート3を積層す
ると内部電極4の端部がコンデンサ2の端面に露出する
ようになっている。これらセラミックシート3と内部電
極4を順次積層し、その最下層に、両端にタングステン
7を印刷により塗布したセラミックシート5を重ね合わ
せる。
FIG. 1 shows an exploded view of the capacitor 2. (In the figure, the upper and lower sides are turned upside down for convenience of description.) The ceramic sheet 3 is made of a dielectric ceramic such as barium titanate, and the internal electrodes 4 are formed on the surface of the ceramic sheet 3. The internal electrodes 4 are formed by printing a silver-based or copper-based metal, are printed on the ceramic sheet 3 alternately for each electrode, and are extended to different ends for each electrode, and the ceramic sheets 3 are laminated. Then, the end of the internal electrode 4 is exposed on the end face of the capacitor 2. The ceramic sheet 3 and the internal electrode 4 are sequentially laminated, and the ceramic sheet 5 having both ends coated with tungsten 7 by printing is superposed on the lowermost layer.

【0012】こうして、セラミックシート3と内部電極
4とセラミックシート5を積層した後、全体を焼成する
と、コンデンサ2が形成されるとともにセラミックシー
ト5の両端にタングステン7からなるハンダに対して濡
れ性のない外部電極6が形成される。
When the ceramic sheet 3, the internal electrodes 4 and the ceramic sheet 5 are laminated in this way and then the whole is fired, the capacitor 2 is formed and wettability to the solder made of tungsten 7 at both ends of the ceramic sheet 5 is obtained. The external electrode 6 which is not formed is formed.

【0013】次に、この外部電極6の表面に図2に示す
ようにバンプ電極11を2か所ずつ両端各々の外部電極
6に印刷する。バンプ電極11の印刷は、ハンダに対し
て濡れ性のある銀を用いる。そして、更にコンデンサ2
の両側にそれぞれ下部電極12をそれぞれの側の外部電
極6に接続させて取り付ける。この下部電極12は導電
性を有していればよく、金属の種類は特に問わない。次
に、このバンプ電極11にハンダを盛り付け、バンプ1
0を図3に示すように4か所形成する。図4にコンデン
サ2をバンプ10を介して基板20上に取り付けた状態
を示す。
Next, as shown in FIG. 2, bump electrodes 11 are printed on the surface of each external electrode 6 at two locations on each of the external electrodes 6 at both ends. The bump electrode 11 is printed using silver, which has wettability with respect to solder. And further capacitor 2
The lower electrodes 12 are connected to the external electrodes 6 on the respective sides and attached to both sides of the external electrodes 6. The lower electrode 12 has only to have conductivity, and the kind of metal is not particularly limited. Next, solder is applied to the bump electrodes 11 to form the bump 1
0 is formed at four places as shown in FIG. FIG. 4 shows a state in which the capacitor 2 is mounted on the substrate 20 via the bump 10.

【0014】したがって、本実施例の形成方法によれ
ば、バンプ10を取り付ける外部電極6が印刷、及びそ
の後の焼成によって形成されるので表面を平坦にでき、
しかもハンダに対して濡れ性を有しないので、レジスト
を新たに塗布する必要がなく容易にかつ確実にバンプを
従来のバンプ取り付け装置を大幅に変更させることなく
コンデンサ2に形成することができる。
Therefore, according to the forming method of this embodiment, since the external electrodes 6 for mounting the bumps 10 are formed by printing and subsequent firing, the surface can be made flat,
Moreover, since it has no wettability with respect to solder, it is not necessary to newly apply a resist, and the bumps can be easily and reliably formed on the capacitor 2 without significantly changing the conventional bump attaching apparatus.

【0015】尚、本実施例では外部電極6をタングステ
ン7により形成したが、本発明では外部電極6はハンダ
に対して濡れ性がなければよく、クロム等他の金属であ
ってもよい。また、バンプ電極11を銀を用いて印刷に
より形成したが、同様にこれはハンダに対して濡れ性が
あればよく、銀の他、金、銅、銀と鉛との合金等であっ
てもよく、又形成手段を蒸着等の他の方法によって行っ
てもよい。
Although the external electrode 6 is formed of tungsten 7 in this embodiment, the external electrode 6 is not required to be wettable by solder in the present invention, and other metal such as chromium may be used. Further, the bump electrode 11 is formed by printing using silver, but similarly, the bump electrode 11 only needs to have wettability with respect to solder, and in addition to silver, gold, copper, an alloy of silver and lead, or the like may be used. Alternatively, the forming means may be performed by another method such as vapor deposition.

【0016】更に、本発明はコンデンサに限らず、多層
基板等積層により製造される電子部品であれば、その表
面にバンプを取り付ける場合の形成方法として応用可能
である。
Furthermore, the present invention is not limited to capacitors, but can be applied as a forming method for mounting bumps on the surface of electronic components manufactured by laminating multilayer substrates such as multilayer substrates.

【0017】[0017]

【発明の効果】以上述べたように、本発明のバンプ形成
方法によれば、焼成前に積層部品の外表面にあたるセラ
ミックシートにハンダ濡れ性のない金属を印刷してお
き、この金属を焼成により平面性の高い外部電極に形成
し、この外部電極にバンプ取り付けの電極をハンダ濡れ
性の良好な金属により印刷して、このバンプ電極にバン
プを取り付けることにしたので、バンプ取り付け面を平
面性の高いものにでき、バンプを容易且つ確実に取り付
けることができ、しかも従来のバンプ形成に用いた装置
を大幅に変更することなく利用でき、非常に量産性の高
い有効なバンプ形成方法を提供できる。
As described above, according to the bump forming method of the present invention, a metal having no solder wettability is printed on the ceramic sheet which is the outer surface of the laminated component before firing, and the metal is fired. Since the bump mounting surface is formed on the external electrode with high flatness, the bump mounting electrode is printed on the external electrode with a metal having good solder wettability, and the bump mounting surface is flat. It is possible to provide an effective bump forming method that can be made highly expensive, that the bumps can be easily and surely attached, and that the apparatus used for forming the conventional bumps can be used without making a great change, and that the bump forming method is very mass producible.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明にかかるバンプの形成方法を説明するコ
ンデンサの分解斜視図である。
FIG. 1 is an exploded perspective view of a capacitor for explaining a bump forming method according to the present invention.

【図2】本発明にかかるバンプの形成方法を説明するコ
ンデンサの分解斜視図である。
FIG. 2 is an exploded perspective view of a capacitor for explaining a bump forming method according to the present invention.

【図3】本発明にかかるコンデンサの斜視図である。FIG. 3 is a perspective view of a capacitor according to the present invention.

【図4】本発明にかかるコンデンサを基板上に取り付け
た状態を示す正面図である。
FIG. 4 is a front view showing a state in which a capacitor according to the present invention is mounted on a substrate.

【符号の説明】[Explanation of symbols]

2 コンデンサ 3 セラミックシート 4 内部電極 5 セラミックシート 6 外部電極 10 バンプ 11 バンプ電極 2 Capacitor 3 Ceramic Sheet 4 Internal Electrode 5 Ceramic Sheet 6 External Electrode 10 Bump 11 Bump Electrode

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 積層電子部品の上面あるいは下面の両端
にハンダ濡れ性の少ない金属を塗布し、これを焼成して
外部電極に形成し、当該外部電極上にハンダ濡れ性の良
好な金属をバンプ取り付け位置に塗布し、溶融したハン
ダを前記外部電極に付与してハンダを前記バンプ取り付
け位置に付着させてバンプを積層電子部品に形成するこ
とを特徴とした積層電子部品のバンプ形成方法。
1. A metal having a low solder wettability is applied to both ends of an upper surface or a lower surface of a laminated electronic component, which is baked to form an external electrode, and a metal having a good solder wettability is bumped on the external electrode. A bump forming method for a laminated electronic component, comprising applying a molten solder to an attachment position to the external electrode to attach the solder to the bump attachment position to form a bump on the laminated electronic component.
【請求項2】 請求項1に記載の積層電子部品が積層コ
ンデンサであり、当該積層コンデンサの内部電極を、当
該積層コンデンサの側面に下部電極を設けて一体に接続
するとともに当該下部電極と外部電極を接続させること
とした積層コンデンサのバンプ形成方法。
2. The multilayer electronic component according to claim 1, which is a multilayer capacitor, wherein the internal electrode of the multilayer capacitor is integrally connected by providing a lower electrode on a side surface of the multilayer capacitor and the lower electrode and the external electrode. Forming a bump of a multilayer capacitor.
JP20452692A 1992-07-07 1992-07-07 Bump forming method for laminated electronic components Expired - Fee Related JP3277389B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20452692A JP3277389B2 (en) 1992-07-07 1992-07-07 Bump forming method for laminated electronic components

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20452692A JP3277389B2 (en) 1992-07-07 1992-07-07 Bump forming method for laminated electronic components

Publications (2)

Publication Number Publication Date
JPH0629143A true JPH0629143A (en) 1994-02-04
JP3277389B2 JP3277389B2 (en) 2002-04-22

Family

ID=16491998

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20452692A Expired - Fee Related JP3277389B2 (en) 1992-07-07 1992-07-07 Bump forming method for laminated electronic components

Country Status (1)

Country Link
JP (1) JP3277389B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10313891A1 (en) * 2003-03-27 2004-10-14 Epcos Ag Electrical multilayer component

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10313891A1 (en) * 2003-03-27 2004-10-14 Epcos Ag Electrical multilayer component
US7710233B2 (en) 2003-03-27 2010-05-04 Epcos Ag Electric multilayer component

Also Published As

Publication number Publication date
JP3277389B2 (en) 2002-04-22

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