JPH0628831Y2 - Power-on reset circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field The present invention relates to a power-on reset circuit which is provided in an IC or the like and supplies a reset signal to a logic circuit or the like when the power supply voltage rises.

(b) Prior art and its drawbacks In an IC having a logic circuit or the like, it is usual to supply a reset signal to each circuit when the power supply rises, and therefore, in general, in addition to these circuits, when the power is turned on. A power-on reset circuit that detects the rise of the power supply voltage and generates a reset signal at an appropriate time is built in the IC. FIG. 1A shows an example of a conventional reset circuit. In this circuit, four diodes, which are constant voltage elements, are connected in series between power supply terminals, and the forward voltage drop (VF) and the base-emitter voltage of a transistor are used to maintain a constant power supply voltage VCC (5 VF). ) The reset signal (“H”) is output until the above. In this circuit, as shown in FIG. 7B, the reset signal is supplied during the period t from the operation start voltage (lower limit voltage for normal operation) VE of the circuit to which the reset signal is supplied during the rising period to 5VF. Will be done.
However, if the rise of the power supply voltage is very steep, the above-mentioned period t may become very short and the reset signal may not be supplied correctly. Therefore, in order to solve this problem, a CR time constant circuit is connected between the power supply terminals, and even if the rise of the power supply voltage is steep, the delay of the charging voltage based on the time constant is used to ensure that the reset signal is delayed. The circuit that is designed to be generated in 1 is also put into practical use. However, this circuit is effective when the rise of the power supply voltage is fast, but when the rise of the power supply voltage is slow, the slope and the slope of the rise of the charging voltage are combined, and the reset is performed before the power supply voltage reaches the operation start voltage. There was an inconvenience that the signal was canceled.

(c) Purpose of the invention The purpose of the invention is to combine a CR time constant circuit and a constant voltage element well so that the reset signal can be reliably supplied to other circuits regardless of whether the rise of the power supply voltage is fast or slow. It is to supply a reset circuit at power-on.

(d) Configuration of the invention This invention is a power-on reset circuit that outputs a reset signal when the power is turned on to a device control circuit. A reset signal output circuit that outputs a reset signal until the power supply voltage is equal to or higher than a predetermined voltage required for the control circuit and the switch element is turned on; and a CR time constant circuit connected between power supply terminals. Comparing a charging voltage of the CR time constant circuit and the reference voltage with a reference voltage generating circuit which is connected between power supply terminals and generates a reference voltage lower than the power supply voltage, and the charging voltage is equal to or higher than the reference voltage. And a comparator circuit which outputs an ON signal to the switch element when

By adopting such a configuration, even if the rise of the power supply voltage is extremely absorbed, the reset signal output circuit will not operate until the charging voltage of the CR time constant circuit becomes equal to or higher than the reference voltage generated by the reference voltage generation circuit. Since the switch element does not conduct, the reset signal supply time is sufficiently secured, and conversely, even if the comparator circuit outputs the ON signal to the switch element due to the slow resetting of the power supply voltage, the reset signal output circuit The reset signal will continue to be supplied unless the power supply voltage applied to the device has reached the predetermined voltage required for the control circuit of the device, and the power supply voltage is reset before reaching the predetermined voltage required for the control circuit. The problem that the signal is released is definitely solved.

(e) Embodiment FIG. 2 is a circuit diagram of a power-on reset circuit according to an embodiment of the present invention. The transistor Q1 is a reset signal output transistor, and four diodes D1 to D4 are connected in the forward direction between the base and the power supply terminal a via a transistor Q2 of a switch element. The reset signal is valid when it is "H". The reset signal is released when the power supply voltage VCC is equal to or higher than the sum of the forward drop voltage of the diodes D1 to D4, the base-emitter voltage of the transistor Q1, and the saturation voltage of the transistor Q2. The diodes D1 to D4 correspond to the "constant voltage element" according to the present invention, the transistor Q2 corresponds to the "switch element" according to the present invention, and the transistor Q2, the diodes D1 to D4, and the transistor Q1.
Corresponds to the "reset signal output circuit" according to the present invention.

Between the power supply terminals a and b, in addition to the constant voltage elements of the diodes D1 to D4, a CR time constant circuit DC including a series circuit of a resistor R1 and a capacitor C, a reference voltage generating circuit including a series circuit of resistors R2 and R3, And the comparison circuit CMP is connected.

The comparison circuit CMP compares the voltage at the point A of the CR time constant circuit DC, that is, the charging voltage with the voltage at the point B of the reference voltage generation circuit. When the voltage at the point A becomes equal to or higher than the voltage at B, the transistor Q3 turns on, the transistor Q4 also turns on, and the transistor Q2 turns on. When the voltage at point A does not exceed the voltage at point B, transistor Q2 remains off.

Considering the case where the power supply voltage VCC rises slowly in the above configuration, the voltage at the point A rises following the rise of the power supply voltage. The voltage at point B is the resistance R2
Since the voltage is divided by R3, the voltage at the point A exceeds the voltage at the point B at an early stage of rising. Therefore, the transistor Q2 is turned on at an early stage, and when the power supply voltage VCC becomes 5VF (≈saturation voltage of the transistor Q2 + forward drop voltage of the diodes D1 to D4 + base-emitter voltage of the transistor Q1), the transistor Q2 becomes a transistor. Q1 is turned on and the reset signal is released. That is, the same operation as that of the reset circuit shown in FIG.

On the other hand, when the power supply voltage rises early, the voltage at point A rises later than the rise. Therefore, the voltage at the point A becomes equal to or higher than the voltage at the point B at the time when the rising period of the power supply voltage is late. When the voltage at the point A exceeds the voltage at the point B, the power supply voltage has already exceeded the above voltage 5VF. Therefore, when the voltage at the point A exceeds the voltage at the point B and the transistor Q2 is turned on, the transistor Q1 is turned on by the power supply voltage at that time, and the reset signal is released. That is, in this case, even if the power supply voltage rises rapidly, the reset signal is released with a certain time delay, and the same operation as the reset signal generation circuit by the conventional CR time constant circuit is performed. .

By the above operation, the reset signal can be accurately supplied to each circuit in the IC such as the logic circuit whether the power supply voltage rises late or early. In the above embodiment, the reference voltage generating circuit is composed of the resistance voltage dividing circuit including the resistors R2 and R3. However, for example, a circuit for generating a constant voltage as the reference voltage is configured by using a special constant voltage element. May be. However, until the power supply voltage reaches a certain constant voltage, a constant voltage cannot be generated as the reference voltage, and eventually, when the power supply voltage rises slowly, the charging voltage of the CR time constant circuit exceeds the reference voltage faster, The reset signal generation operation is performed by the constant voltage element in the reset signal output circuit.

Although the CR time constant circuit DC is formed independently in the above-mentioned embodiment, if the CR oscillation circuit is built in the IC, the CR time constant circuit of the oscillation circuit can be used. . By doing this, the IC can be attached externally.
There is an advantage that the reset circuit can be easily configured without increasing the number of pins.

(f) Effects of the Invention According to the invention as described above, the reset signal can be reliably supplied even if the rise of the power supply voltage is slow or early with a simple circuit configuration, and the rise of the power supply voltage is unstable. It is possible to almost completely eliminate the malfunction of each circuit due to this.

[Brief description of drawings]

1 (A) and 1 (B) are circuit diagrams of a conventional reset circuit,
It is a figure for demonstrating operation | movement of the same reset circuit. FIG. 2 is a circuit diagram of a power-on reset circuit according to an embodiment of the present invention. DC ... CR time constant circuit, CMP ... comparison circuit, Q2 ... switch element (transistor).

Claims (2)

[Scope of utility model registration request] 1. A power-on reset circuit that outputs a reset signal to a control circuit of a device when the power is turned on, including a series circuit of a switch element and a constant voltage element connected between power terminals, A reset signal output circuit that outputs a reset signal until a predetermined voltage required for the control circuit and the switch element is turned on, a CR time constant circuit connected between power supply terminals, and a power supply terminal A reference voltage generating circuit that is connected to generate a reference voltage lower than a power supply voltage, compares the charging voltage of the CR time constant circuit with the reference voltage, and switches the charging voltage when the charging voltage is equal to or higher than the reference voltage. A power-on reset circuit consisting of a comparison circuit that outputs an ON signal to the element. 2. The CR time constant circuit is a CR of a CR oscillator circuit.
The power-on reset circuit according to claim 1, which is a utility model registration claim, which is a time constant circuit.