JP2601724Y2 - Starting circuit - Google Patents

Description

[Detailed description of the invention]

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a starting circuit for starting an on / off time ratio control circuit for controlling a ratio of on / off time of a switch in a switching power supply, for example.

[0002]

2. Description of the Related Art Generally, in a switching power supply,
In order to stabilize the output voltage, an on / off time ratio control circuit is provided which compares the output voltage with a reference voltage and controls the ratio of the on / off time of the switch according to the difference between the two.

When a starting circuit for starting the on / off time ratio control circuit is formed, it is necessary to prevent the output voltage of the starting power supply from fluctuating due to a control pulse output from the control circuit. .

For this reason, conventionally, a capacitor (hereinafter, referred to as an "input capacitor") is connected in parallel with a starting power supply, and the input capacitor absorbs fluctuations in the power supply voltage due to a control pulse. .

However, in such a configuration, when the starting power supply is set to the ON state, a large current (rush current) suddenly flows from the power supply to the input capacitor, and the capacitor may be destroyed.

In the above-described configuration, the power supply voltage is not stabilized until the input capacitor is charged by the starting power supply, so that the on / off time ratio control circuit may malfunction.

Therefore, conventionally, the occurrence of an inrush current is prevented by connecting a current limiting resistor in series with the input capacitor.

[0008] Conventionally, a malfunction of the control circuit is prevented by starting the on / off time ratio control circuit a predetermined time after the start-up power supply is set to the on state.

FIG. 2 is a circuit diagram showing a configuration of a conventional starting circuit having the above-described inrush current preventing function and starting delay function.

[0010] In the figure, reference numeral 10 denotes a starting circuit;
Is an on / off time ratio control circuit activated by the activation circuit 10.

The starting circuit 10 includes a starting power supply V0, an input capacitor C0 connected in parallel to the power supply V0, an inrush current preventing unit 11 for preventing a rush current from flowing through the capacitor C0, and a starting power supply V0. The activation delay unit 12 activates the on / off time ratio control circuit 20 after a lapse of a predetermined time since V0 is set to the on state.

The inrush current prevention unit 11 includes resistors R0, R1,
R2, a Zener diode D0, a field effect transistor (hereinafter, referred to as "FET") Q0, and a bipolar transistor (hereinafter, referred to as "transistor").

Here, the resistor R1 is connected to the input capacitor C0.
And the current I flowing through the capacitor C0
Is a current limiting resistor. FET Q0 is
A drain-source current path is connected in parallel with the current limiting resistor R1, and is a switch element that short-circuits both ends of the resistor R1 when the charging voltage of the input capacitor C0 reaches a predetermined value. Resistors R0 and R2, a Zener diode D0,
The transistor Q1 forms a control circuit that controls on / off of the FET Q1.

The start delay unit 12 includes resistors R3, R4, R
5, R6, R7, Zener diode D1, diode D2, transistor Q2, capacitor C1,
And a comparator IC.

Here, resistors R3, R4, R5, R6,
The zener diode D1, the diode D2, and the transistor Q2 form a power supply voltage supply circuit that supplies a power supply voltage to the on / off time ratio control circuit 20. Further, the resistors R5, R6, R7, the capacitor C1, and the comparator IC constitute a control circuit for controlling on / off of the on / off time ratio control circuit 20.

In the above configuration, referring to FIG.
The operation will be described. FIG. 3 is a waveform diagram showing signal waveforms at various parts in FIG.

First, the inrush current prevention operation of the inrush current prevention unit 11 will be described.

When the starting power supply V0 is set to the on state, the power supply voltage Va outputs the power supply voltage Va (FIG. 3).
(A)). As a result, the current I flows from the power supply V0 to the input capacitor C0.

At this time, a power supply voltage Va appears at both ends of the resistor R1. As a result, the transistor Q1 is set to the ON (conductive) state. As a result, the voltage Vc across the Zener diode D0 is set to zero (FIG. 3 (c)).
reference).

By setting the voltage Vc across the Zener diode D0 to zero, the FET Q0 is set to an off (non-conductive) state. As a result, the current I becomes the resistance R
1 only and is limited by this resistor R1.

Thereafter, the input capacitor C0 is charged by the current I. As a result, the voltage across the capacitor C0 gradually increases in accordance with the time constant r1c0 represented by the capacitance value c0 and the resistance value r1 of the resistor R1. As a result, the voltage Vb across the resistor R1 becomes equal to this time constant r1c.
It gradually decreases in accordance with 0 (see FIG. 3B).

When the voltage Vb across the resistor R1 decreases and becomes equal to or lower than the base saturation voltage V _BE (sat) of the transistor Q1, the transistor Q1 is turned off.
As a result, a Zener voltage is generated between both ends of the Zener diode D0 (see FIG. 3C).

The generation of a Zener voltage across the Zener diode D0 turns on the FET Q0. As a result, both ends of the resistor R1 are short-circuited, and the current limiting operation by the resistor R1 is released.

The inrush current prevention operation of the inrush current prevention unit 11 has been described above. Next, the activation delay operation of the activation delay unit 12 will be described.

When the start-up power supply V0 is turned on, a current flows from the power supply V0 to the Zener diode D1 via the resistor R3. As a result, a Zener voltage is generated across the Zener diode D1. As a result, at the connection point between the resistor R5 and the cathode of the diode D2, the base saturation voltage V _BE (sat) of the transistor Q2 and the forward voltage V
Then, a constant voltage Vd obtained by subtracting f appears (see FIG. 3F).

The constant voltage Vd is supplied to a power supply terminal of the on / off time ratio control circuit 20 as a power supply voltage. The constant voltage Vd is divided by the voltage dividing resistors R5 and R6, and the resistance value r7 of the resistor R7 and the capacitor C
The capacitor C1 is charged according to the time constant r7c1 represented by the capacitance value c1 of 1.

The divided voltage Ve of the resistors R5 and R6 (see FIG. 3)
(See (d)) is a comparator IC0 as a reference voltage.
Is supplied to the negative input terminal of. On the other hand, the charging voltage Vg of the capacitor C1 (see FIG. 3D) is a comparison voltage.
It is supplied to the positive input terminal of the comparator IC0.

The output voltage Vh of the comparator IC0
Is set to a low level when the comparison voltage Vg is lower than the reference voltage Ve, and is set to a high level when the comparison voltage Vg is higher than the reference voltage Ve (see FIG. 3E). The output voltage Vh is supplied to a control terminal of the control circuit 20 as a control voltage for controlling on / off of the on / off time ratio control circuit 20.

The on / off time ratio control circuit 20 is set to an off state when the control voltage Vh is at a low level, and is set to an on state when the control voltage Vh is at a high level. As a result, the control circuit 20 is activated when a time defined by the time constant r7c1 has elapsed since the activation power supply V0 was set to the ON state.

When the ON / OFF time ratio control circuit 20 is set to the ON state, the control circuit 20 outputs a drive pulse DP for controlling the ON / OFF of a switch (not shown) (FIG. 3 (g)). reference).

The time constant r7c1 for the start delay is F
After the ETQ0 is set to the ON state, the setting is made so as to satisfy the condition (condition 1) that the ON / OFF time ratio control circuit 20 is activated. This is because if the control circuit 20 is activated before the FET Q0 is set to the ON state, it may not be possible to reliably activate it.

The time constant r7c1 is set so as to satisfy the condition that the time constant r7c1 does not become too large (condition 2). This is because if the time constant r7c1 is too large,
This is because a failure may occur due to the load of the switching power supply.

[0033]

As described above, the conventional start-up circuit 10 is provided with the inrush current prevention unit 11 and the start-up delay unit 12 to prevent the inrush current and to control the on / off time ratio control circuit 20. Is intended to prevent malfunction.

However, in the conventional starting circuit 10, since the inrush current preventing unit 11 and the starting delay unit 12 operate independently, if the time constant r1c0 for preventing the inrush current is changed, a troublesome circuit is required. There was a problem that the work of setting the constants had to be performed in some cases.

That is, in the conventional startup circuit 10, the startup delay time of the on / off time ratio control circuit 20 is:
It is set by the time constant r7c1. The time constant r7c1 for the activation delay must be set so as to satisfy the condition 1 as described above. Therefore, if the time constant r1c0 for preventing inrush current is changed to a larger value, the time constant r7c1 for starting delay may also need to be changed.

However, in order to change the time constant r7c1, it is necessary to change the power supply voltage Va or the resistance value r of the resistors R1 and R7.
1, r7, and variations in the capacitance values c0 and c1 of the capacitors C0 and C1 must be taken into consideration, which is not easy.

Accordingly, an object of the present invention is to provide a start-up circuit which does not require complicated circuit constant setting work when changing a time constant for preventing inrush current.

[0038]

In order to achieve the above-mentioned object, the present invention provides a start-up device that starts an object to be started in conjunction with short-circuiting both ends of a current limiting resistor by means of resistance short-circuiting means. A delay means is provided.

[0039]

In the above configuration, when the charging voltage of the input capacitor reaches a predetermined voltage, both ends of the current limiting resistor are short-circuited by the resistor short-circuiting means. In conjunction with this, the activation target is activated by the activation delay means.

According to such a configuration, the above-described condition 1 can be satisfied without using a time constant for starting delay. As a result, when changing the time constant for preventing inrush current,
The troublesome work of setting circuit constants can be omitted.

[0041]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a circuit diagram showing a configuration of an embodiment of the present invention. In FIG. 1, the same parts as those in FIG. 2 are denoted by the same reference numerals, and detailed description will be omitted.

In the activation circuit 10 of FIG. 1, the configuration of the activation delay unit 12 is different from that of the activation circuit of FIG. 2, and the configuration of the inrush current prevention unit 11 is the same.

That is, the startup delay unit 12 of FIG. 2 operates independently of the inrush current prevention unit 11, whereas the startup delay unit 12 of FIG. When both ends of the resistor R1 are short-circuited, the on / off time ratio control circuit 20 is activated in conjunction with the short-circuit operation.

Here, the specific connection configuration of each part will be described as follows.

The positive terminal of the starter power supply V0 is connected to the reference potential terminal GND and the input capacitor C0.
Is connected to one end. The other end of the input capacitor C0 is connected via a current limiting resistor R1 to a negative terminal of a starting power supply V0.

A current path between the drain and source of the FET Q0 is connected in parallel to the current limiting resistor R1. This F
The gate of ETQ0 is connected to the cathode of a bias voltage generating Zener diode D0.

The cathode of the Zener diode D0 is further connected to the positive terminal of a starting power supply V0 via a resistor R0 and to the collector of a bias voltage controlling transistor Q1. Further, the anode is further connected to the negative terminal of the starting power supply V0 and to the emitter of the transistor Q1.

The collector of the transistor Q1 is further connected to the base of the transistor Q2 of the start delay unit 12, and the base is connected to the input capacitor C via a resistor R2.
It is connected to the connection point between 0 and the resistor R1.

The collector of the transistor Q2 of the start delay unit 12 is connected to the positive terminal of the start-up power supply V0 via the resistor R3, and the emitter is connected to the on / off time ratio control circuit 20 via the diode D1 in the forward direction. Is connected to the positive side power supply terminal. The negative power supply terminal of the control circuit 20 is connected to a connection point between the input capacitor C0 and the resistor R1.

In the above configuration, referring to FIG.
The operation will be described. FIG. 4 is a waveform diagram showing signal waveforms at various parts in FIG.

When the start-up power supply V0 is turned on, a power supply voltage Va is output from the power supply V0 (FIG. 4).
(A)). As a result, the current I flows from the starting power supply V0 to the input capacitor C0.

At this time, since the transistor Q1 is turned on, the voltage V across the Zener diode D0 is applied.
c is set to zero (see FIG. 4B). This allows
FET Q0 is set to the off state. As a result, the current I
Is limited by the resistor R1.

Thereafter, the input capacitor C0 is charged by the current I. Thus, the voltage across the capacitor C0 gradually increases according to the time constant r1c0. On the other hand, the voltage Vb across the resistor R1 is equal to the time constant r1
It gradually decreases in accordance with c0 (see FIG. 4B).

The voltage across the resistor R1 is equal to the voltage of the transistor Q1.
Is lower than the base saturation voltage V _BE (sat), the transistor Q1 is turned off. As a result, a Zener voltage is generated across the Zener diode D0 (see FIG. 4C).

The generation of the Zener voltage across the Zener diode D0 turns on the FET Q0. As a result, both ends of the resistor R1 are short-circuited, and the limitation of the current I by the resistor R1 is released.

The inrush current prevention operation of the inrush current prevention unit 11 has been described above. Next, the activation delay operation of the activation delay unit 12 will be described.

When transistor Q1 is on, the base potential of transistor Q2 is set to low level. Thus, in this case, the transistor Q2 is set to the off state, and the supply of the power supply voltage Vi to the on / off time ratio control circuit 20 is blocked (see FIG. 4D).

On the other hand, when the transistor Q1 is turned off, the base potential of the transistor Q2 is set to a high level. Thereby, the transistor Q
2 is set to the ON state, and the power supply voltage Vi is supplied from the starting power supply V0 to the on / off time ratio control circuit 20 (see FIG. 4D). As a result, the operation of the control circuit 20 is started (see FIG. 4E).

According to this embodiment described in detail above, the following effects can be obtained.

(1) First, according to this embodiment, the on / off time ratio control circuit 20 is activated in conjunction with the short-circuit operation of the current limiting resistor R1, so that the time constant for the activation delay is reduced. It becomes unnecessary. Thereby, even if the time constant r1c0 for preventing the inrush current is changed, there is no need to perform troublesome work of setting the component constants.

(2) According to this embodiment,
By controlling the supply of the power supply voltage to the off-time ratio control circuit 20, on / off of the control circuit 20 is controlled, so that the number of components of the start-up delay unit 12 can be reduced. As a result, it is possible to reduce the manufacturing cost of the start-up circuit and the pattern design time.

The embodiment of the present invention has been described in detail, but the present invention is not limited to the above-described embodiment.

(1) For example, in the above embodiment,
The configuration has been described in which on / off of the control circuit is controlled by controlling the supply of the power supply voltage to the off-time ratio control circuit 20. However, this idea, as before,
A control terminal may be provided in the on / off time ratio control circuit 20, and the on / off of the control circuit 20 may be controlled by a control signal.

(2) In the above embodiment, the case where the present invention is applied to a starting circuit for starting the on / off time ratio control circuit 20 has been described. However, the present invention is not limited to such a start-up circuit, but can be applied to general start-up circuits that require an input capacitor to suppress fluctuations in the power supply voltage. In this case, it does not matter whether the source of the fluctuation of the power supply voltage is on the activation target side or on the activation power supply side.

(3) In addition, it is a matter of course that the present invention can be variously modified and implemented without departing from the gist thereof.

[0067]

[Effect of the invention] As described in detail above, according to the invention,
It is possible to provide a starting circuit capable of eliminating troublesome work of setting circuit constants when changing the time constant for preventing inrush current.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a configuration of an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a configuration of a conventional startup circuit.

FIG. 3 is a signal waveform diagram for explaining an operation of a conventional startup circuit.

FIG. 4 is a signal waveform diagram for explaining the operation of one embodiment.

[Explanation of symbols]

Reference numeral 10: start circuit, 20: ON / OFF time ratio control circuit, 1
DESCRIPTION OF SYMBOLS 1 ... Inrush current prevention part, 12 ... Start delay part, V0 ... Start-up power supply, R0, R1, R2, R3 ... Resistance, D0 ... Zener diode, D1 ... Diode, Q0 ... FET, Q1,
Q2: Transistor.

Continued on the front page (51) Int.Cl. ⁶ Identification code FI H02M 3/155 H02M 3/155 S

Claims (1)

(57) [Scope of request for utility model registration] Claims: 1. A battery for charging by a power supply for activation.
An input capacitor connected to the power supply, a current limiting resistor for limiting a current flowing from the start-up power supply to the input capacitor when charging the input capacitor, and when a charging voltage of the input capacitor reaches a predetermined value, A starting circuit comprising: a resistance short-circuit means for short-circuiting both ends of a current limiting resistor; and a starting delay means for activating a start target when both ends of the current limiting resistor are short-circuited by the resistance short-circuit means.