JPS605375Y2 - Luminescent memory power supply - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a so-called backup power supply device for preventing the storage contents of the memory from being lost when the power of an electronic device having a volatile memory is turned off.

Generally, this type of backup power supply device is equipped with a battery, and when the electronic device is turned off and the DC power supply from the regular power supply is interrupted, the battery supplies DC power to the volatile memory, and the memory is Configured to maintain stored content.

Moreover, when DC power is first supplied to this type of volatile memory, its stored contents are confused.

For this reason, a pulse is generated based on the rise of the first supplied DC power, and this pulse is applied to the memory as a reset pulse to clear the memory contents.

Therefore, devices of this type are usually equipped with a pulse generation circuit for generating such pulses and applying them to the memory.

This pulse generating circuit generates a pulse having a predetermined peak value by utilizing the transient characteristics of the voltage at the rise of the supplied DC power, and is generally formed by a differentiating circuit or the like.

On the other hand, the supply voltage of the above-mentioned backup battery gradually decreases during use.

If the supply voltage decreases below a certain value, the volatile memory will no longer be able to maintain its memory.

As a result, if the power of the electronic device is turned off in such a state, the stored contents of the memory will be lost and the electronic device will be in a confused state.

Then, when the electronic device is turned on again,
A reset pulse is generated by the above-mentioned pulse generation circuit based on the rise of the DC power supplied from the commercial power supply and is applied to the memory.

However, at this time, the pulse generating circuit is supplied with DC power as described above.

Although the DC power supplied by this battery is insufficient to maintain the stored contents of the memory, the capacitors included in the differentiating circuit that form the pulse generation circuit are able to maintain the reduced supply voltage level. It accumulates a charge that maintains the .

As a result, when the pulse generation circuit creates a reset pulse based on the rising edge of the DC power supplied from the commercial power supply as described above, the range of voltage transient characteristics is limited, and the peak value is not sufficient for the reset pulse. It is no longer possible to create pulses with

Therefore, when the supply voltage of the backup battery decreases, the memory contents are not cleared when the electronic device is turned on again, resulting in a confused state.

The present invention has been developed in view of these points, and the present invention will be explained below with reference to drawings of embodiments.

Figure 1 is a circuit diagram of the device according to the present invention, in which 1 is a common power supply, 2
3 is a backup battery, and 3 is a pulse generation circuit.

4 is a first switching circuit constituting one of the main parts of the present invention, and 5 is a second switching circuit constituting the other main part of the present invention.

Reference numeral 6 denotes a power switch for turning on and off the power of electronic equipment (not shown) to which the present device is applied, and is shown here as a switch for turning on and off the common power supply 1.

Further, as a predetermined voltage value required to maintain storage in a volatile memory (not shown), an example of 5V, which is generally referred to as a TTL level, will be explained here.

Therefore, the voltage level at which the memory cannot maintain storage will be explained here as being 3 or less.

A 5V supply power outputted from the common power supply 1 is outputted to a terminal 10 via a diode 7 and a resistor 8, and a line 9.

This terminal 10 is connected to a volatile memory (not shown), and DC power supplied from the line 9 is applied to this memory.

Further, 11 connected to the line 9 is a Zener diode for stabilizing the output voltage.

The above-mentioned pulse generating circuit 3 is connected to the line 9 and sends out a reset pulse from the terminal 13.

Therefore, the terminal 13 is connected to a clear terminal of a memory (not shown).

The pulse generating circuit 3 includes an AND gate 31 and a capacitor 32
and a resistor 33, which are well known in the art.

This capacitor 32 and resistor 33 form the already mentioned differentiating circuit.

Therefore, the reset pulse output from the terminal 13 causes both inputs 1 and 2 of the hour gate 31 to be at a high level (
(hereinafter simply referred to as H99).

That is, when the power switch 6 is closed and the regular power supply 1 is turned on, and 5cm of DC power appears on the line 9, the voltage is increased until the capacitor 32 of the pulse generation circuit 3 is completely charged. Input 2 of AND gate 31 is H
“becomes.

At this time, the input 1 of the AND gate 31 immediately becomes "Htt" due to the appearance of DC power on the line 9, so that a reset pulse of "H" appears at the output of the AND gate 31.

On the other hand, DC power output from the backup battery 2 is always supplied to the second switching circuit 5 via the terminal 51.

The second switching circuit 5 includes a diode 5 for backflow prevention.
2. It is composed of a transistor 53 for switching, a diode 54 for temperature guarantee, resistors 55, 56, 57, and 58, and a return resistor 59 for DC return.

The transistor 53 receives the DC power supplied from the terminal 51 and the terminal 60 if the commercial power supply 1 is on.
The power is supplied by the DC power supplied by the DC power supply.

In this case, if the battery 2 is rechargeable, a charging current is supplied from the common power supply 1 via the diode 52 and the resistor 55.

The transistor 53 has a resistor 56.58 and a diode 54.
Bias is applied by the voltage division ratio between the series combined resistance value of the internal resistance of the resistor 58 and the series combined resistance value of the internal resistance of the diode 54.

This bias is set so that the transistor 53 is turned on when the supply voltage of the DC power supplied from the battery 2 is 4 V or more.

Further, a return resistor 59 is connected to the base of the transistor 53, and its value is set so as to turn the transistor 53 off when the voltage supplied to the memory appearing on the line 9 drops below 3V. There is.

That is, the resistor 59 is provided to give the transistor 53 a hysteresis characteristic as shown in FIG. 2, and its value is set to a value sufficiently larger than that of the resistor 56.

The hysteresis characteristics shown in FIG. 2 are exemplified here in the case where the transistor 53 is turned off when the supply voltage input from the terminal 51 is 3V, and turned on when the supply voltage is 4V.

This hysteresis characteristic is set in order to turn off the transistor 53 and maintain this off state when the supply voltage input from the terminal 51 decreases to the point where it is no longer possible to maintain the contents stored in the memory.

That is, if the hysteresis characteristic were not provided, even if the transistor 53 is turned off due to a drop in the input supply voltage, it will be turned on again because the battery 2 performs some voltage circuit during this off state. This is because the operation of immediately turning off is repeated.

Therefore, it goes without saying that the setting value of the above-mentioned hysteresis characteristic is changed as appropriate in consideration of these matters.

On the other hand, the first switching circuit 4 includes a diode 41, a transistor 42, and resistors 43 and 44.

The transistor 42 is biased by the internal resistance of the diode 41, the resistance 43, the resistance 44, and the collector-emitter resistance of the transistor 53 of the second switching circuit 5.

This bias value is set so that when the switch 6 is closed and the common power source 1 is turned on and DC power is supplied from the terminal 60, the transistor 42 is turned off.

Further, when the common power source 1 is turned off, the transistor 42 is set to be turned on.

As described above, the present power supply device constituted by the first and second switching circuits 4.5, the diode 7, the resistor 8, and the Zener diode 11 operates as follows.

First, if the voltage of the backup battery 2 is greater than or equal to a voltage value sufficient to maintain the stored contents of the memory, the transistor 53 of the second switching circuit 5 is maintained in the on state.

At this time, when the power supply switch 6 controls the power source 1 to be turned on or off, the transistor 42 of the first switching circuit 4 is turned off or turned on in response to this control operation.

As a result, if the common power supply 1 is in the on state, the transistor 42 is turned off, and the DC power output from the common power supply 1 appears on the line 9 that supplies power to the memory via the terminal 10.

Next, when the voltage of the backup battery 2 drops to a voltage value that allows the storage contents of the memory to be maintained, the transistor 53 of the second switching circuit 5 is maintained in an off state.

Therefore, the transistor 4 of the first switching circuit 4
2 does not turn on even if the common power supply 1 is turned off,
No DC power appears on line 9.

Further, when the common power supply 1 is turned on, the transistor 53 of the second switching circuit 5 is turned on, but
Since the transistor 42 of the first switching circuit 4 is turned off, the DC power output from the commercial power supply 1 appears on the line 9.

As a result, when the supply voltage of the battery 2 drops below a voltage value sufficient to maintain the stored contents of the memory, no DC power appears on the line 9 while the common power supply 1 is in the OFF state.

It appears for the first time when the common power supply 1 is turned on.

Therefore, in this case, DC power ranging from 0 to 5 V appears on the line 9 depending on the on/off state of the common power source.

This means that the already mentioned pulse generating circuit 3 reliably generates a reset pulse at the same time as the regular power supply 1 is turned on when the voltage of the battery 2 drops.

As described above, according to the device of the present invention, when the backup battery voltage drops below a voltage value sufficient to maintain the stored contents of the memory, the stored contents of the memory can be cleared each time the regular power is turned on again. It is something that can be done.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of a device according to an embodiment of the present invention, and FIG. 2 is a characteristic diagram of main parts of the device according to the embodiment. 1...Common power supply circuit, 2...Battery, 3
...Pulse generation circuit, 4...First switching circuit, 5...Second switching circuit,
6...Switch.

Claims (1)

[Claims for Utility Model Registration] In an electronic device including a volatile memory, there is provided a common power supply circuit that supplies DC power having a predetermined voltage value so that the memory maintains its stored contents; and a common power supply circuit that supplies direct current power to the memory from the common power supply circuit. a switch that selectively supplies DC power; a battery that outputs DC power of the same voltage value as the predetermined voltage value regardless of the operation of the switch; a first switching circuit that supplies DC power of a DC power supply circuit to at least the memory and controls connection/disconnection of a power supply line from the DC power supply circuit to the memory so as to cut it off when the DC power supply circuit is in an on state; When the output voltage of the circuit drops below the predetermined voltage value, the first switching circuit is kept in the disconnected state; and when the voltage value is appropriately higher than the predetermined voltage value, the first switching circuit is in the disconnected/connected state. a second switching circuit that switches according to the on/off state of the regular power supply circuit, and a pulse that creates a pulse based on the rise of the DC power supplied to the memory and applies this pulse to the memory as a reset pulse. A volatile memory power supply device comprising a generation circuit.