JPH062715U - Semiconductor device - Google Patents

Abstract

(57) [Summary] [Object] To easily form a large-capacity capacitor on an IC chip substrate by using a conventional process without hindering the integration of elements. [Structure] A lower electrode 7 is formed on a passivation film 2 for protecting an element of an IC chip substrate 1, an upper electrode 9 is formed on the lower electrode 7 via an interlayer insulating film 8, and a final passivation film 10 is formed thereon. To do. The lower electrode 7 and the upper electrode 9 are connected to the wirings 3 and 4 on the substrate via the contacts 11 and 12, respectively. [Effect] According to the above configuration, since the capacitor is formed between the passivation films, it is possible to increase the capacity without hindering the integration of the IC.

Description

[Detailed description of the device]

[0001]

[Industrial applications]

 The present invention relates to a semiconductor device, and more particularly to the configuration of a capacitor (capacitor) provided on an IC chip substrate.

[0002]

[Prior art]

 Recently, with the integration of memories and the like on an IC chip substrate, a large-capacity capacitor has been required. As a matter of course, the area occupied by the capacitor on the chip substrate is required in comparison with the increase in the capacitance of the capacitor, which hinders the integration of the IC.

[0003]

[Problems to be solved by the device]

 However, since the above-mentioned capacitors must coexist with other elements on the IC chip substrate, there is a limit to their large capacity, and the integration of IC and the large capacity of capacitors are inversely proportional. You have to sacrifice one or the other. Further, making the structure of the capacitor complicated such as making the shape wavy has a problem that the process becomes difficult.

[0004]

[The purpose of the device]

 An object of the present invention is to provide a semiconductor device which can easily form a large-capacity capacitor by using a conventional process without completely hindering the integration of elements.

[0005]

[Means for Solving the Problems]

 A semiconductor device according to the present invention comprises a first passivation film formed to cover the entire upper surface of a chip substrate and wiring formed thereon, and a lower electrode formed on the first passivation film. A structure including an interlayer film formed to cover the lower electrode, an upper electrode facing the lower electrode and formed on the interlayer film, and a second passivation film covering the upper electrode. It is a summary.

[0006]

[Action]

 According to the above configuration, since the capacitor is formed between the passivation films, it is possible to increase the capacity without hindering the integration of IC.

[0007]

【Example】

 1 and 2 show an embodiment of the present invention. In the figure, 1 is an IC chip substrate, and 2 is a passivation film formed so as to cover the entire surface of the substrate in order to protect the elements of the IC chip. Capacitor electrode wirings 3 and 4 are formed in advance on the lower side of this film together with other wirings 5. Moreover, the portion of the pad 6 for taking out the wiring outside the IC is exposed by etching.

The present embodiment shows an example in which one capacitor is formed on the passivation film 2. As a forming method, first, a contact hole communicating with the electrode wirings 3 and 4 is provided in the passivation film 2, then a metal layer of the lower electrode 7 is formed on the passivation film 2, and the contact electrode is formed on the lower electrode 7. , An interlayer insulating film 8 is formed by a CVD method or the like, a metal layer of an upper electrode 9 is further formed on the interlayer insulating film 8 so as to face the lower electrode 7, and a final passivation film 10 is formed thereon. The pad 6 is exposed by etching. Reference numeral 11 is a contact connected to the lower electrode wiring 3, and 12 is a contact connected to the upper electrode wiring 4.

The passivation film 2 and the final passivation film 10 have the same film quality, and by etching the interlayer insulating film 8 of the capacitor in advance, the pad 6 can be etched once. If the passivation film 2 is flattened by a technique such as an etch back, the characteristics of the capacitor will be further improved.

Further, it is possible to form a plurality of capacitors by appropriately changing the shape of the capacitors at the positions of the contacts for the electrode wirings 3 and 4. Of course, in that case, the capacity per unit becomes smaller, but considering the fabrication of a capacitor in an IC chip by the conventional method, it is possible to obtain a large capacity that cannot be compared. Furthermore, by combining with the conventional technology for forming large-capacity capacitors, it is possible to further increase the capacity.

[0011]

[Effect of device]

 According to the present invention, a large-capacity capacitor can be obtained by forming the capacitor between the passivation films, and the capacitor can be substantially removed from the IC layout. Therefore, it becomes possible to form a large-capacity capacitor, and moreover, not only does the degree of integration of the IC remain unchanged, but further integration of the IC can be achieved. In addition, the capacitor can be formed by a very easy process, which is suitable for mass production.

[Brief description of drawings]

FIG. 1 is a plan view of a semiconductor device showing an embodiment of the present invention.

FIG. 2 is a cross-sectional view taken along line X-X ′ of FIG.

[Explanation of symbols]

 1 IC Chip Substrate 2 Passivation Film 3 Lower Electrode Wiring 4 Upper Electrode Wiring 5 Other Metal Wiring 6 Pad 7 Lower Electrode 8 Interlayer Insulation Film 9 Upper Electrode 10 Passivation Film 11, 12 Contacts

Claims (1)

[Scope of utility model registration request] 1. A first passivation film formed so as to cover the entire upper surface of a chip substrate and wiring formed thereon, a lower electrode formed on the first passivation film, and the lower electrode. A semiconductor device comprising: an interlayer film formed so as to cover the upper electrode, an upper electrode facing the lower electrode and formed on the interlayer film, and a second passivation film covering the upper electrode. .