JPH06244642A - Modulator - Google Patents
ModulatorInfo
- Publication number
- JPH06244642A JPH06244642A JP50A JP4999193A JPH06244642A JP H06244642 A JPH06244642 A JP H06244642A JP 50 A JP50 A JP 50A JP 4999193 A JP4999193 A JP 4999193A JP H06244642 A JPH06244642 A JP H06244642A
- Authority
- JP
- Japan
- Prior art keywords
- diode
- output
- transistor
- resistor
- collector
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【0001】[0001]
【発明の技術分野】本発明は差動結合トランジスタを用
いた変調器の改良に関する。FIELD OF THE INVENTION The present invention relates to improvements in modulators using differentially coupled transistors.
【0002】[0002]
【従来技術と問題点】図1の従来技術の、電源VC ,V
E で適切にバイアスされた、差動結合NPNトランジス
タ2,3を用いた変調器は、つぎのように動作する。互
いに逆相の代表的には矩形波である、一対の搬送波
V7 ,V8 が搬送波発生源7,8により、トランジスタ
2,3のベースに印加され、トランジスタ2,3は交互
に高導通状態と低導通状態を繰り返す。変調信号源1か
らの変調入力電流I1 は、その実質的部分を高導通状態
のトランジスタに分流されるから、トランジスタ3のコ
レクタに接続された抵抗4には、入力電流で変調された
搬送波が出力される。出力電圧の交流部分のみ所望の場
合は、減結合コンデンサ5を介して負荷6に電圧出力V
6 を取り出す。2. Prior Art and Problems: Prior art power supplies V C , V of FIG.
A modulator with differentially coupled NPN transistors 2 and 3, properly biased at E , operates as follows. A pair of carrier waves V 7 and V 8 having mutually opposite phases, which are typically rectangular waves, are applied to the bases of the transistors 2 and 3 by the carrier generation sources 7 and 8, and the transistors 2 and 3 are alternately turned on. And the low conduction state is repeated. Modulation input current I 1 from the modulation signal source 1, since is diverted its substantial part to the transistor of the high conductive state, the resistor 4 which is connected to the collector of the transistor 3 is modulated carrier wave input current Is output. When only the AC portion of the output voltage is desired, the voltage output V is output to the load 6 via the decoupling capacitor 5.
Take out 6 .
【0003】前記図1の回路では、特に入力電流が低い
とき、搬送波がトランジスタ3のコレクタ・ベース間イ
ンピーダンスを介して漏洩し、被変調搬送波である電圧
出力に重畳するから、特に入力電流が低いとき、該電圧
出力の信号対雑音比を低下させる。その様子を図2に示
す。In the circuit of FIG. 1, particularly when the input current is low, the carrier wave leaks through the collector-base impedance of the transistor 3 and is superimposed on the voltage output which is the modulated carrier wave, so that the input current is particularly low. At this time, the signal-to-noise ratio of the voltage output is reduced. The situation is shown in FIG.
【0004】図には、時間軸を互いに対応させて、入力
電流I1 と搬送波電圧V8 、電圧出力V0 が示してあ
る。時刻t以降はI1が略0であるにもかかわらずV6に
V8 の漏洩成分が現われており、雑音出力となり、信号
対雑音比が劣化する。また、この漏洩と等価な信号を逆
極性となるように導入して漏洩を相殺する方法もある
が、そのための構造が複雑である。In the figure, the input current I 1 , the carrier voltage V 8 and the voltage output V 0 are shown with their time axes corresponding to each other. After time t, the leak component of V 8 appears in V 6 even though I 1 is almost 0, and it becomes a noise output, and the signal-to-noise ratio deteriorates. There is also a method of canceling the leakage by introducing a signal equivalent to this leakage so as to have a reverse polarity, but the structure for that is complicated.
【0005】[0005]
【発明の目的】従って本発明の目的は、簡単な構造で搬
送波漏洩の少ない変調器により上記の問題点を解消する
ことにある。SUMMARY OF THE INVENTION Therefore, an object of the present invention is to solve the above problems by a modulator having a simple structure and a small carrier leakage.
【0006】[0006]
【発明の概要】本発明の一実施例では、出力を与えるト
ランジスタのコレクタにダイオードを接続し、出力はダ
イオードを介しておこなう構成とされる。ダイオードの
向きはトランジスタのベース・コレクタ接合の向きと逆
にされるから、トランジスタのベースよりダイオードの
出力側端子までのインピーダンスは高く保たれるので、
搬送波の漏洩は減少する。一方被変調電流へのダイオー
ドの影響は実質上ないから、電圧出力の信号対雑音比は
向上する。SUMMARY OF THE INVENTION In one embodiment of the present invention, a diode is connected to the collector of a transistor that provides an output, and the output is performed via the diode. Since the direction of the diode is reversed from the direction of the base-collector junction of the transistor, the impedance from the base of the transistor to the output side terminal of the diode is kept high,
Carrier leakage is reduced. On the other hand, there is virtually no effect of the diode on the modulated current, which improves the signal-to-noise ratio of the voltage output.
【0007】[0007]
【発明の実施例】図3は本発明の一実施例の変調器の概
略回路図である。図1におけると同様の機能を有する素
子には同じ参照番号を付してある。図1の従来技術と異
る点はトランジスタ8のコレクタと抵抗4の間にダイオ
ード9が介挿されている点である。出力はダイオード9
と抵抗4の接続点から取り出される。FIG. 3 is a schematic circuit diagram of a modulator according to an embodiment of the present invention. Elements having the same function as in FIG. 1 are given the same reference numbers. The difference from the prior art of FIG. 1 is that a diode 9 is inserted between the collector of the transistor 8 and the resistor 4. Output is diode 9
And the resistor 4 are taken out from the connection point.
【0008】ダイオード9は1つあるいは複数のダイオ
ードを直列接続したものであってもよいが、トランジス
タ8のベース・コレクタ・ダイオードと逆極性となるよ
うに接続される。従ってトランジスタ8のベースから出
力への経路に逆直列接続されたダイオード接合が介在す
るので、この経路のインピーダンスは高められ、従って
搬送波の出力への漏洩が減少する。The diode 9 may be one or a plurality of diodes connected in series, but is connected so as to have a polarity opposite to that of the base-collector diode of the transistor 8. Therefore, because the base-to-output path of transistor 8 is intervened by an anti-series connected diode junction, the impedance of this path is increased, thus reducing carrier leakage to the output.
【0009】図4は本発明の他の実施例の概略回路図で
ある。図3の実施例におけると同様の機能を有する素子
には同じ参照番号を付してある。図4の実施例では、ト
ランジスタ7の出力を取り出すため、そのコレクタと電
源との間に抵抗4とダイオード9に対応して抵抗10と
ダイオード11の直列回路が挿入されている。各ダイオ
ード9、11の陽極からそれぞれ減結合コンデンサ5、
12を介して出力が取り出され、演算増幅14、抵抗6
と抵抗13とから成る増幅器に入力され、信号出力とし
て送出される。抵抗13は演算増幅器14の非反転入力
端子と出力端子間に介挿され、抵抗6は演算増幅器14
の非反転入力端子と接地間に介挿される。抵抗4、10
は互いに等しい抵抗値をもち、抵抗6、13は互いに等
しい抵抗値を有する。FIG. 4 is a schematic circuit diagram of another embodiment of the present invention. Elements having the same functions as in the embodiment of FIG. 3 are given the same reference numbers. In the embodiment of FIG. 4, in order to take out the output of the transistor 7, a series circuit of a resistor 10 and a diode 11 is inserted between the collector of the transistor 7 and the power source, corresponding to the resistor 4 and the diode 9. From the anode of each diode 9, 11 to the decoupling capacitor 5,
An output is taken out via 12, and an operational amplifier 14 and a resistor 6 are provided.
It is input to the amplifier composed of the resistor 13 and the resistor 13 and is output as a signal output. The resistor 13 is interposed between the non-inverting input terminal and the output terminal of the operational amplifier 14, and the resistor 6 is the operational amplifier 14.
Is inserted between the non-inverting input terminal and the ground. Resistance 4, 10
Have the same resistance value, and the resistors 6 and 13 have the same resistance value.
【0010】従来技術においても(即わち図4の回路で
ダイオード9、11を短絡除去しても)、搬送波の洩れ
減少効果が相殺効果により得られるが、図4の回路で
は、さらに洩れの減衰が大きい。Even in the prior art (immediately, even if the diodes 9 and 11 are removed by short-circuiting in the circuit of FIG. 4), the effect of reducing the leakage of the carrier wave is obtained by the canceling effect, but in the circuit of FIG. Large attenuation.
【0011】図5に、さらに別の実施例を示す。図3の
回路におけると同様の機能を有する素子には同じ参照番
号を付してある。本実施例では、ダイオード9は2個の
ショットキー・ダイオードを直列接続したものを用いて
いる。変調入力電流I1 を与えるため増幅器52、抵抗
54を設けている。入力信号は電圧V1 として市販の演
算増幅器OP−07である演算増幅器52の非反転入力
端子51に与える直流から10kHzまでの電圧であ
る。FIG. 5 shows still another embodiment. Elements having the same function as in the circuit of FIG. 3 are given the same reference numbers. In this embodiment, the diode 9 is formed by connecting two Schottky diodes in series. An amplifier 52 and a resistor 54 are provided to provide the modulation input current I 1 . The input signal is a voltage from DC to 10 kHz applied to the non-inverting input terminal 51 of the operational amplifier 52, which is a commercially available operational amplifier OP-07, as the voltage V 1 .
【0012】変調信号についての回路動作を与える場合
は、インダクタンス53、55(それぞれ10μH)は
短絡除去して考えて良い。変調入力電流I1 は抵抗54
(100Ω)に流れる電流であり、増幅器52、抵抗5
9、インダクタンス55、トランジスタ2、増幅器52
を経る帰還路により、V1 /100に規制される。な
お、抵抗59(215Ω)とダイオード60はトランジ
スタ2のベース・エミッタ逆バイアスの保護をおこな
う。When the circuit operation for the modulation signal is given, the inductances 53 and 55 (10 μH each) can be considered by removing the short circuit. The modulation input current I 1 is applied to the resistor 54
The current flowing in (100Ω), the amplifier 52, the resistor 5
9, inductance 55, transistor 2, amplifier 52
The feedback path through the, is restricted to V 1/100. The resistor 59 (215Ω) and the diode 60 protect the base / emitter reverse bias of the transistor 2.
【0013】一方搬送波発生源7、8はECL回路であ
り、結合コンデンサ57、58を介して、20MHzの
矩形波電圧出力を互いに逆相でトランジスタ2、3(い
ずれも2SC3357)のベースへ印加する。それらベ
ース間の抵抗は50Ω程度で、ベース間搬送波電圧の大
きさは約0.4Vピーク・ピークである。搬送波に関す
る回路動作を考える場合は、インダクタンス53、55
は開放除去してよい。On the other hand, the carrier generation sources 7 and 8 are ECL circuits, and apply rectangular wave voltage outputs of 20 MHz to the bases of the transistors 2 and 3 (both are 2SC3357) in opposite phases via the coupling capacitors 57 and 58. . The resistance between the bases is about 50Ω, and the magnitude of the carrier voltage between the bases is about 0.4V peak-peak. When considering the circuit operation related to the carrier wave, the inductances 53, 55
May be removed openly.
【0014】抵抗4(56.2Ω)、減結合コンデンサ
5(0.1μF)を介して取り出された出力は低域濾波
器65で濾波され約20MHzの信号として抵抗6(5
0Ω)に与えられる。ダイオード9を短絡除去すると漏
洩搬送波のレベルは約10倍になるThe output taken out through the resistor 4 (56.2Ω) and the decoupling capacitor 5 (0.1 μF) is filtered by the low-pass filter 65 and the resistor 6 (5
0Ω). If the diode 9 is short-circuited and removed, the level of the leaked carrier wave will increase about 10 times
【0015】[0015]
【発明の効果】本発明の実施により、変調器の出力に対
する搬送波の漏洩が、簡単な構成で抑止されるので、出
力信号の信号対雑音比が向上し、実用に供して有益であ
る。なお、例示の回路の素子は、その型式やその他に限
定するものでなく、さらに広範囲の素子値をとることが
できるし、必要に応じて本発明の要旨を失うことなく回
路上の変形も許容される。By implementing the present invention, the leakage of the carrier wave to the output of the modulator is suppressed by a simple structure, so that the signal-to-noise ratio of the output signal is improved, which is useful for practical use. It should be noted that the elements of the illustrated circuit are not limited to the type and others and can take a wider range of element values, and if necessary, modifications on the circuit are allowed without losing the gist of the present invention. To be done.
【図1】従来技術の変調器の一実施例の回路図である。FIG. 1 is a circuit diagram of one embodiment of a prior art modulator.
【図2】図1の回路の各部の信号波形を示す波形図であ
る。FIG. 2 is a waveform diagram showing signal waveforms of various parts of the circuit of FIG.
【図3】本発明の一実施例の概略回路図である。FIG. 3 is a schematic circuit diagram of an embodiment of the present invention.
【図4】本発明の別の実施例の概略回路図である。FIG. 4 is a schematic circuit diagram of another embodiment of the present invention.
【図5】本発明のさらに別の実施例の概略回路図であ
る。FIG. 5 is a schematic circuit diagram of still another embodiment of the present invention.
1:変調信号源 7,8:搬送波発生源 1: Modulation signal source 7, 8: Carrier wave generation source
Claims (1)
力され、互いに逆相の搬送波をそれぞれのベースに印加
された差動結合トランジスタ対の少なくとも一方のコレ
クタからダイオードを介して出力信号を得る変調器。1. Modulation for obtaining an output signal through a diode from at least one collector of a differential coupling transistor pair in which modulated signals are input to mutually connected emitters and carrier waves having mutually opposite phases are applied to respective bases. vessel.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP50A JPH06244642A (en) | 1993-02-16 | 1993-02-16 | Modulator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP50A JPH06244642A (en) | 1993-02-16 | 1993-02-16 | Modulator |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH06244642A true JPH06244642A (en) | 1994-09-02 |
Family
ID=12846483
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP50A Pending JPH06244642A (en) | 1993-02-16 | 1993-02-16 | Modulator |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH06244642A (en) |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60127126A (en) * | 1983-12-14 | 1985-07-06 | Matsushita Electric Works Ltd | Structure of molding die |
JPS60127127A (en) * | 1983-12-14 | 1985-07-06 | Matsushita Electric Works Ltd | Structure of molding die |
JPS6388413U (en) * | 1986-11-28 | 1988-06-08 | ||
JPH0452021U (en) * | 1990-09-07 | 1992-05-01 | ||
JPH04296518A (en) * | 1991-03-26 | 1992-10-20 | Fuji Electric Co Ltd | Transfer mold and semiconductor device |
JPH04310715A (en) * | 1991-04-09 | 1992-11-02 | Polyplastics Co | Injection molding method, injection molding die and injection molded product |
JPH06198671A (en) * | 1992-12-28 | 1994-07-19 | Sekisui Chem Co Ltd | Manufacture of injection molded product |
JPH077917U (en) * | 1993-07-08 | 1995-02-03 | 旭化成工業株式会社 | Injection mold |
-
1993
- 1993-02-16 JP JP50A patent/JPH06244642A/en active Pending
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60127126A (en) * | 1983-12-14 | 1985-07-06 | Matsushita Electric Works Ltd | Structure of molding die |
JPS60127127A (en) * | 1983-12-14 | 1985-07-06 | Matsushita Electric Works Ltd | Structure of molding die |
JPS6388413U (en) * | 1986-11-28 | 1988-06-08 | ||
JPH0452021U (en) * | 1990-09-07 | 1992-05-01 | ||
JPH04296518A (en) * | 1991-03-26 | 1992-10-20 | Fuji Electric Co Ltd | Transfer mold and semiconductor device |
JPH04310715A (en) * | 1991-04-09 | 1992-11-02 | Polyplastics Co | Injection molding method, injection molding die and injection molded product |
JPH06198671A (en) * | 1992-12-28 | 1994-07-19 | Sekisui Chem Co Ltd | Manufacture of injection molded product |
JPH077917U (en) * | 1993-07-08 | 1995-02-03 | 旭化成工業株式会社 | Injection mold |
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