JPH0831745B2 - Double balanced modulation circuit - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a double balanced modulation circuit based on a differential amplifier circuit composed of transistors, and in particular, whether a carrier wave input is balanced or unbalanced. The present invention relates to a double balanced modulation circuit that can handle both of them.

(Prior Art) Fig. 3 shows "Analysis and Design of Analog Integrated" co-authored by Paul R. Gray and Robert G. Meyer.
Circuits "(Second Edition 1984 John Wileys & Son
s) and the Gilbert multiplier cell shown in Fig. 10.9 on page 593, which is the basis of the double-balanced modulation circuit targeted by the present invention.

This Gilbert multiplier cell consists of two transistor pairs (1,2) and the same (3,
In 4), the bases of the transistors 1 and 4 and the bases of the transistors 2 and 3 are connected to each other, and each connection point is connected to one of the input terminal pairs (80, 81). The collectors of 3 and the collectors of the transistors 2 and 4 are connected to each other, and the connection points thereof are connected to the output terminal pair (82, 83).
Further, a transistor 13 is provided between the emitter connection point of the transistor pair (1, 2) and the constant current source circuit 70, and a transistor 14 is provided between the emitter connection point of the transistor pair (3, 4) and the constant current source circuit 70. Each base of this transistor pair (13, 14) is connected to the other input terminal pair (100, 101).

According to the above-mentioned book, one balanced signal V ₁ is applied to the input terminal pair (80, 81) and the other balanced signal V _{1 is applied} to the input terminal pair (100, 101).
The relationship between the suction current I ₁ of the output terminal 82 and the suction current I ₂ of the output terminal 83 when ₂ is applied respectively is expressed by the following equation (1).

Here, I _EE is the total current determined by the constant current source circuit 70, and V _T is the voltage determined by the temperature. This voltage V _T is about 26 mV at 300 ° K. And, when the input balanced signals V ₁ and V ₂ are both smaller than the voltage V _T , the equation (1) is Becomes That is, a differential output current proportional to the product of the input balanced signals V ₁ and V ₂ is obtained at the output terminal pair (82, 83).

(Problems to be Solved by the Invention) As described above, the Gilbert multiplier cell is, in principle, a balanced modulation circuit that requires both input signals to be balanced signals.

By the way, of the modulated signal and the carrier signal to be subjected to the balanced modulation, the modulated signal has a relatively low frequency, so that it is normally handled as the balanced signal. On the other hand, since the carrier signal has a high frequency such as VHF band, it is usually handled as an unbalanced signal, but it may be handled as a balanced signal depending on the application.

Therefore, when configuring a double balanced modulation circuit based on Gilbert multiplier cells, if the carrier signal is a balanced signal, it can basically be configured only by Gilbert multiplier cells, but the carrier signal is an unbalanced signal. And it is necessary to add an unbalance / balance conversion circuit for converting it to a balanced signal.

The double-balanced modulation circuit consisting only of Gilbert multiplier cells maintains linearity only when both the balanced signals V ₁ and V ₂ are sufficiently small, as described earlier in the Gilbert multiplier cell. In order to obtain linearity even in the signal, a current feedback resistor (reference numerals 35 and 36 in FIG. 4) between each emitter of the transistor pair (13, 14) shown in FIG. 3 and the constant current source circuit 70. Basically, it is composed of a double balanced differential amplifier circuit.

Incidentally, in this case, only the linearity is improved with respect to the balanced signal V _2, so improving linearity has not been made as to the balanced signal V _1, the balanced signal V ₁ to the input terminal pair (80, 81)
As a balanced carrier signal with a constant envelope is applied as, a modulated signal of which linearity is more important is applied as a balanced signal V ₂ to the input terminal pair (100, 101).

On the other hand, if the carrier signal is an unbalanced signal, apply it to the input terminal pair (80, 81) as it is and output the terminal pair (82, 81).
When one of the output terminals of 83) is used as an unbalanced output terminal, the leakage of the carrier signal contained in the output signal (hereinafter referred to as "carrier leakage") increases, that is, the carrier suppression ratio deteriorates. To do. Therefore, in this case, the unbalance / balance conversion circuit is provided in the preceding stage of the Gilbert multiplier cell as described above. This unbalance / balance circuit can be configured by using a hybrid transformer, but the hybrid transformer is large and expensive, and considering integration into an integrated circuit, it can be configured by a transistor element like the Gilbert multiplier cell. desirable.

By the way, the following two points should be noted when constructing an unbalance / balance conversion circuit of this type. The first point is that carrier leak can be significantly reduced. For that purpose, it is necessary that both output levels of the unbalance / balance conversion circuit are equal and have a phase difference of exactly 180 °. The second and next point is to allow an increase in the linear output level of the modulation output of the Gilbert multiplier cell. This means making effective use of the power supply voltage applied to the Gilbert multiplier cell, but for that purpose, the crest factor of the output waveform of the unbalance / balance conversion circuit is reduced, and both output levels are set to the Gilbert multiplier cell. It is necessary to make sure that the level required to turn on / off the bi-differential pair transistor {transistor pair (1,2) and same (3,4)} is not greatly exceeded.

However, in the conventional case, as shown in FIG. 4, for example, there is no double balanced modulation circuit having an unbalanced / balanced conversion circuit satisfying the above requirements. FIG. 4 shows a phase modulation circuit disclosed in Japanese Patent Laid-Open No. 60-163506, in which a differential amplifier circuit composed of a pair of transistors (5, 6) constitutes an unbalance / balance conversion circuit.

 Considering this conventional circuit, it is as follows.

That is, in the conventional example circuit, since the unbalance / balance conversion circuit is composed of only one stage of the emitter-coupled differential amplifier circuit, the differential output level as the output of the unbalance / balance conversion circuit is sufficiently balanced. In order to ensure the above, the gain of the differential amplifier circuit must be selected high.

Then, the required level of the carrier signal input decreases,
This causes problems such as mixing of interference wave signals and generation of thermal noise. In other words, when an unbalanced / balanced conversion circuit is configured with a single-stage emitter-coupled differential amplifier circuit, balance of differential output levels can be ensured in a low gain state, and the phase is different by exactly 180 °. That is why it is necessary to obtain a signal. Therefore, it is possible to apply emitter current feedback to the differential amplifier circuit.

In this case, the gain of the differential amplifier circuit is reduced and the frequency characteristic is improved, but the output signal level on the in-phase side is lower than the output signal level on the anti-phase side by the amount output through the emitter resistor. That is, a level difference is generated between the two outputs, resulting in an increase in carrier leak. In addition,
As described above, since the frequency characteristics of the differential amplifier circuit are not flat, it is necessary to reset the input signal level to an appropriate level each time the carrier frequency is changed. Further, it is desirable that the unbalance / balance conversion circuit can be integrated with the Gilbert multiplier cell. in addition,
In the conventional circuit, no consideration is given to the second point of the above matters to be noted.

The present invention has been made in view of such conventional problems, and an object thereof is to provide a modulated output regardless of whether a carrier wave input is balanced or unbalanced in a double balanced modulation circuit based on a Gilbert multiplier cell. Provides a double balanced modulation circuit that can increase the linear output level of the device and can further reduce the carrier leak even when the carrier input is unbalanced, and can easily be integrated into an integrated circuit. Especially.

(Means for Solving the Problems) In order to achieve the above object, the double balanced modulation circuit of the present invention has the following configuration.

That is, the double balanced modulation circuit of the present invention includes a first input terminal pair; a second input terminal pair; an output terminal pair;
And a connection point between the emitters of the second transistor and a connection point of the emitters of the third and fourth transistors, respectively, serves as a first input pair so that an applied signal to the first pair of input terminals is input. The bases of the first and fourth transistors, the second transistor
And the bases of the third transistors are connected to each other to form a second input pair, and the collectors of the first and third transistors are connected to each other, and the second and fourth transistors are connected to each other. A double balanced differential amplifier circuit in which the collector-to-collector connection points of the respective collectors are connected to the output terminal pair as an output pair; the second input terminal pair and the second input pair A conversion circuit interposed between the conversion circuit and the conversion circuit, and the conversion circuit includes fifth and sixth transistors that form a differential amplifier circuit, and the bases of the fifth and sixth transistors are the above-mentioned. The applied signal to the second input terminal pair is directly or indirectly input, and the first and second emitter pads are provided between the respective collectors and bases. A Impedance element for appropriately lowering the potential of the connection point where each collector is connected through another resistor by voltage feedback processing from the reference potential is applied to the connection point and the reference potential point. And a collector output of each of them is connected to the second input pair via a third and a fourth emitter follower transistor, respectively.

Furthermore, the double-balanced modulation circuit of the present invention has, in the conversion circuit, a second differential amplifier circuit between the second input terminal pair and the differential amplifier circuit, and the second differential amplifier circuit. Each of the seventh and eighth transistors forming the circuit is characterized in that each emitter has a current feedback resistor, and each base is connected to a voltage supply point of the same bleeder circuit via another resistor. And

(Operation) Next, the operation of the double balanced modulation circuit of the present invention having the above configuration will be described.

A modulated signal which is a balanced signal is applied to the first input terminal pair, and a carrier signal which is either a balanced signal or an unbalanced signal is applied to the second input terminal pair. That is, in the second input terminal pair, when the carrier wave signal is an unbalanced signal, either one of the terminals may be externally grounded at a high frequency.

In the fifth and sixth transistors forming the differential amplifier circuit included in the conversion circuit, voltage feedback processing is performed between the collector and the base via the first and second emitter follower transistors, so that the difference The dynamic amplifier circuit can reduce the gain without impairing the balance of the differential output signal level and can flatten the frequency characteristic.

Further, since an impedance element for appropriately lowering the potential of the connection point where the respective collectors are connected through the respective resistors from the reference potential is interposed between the connection point and the reference potential point, The output amplitude of the differential amplifier circuit is limited, and its crest factor is small. As is well known, this type of double-balanced modulation circuit operates with a positive power supply and operates with a negative power supply. Therefore, the "reference potential" is one of a power supply voltage in the case of a positive power supply, 0 V in the case of a negative power supply, and a circuit formed regardless of whether the power supply is positive or negative.

The impedance element is a resistor, a diode, a diode-connected transistor, or the like.

Further, the respective collector outputs are respectively passed through the third and fourth emitter follower transistors to the second collector output.
Since a large amplitude signal is applied to the second input terminal pair, the output signal of the differential amplifier circuit can be transmitted to the second input pair without distortion. Become.

Thus, the modulated wave signal sent to the output terminal pair has a small carrier leak, that is, a good carrier suppression ratio,
Thermal noise and interference signals are small, and the dynamic range is large.

In the conversion circuit, when the second differential amplifier circuit is provided between the second input terminal pair and the differential amplifier circuit, the balance of the differential output signals of the differential amplifier circuit is further ensured. Therefore, the modulation signal sent to the output terminal pair becomes much better.

As described above, according to the double balanced modulation circuit of the present invention, a dual input terminal pair to which a carrier signal, which is either balanced or unbalanced, is applied, and a dual balanced Gilbert multiplier cell. The converter circuit interposed between the corresponding second input pair of the balanced differential amplifier circuit lowers the gain and flattens the frequency characteristic without impairing the balance of the output level, and limits the output amplitude. Since the crest factor is reduced, it is possible to realize a double balanced modulation circuit having a wide dynamic range, a good carrier suppression ratio, less thermal noise generation, and strong interference. In addition, since the conversion circuit has a flat frequency characteristic and its output amplitude is limited, even if the carrier frequency changes,
It is not necessary to reset the input signal level and the same signal input level can be used.

Further, since it can be configured by a transistor element and a resistor without including a capacitor, it has various excellent effects such as easy integration into an integrated circuit.

(Examples) Examples of the present invention will be described below with reference to the drawings. FIG. 1 shows a double balanced modulation circuit according to an embodiment of the present invention. The same parts as those in FIGS. 3 and 4 are designated by the same reference numerals.

This double-balanced modulation circuit includes a power supply terminal 106 to which a positive power supply is applied and a first input terminal pair (10
0, 101), a second input terminal pair (102, 103) to which a carrier signal having a constant envelope is applied, an output terminal pair (104, 105) to which a modulated wave signal is transmitted, and a double difference that constitutes the Gilbert multiplier cell described above. A pair of transistors (1 to 4) and a differential transistor (13,14),
The emitters of the first transistor 1 and the second transistor 2 are connected to each other, and the emitters of the third transistor and the fourth transistor are connected to each other. 100, 101), the collectors of the transistors 1 and 3 and the collectors of the transistors 2 and 4 are connected to each other as an output pair to the output terminal pair (104, 105). A double-balanced differential amplifier circuit, bases connecting the bases of the transistors 1 and 4 and bases of the transistors 2 and 3 (second input pair), and the input terminal pair (102, 103). ) And a differential transistor (5,
And a conversion circuit according to the present invention having 6).

The differential transistors (13, 14) in the Gilbert multiplier cell are provided with emitter current feedback by resistors 35, 36.

In addition, the constant current source circuit in the Gilbert multiplier cell and the conversion circuit in the preceding stage is a transistor 15
And a resistor 37 and a transistor 16 and a resistor 42, and their bias voltages are given by a diode-connected transistor 17 and a resistor 43 and a resistor 44 which are short-circuited between the collector and the base. Although this embodiment is a double balanced modulation circuit that operates with a positive power supply, when operating with a negative power supply, it is well known that the constant power supply circuit is connected to the negative power supply and the power supply terminal 106 is grounded. Is.

The carrier wave signal is either balanced or unbalanced, and when it is an unbalanced signal, either terminal 102 or 103 is externally grounded at high frequency. This carrier signal is input to each base of the differential transistors (5, 6) forming the differential amplifier circuit via the pair of input terminals (102, 103), and is amplified by this differential amplifier circuit.

In this differential amplifier circuit, the transistor 7 and the resistor 40
A voltage feedback is applied between the collector and the base of the differential transistor (5, 6) via the first emitter follower transistor composed of 5 and the second emitter follower transistor composed of the transistor 8 and the resistor 41, respectively. .

Due to this voltage feedback, the gain of the differential amplifier circuit can be reduced and the frequency characteristic can be flattened without impairing the balance of the output signal level. Although voltage feedback is possible only with the resistors 40 and 41, when the feedback amount is large, the resistance value becomes small and the base-collector voltage of the differential transistors (5, 6) becomes small.

In order to prevent this, the emitter followers by the transistors 7 and 8 are necessary.

In addition, a differential transistor, that is, a fifth transistor 5
And the sixth transistor 6 have independent collector load resistors 32 and 33, respectively.
2, the power source side terminals of the same 33 are commonly connected, and a resistor 34 as an impedance element for causing an appropriate voltage drop is inserted between the common connection point and the power source terminal 106. The presence of the resistor 34 limits the maximum output level of the differential amplifier circuit.

In other words, while maintaining the consistency between the output DC center level of the differential amplifier circuit and the input DC center level of the next-stage bi-differential pair amplifier circuit, the resistance values of the resistors 32 and 33 are reduced, and the output The amplitude can be limited.

The output of this differential amplifier circuit is passed through a third emitter follower transistor consisting of the transistor 9 and the resistor 38 and a fourth emitter follower transistor consisting of the transistor 10 and the resistor 39, and the difference between the Gilbert multiplier cell and the double difference is obtained. It is connected to each base of the active pair transistors (1 to 4). Therefore, the transistors (1-
The maximum value of the voltage applied to each base in 4) is the product of the current value determined by the constant current source circuit composed of the transistor 16 and the resistor 42 and the resistance value of the resistor 34, and the transistors 9 and 10. The voltage is limited to a value lower than the power supply voltage applied to the power supply terminal 106 by the base-emitter voltage of.

The linear range of the Gilbert multiplier cell is limited by the current value of the constant current source circuit composed of the transistor 15 and the resistor 37 and the values of the resistors 35 and 36, and the transistor 1
It is determined by the restrictions of not reversing the base-collector voltage of 3 and 14 and the restrictions of not reversing the base-collector voltage of transistors (1 to 4).

The carrier wave signal applied to the bases of the transistors (1 to 4) is subject to amplitude limitation due to the small values of the resistors 32 and 33, and its crest factor is small. Since the amplitude level is set to a low voltage level, a large output signal amplitude can be obtained by the resistors 30 and 31 under the restriction that the base-collector voltage of the transistors (1 to 4) is not reversed.

Here, the emitter follower between the stages of the transistors 9 and 10 may be replaced by the emitter followers of the transistors 7 and 8, but it is necessary to add a carrier signal with a low crest factor to the Gilbert multiplier cell. I am trying to get a big output by
A large signal is input to the differential amplifier circuit composed of the differential transistors (5, 6). Therefore, transistors 7 and 8
There is a moment when is cut off.

During this cut-off period, the resistance from the base 40, 41
An in-phase output is obtained via the, and distortion occurs and the waveform has a return. Therefore, in addition to the transistors 7 and 8, an interstage emitter follower is required.

In addition, in the circuit of FIG.
Due to the voltage feedback from the input terminal pair (10
2, 103) has a low input impedance and transistor 1
Since 3 and 14 have emitter current feedback,
The input impedance of the input terminal pair (100, 101) is high.

 Next, FIG. 2 shows another embodiment of the present invention.

In the second embodiment, a differential amplifier circuit including the seventh and eighth transistors (11, 12) is further provided in front of the differential amplifier circuit including the differential transistors (5, 6).

In this added differential amplifier circuit, the emitter current feedback is applied by the resistors 47 and 48, so that the gain is small and the frequency characteristic is flat.

The collector load is connected not only to the resistors 45 and 46 but also to the input impedance of the differential amplifier circuit composed of the differential transistors (5, 6) as a load. In the latter, the impedance is reduced by the voltage feedback by the transistors 7 and 8, so that the deterioration of the frequency characteristic due to the collector capacitance of the transistors 11 and 12 is prevented.

The differential amplifier circuit with the differential transistors (11, 12)
Since the emitter current feedback is applied by the resistors 47 and 48, the output balance characteristic by itself is not sufficient, but the differential amplifier circuit by the differential transistors (5, 6) alone performs unbalance / balance conversion. Compared to doing
Overall, it helps to further improve the balance characteristics.

The base voltage of the transistors of all the constant current source circuits including the transistor 18 that constitutes the constant current source circuit for the added differential amplifier circuit is the transistor 17, the resistors 43, and 44.
Given by the bleeder circuit by and input terminal 10
High frequency grounding is performed by a capacitor 90 via 7.

The output impedance of the constant current source circuit seen from the collector can be increased by lowering the impedance of the bleeder circuit connected to the base, but for that purpose it is necessary to pass a large current through the bleeder circuit, and power consumption and thermal design It will be a disadvantage.

The high frequency grounding by the capacitor 90 can increase the high frequency output impedance of the constant current source circuit without these sacrifices. In the differential amplifier using the constant current source circuit,
Since the contact resistance of the emitter exists and the conductance of the transistor is not infinite without applying the emitter current feedback, the gain on the in-phase output side becomes smaller than that on the anti-phase output side. Since this effect can be reduced by increasing the output impedance of the constant current source circuit, the capacitor 90 can reduce the amount of carrier leak.

The base bias of the differential transistors (11, 12) is given from the same bleeder resistors 52 and 53 through resistors 49 and 50, respectively.

By selecting small values for the resistors 49 and 50, the voltage difference applied to the bases of the differential transistors (11, 12) has less variation than when individual bleeder resistors are prepared.

Since the common connection point of the resistors 49 and 50 is high-frequency bypassed by the capacitor 91 via the input terminal 108, the input impedance expected from the input terminal pair (102, 103) is almost determined by the resistors 49 and 50. It becomes a low value. This means that when the entire circuit except capacitors 90 and 91 is composed of a monolithic IC, the input terminal pair (10
2, 103) and the high frequency ground, and the capacitance of the bonding pad exists, and the inductance of the bonding exists in the input terminal pair (102, 103).
It is said that there is an effect that is suppressed by.

(Effects of the Invention) As described above, according to the double balanced modulation circuit of the present invention, the second input terminal pair to which a carrier signal that is either balanced or unbalanced is applied, and the Gilbert multiplier. The conversion circuit interposed between the corresponding second input pair of the double-balanced differential amplification circuit composed of cells lowers the gain and flattens the frequency characteristic without impairing the balance of the output level, and the output. Since the amplitude is limited to reduce the crest factor, it is possible to realize a double balanced modulation circuit that has a large dynamic range, a good carrier suppression ratio, little thermal noise, and is resistant to interference. . In addition, since the conversion circuit has a flat frequency characteristic and its output amplitude is limited, even if the carrier frequency changes,
It is not necessary to reset the input signal level and the same signal input level can be used.

Further, since it can be configured by a transistor element and a resistor without including a capacitor, it has various excellent effects such as easy integration into an integrated circuit.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing one embodiment of the present invention, FIG. 2 is a circuit diagram showing another embodiment of the present invention, FIG. 3 is a circuit diagram showing a Gilbert multiplier cell, and FIG. It is a circuit diagram of a double balance modulation circuit. 1-18 …… transistor, 30-54 …… resistor, 100,101…
… First input terminal pair, 102,103 …… Second input terminal pair, 1
04,105 …… Output terminal pair, 106 …… Power supply terminal, 107,108 ……
Input terminal.

Claims (2)

[Claims] 1. A first input terminal pair; a second input terminal pair; an output terminal pair; emitters of first and second transistors, and emitters of third and fourth transistors, respectively. Each of the emitter-to-emitter connection points serves as a first input pair to which an applied signal to the first input terminal pair is input, and the bases of the first and fourth transistors and the second and third transistors are connected to each other. The bases of the transistors are connected to each other to form a second input pair, and the collectors of the first and third transistors and the collectors of the second and fourth transistors are connected to each other. A double-balanced differential amplifier circuit in which the respective connecting points of the collectors connected to each other are connected to the output terminal pair as an output pair; the second input terminal pair and the second A conversion circuit interposed between two input pairs; and the conversion circuit has fifth and sixth transistors forming a differential amplifier circuit.
The sixth transistor is configured such that each base directly or indirectly receives a signal applied to the second input terminal pair, and the collector and base are respectively connected to the first and second transistors. Is subjected to voltage feedback processing via the emitter-follower transistor of, and an impedance element for appropriately lowering the potential of the connection point where each collector is connected via another resistor from the reference potential Double balanced modulation, characterized in that it is interposed between a potential point and each collector output is connected to the second input pair via a third and a fourth emitter follower transistor, respectively. circuit. 2. The conversion circuit has a second differential amplifier circuit between the second input terminal pair and the differential amplifier circuit, and a seventh differential amplifier circuit constituting the second differential amplifier circuit. The eighth transistor is characterized in that each emitter has a current feedback resistor, and each base is connected to a voltage supply point of the same bleeder circuit via another resistor. The double balanced modulation circuit according to the item (1).