JPS63102503A - Double-balanced modulation circuit - Google Patents

Abstract

PURPOSE:To realize the titled circuit with a large dynamic range and an excellent carrier suppressing ratio by interposing a conversion circuit between 2 2nd input terminal pair receiving either balanced or unbalanced carrier signal and a corresponding 2nd input pair of a double-balanced differential amplifier circuit comprising a Gilbert multiplier cell. CONSTITUTION:An output of the differential amplifier circuit is connected to each base of twin differential pair transistors (TRs) 1-4 of the Gilbert multiplier cell via a 3rd emitter follower TR comprising a TR 9 and a resistor 38 and a 4th emitter follower TR comprising a TR 10 and a resistor 39. A carrier signal fed to the bases of the TRs 1-4 is subjected to amplitude limit because the resistance of resistors 32, 33 is selected to be small, its peak factor is small and the maximum amplitude level is brought to a low voltage level as stated above, then a large output signal amplitude is obtained by resistors 30, 31 under a limit where the base-collector voltage of the TRs 1-4 is not inverted.

Description

Detailed Description of the Invention (Industrial Application Field) The present invention relates to a double-balanced modulation circuit based on a differential amplifier circuit composed of transistors, and in particular, to This invention relates to a double-balanced modulation circuit that can handle both.

(Prior art) Figure 3 shows Paul R. Gray and Robert
'Analysis' co-authored with Mr. G. M'eyer
and Design of Analog Int
egrated C4rcuits” (Second
Edition 1984John Wileys
This is the Gilbert multiplier cell shown in Figlo, 9, published on page 593 of J.D. & 5ons), and is the basis of the double-balanced modulation circuit to which the present invention is directed.

This Gilbert multiplier cell consists of two transistor pairs (1, 2) and (3) whose emitters are connected together.
, 4), the bases of transistors 1 and 4 are connected to each other, and the bases of transistors 2 and 3 are connected to each other, and each connection point is connected to one input terminal pair (80, 81). The collectors of the three transistors are connected to each other, and the collectors of the transistors 2 and 4 are connected to each other, and each connection point thereof is connected to a pair of output terminals (82, 83). Further, a transistor 13 is placed between the emitter connection point of the transistor pair (1, 2) and the constant current source circuit 70, and a transistor 14 is placed between the emitter connection point of the transistor pair (3, 4) and the constant current source circuit 70. The bases of the pair of transistors (13, 14) are connected to the other pair of input terminals (100, 101).

According to the above-mentioned book, the sink current of the output terminal 82 when one balanced signal ■l is applied to the input terminal pair (80, 81) and the other balanced signal ■2 is applied to the input terminal pair (100° 101). The relationship between I□ and the sink current I2 of the output terminal 83 is expressed by the following equation (1).

I s I 2 = I tt (tanh (water box))
[tanh] -----(1) Here, I
RE is the total current determined by the constant current source circuit 70, v
T is a voltage determined by temperature. This voltage V,
is about 26 mV at 300°. And (1) above
The formula is, if the input balanced signal l and v2 are both smaller than the voltage Vt, then V
(2), that is, a differential output current proportional to the product of input balanced signal (1) and (2) is obtained at the output terminal pair (82, 83).

(Problems to be Solved by the Invention) As described above, the Gilbert multiplier cell is, in principle, a balanced modulation circuit that requires both re-input signals to be balanced signals.

By the way, among the modulation signal and carrier signal to be subjected to balanced modulation, the modulation signal has a relatively low frequency, so it is usually treated as a balanced signal. On the other hand, since the carrier wave signal is a high frequency wave such as a VHF band, it is normally handled as an unbalanced signal, but depending on the application, it may be handled as a balanced signal.

Therefore, when configuring a double-balanced modulation circuit based on Gilbert multiplier cells, if the carrier signal is a balanced signal, it can basically be configured only with Gilbert multiplier cells, but if the carrier signal is an unbalanced signal It is necessary to add an unbalanced/balanced conversion circuit to convert it into a balanced signal.

A double-balanced modulation circuit consisting only of Gilbert multiplier cells is capable of generating a balanced signal (1) as described above. Since linearity is maintained only when both 2 are sufficiently small, in order to obtain linearity even with large input signals, we It basically consists of a double-balanced differential amplifier circuit in which a current feedback resistor (see numerals 35 and 36 in FIG. 4) is inserted between the current source circuits 70.

By the way, in this case, only the linearity for the balanced signal 2 has been improved, but the linearity for the balanced signal vl has not been improved, so the balanced signal V is connected to the input terminal pair (80, 81), and the envelope is constant. A balanced carrier wave signal of 2 is applied to the input terminal pair (IOC), 101).
As a result, a modulation signal whose linearity is more important is applied.

On the other hand, if the carrier signal is an unbalanced signal, it is directly applied to the input terminal pair (80, 81), and the output terminal pair (80, 81) is applied as is.
82, 83) as an unbalanced output terminal, the leakage of the carrier signal contained in the output signal (hereinafter referred to as "carrier leak") increases, that is, the carrier wave suppression ratio increases. becomes worse. Therefore, in this case, as described above, an unbalanced/balanced conversion circuit is provided before the Gilbert multiplier cell. This unbalanced/balanced circuit can be constructed using a hybrid transformer, but the hybrid transformer is large and expensive, and considering integrated circuits, it cannot be constructed using transistor elements like the Gilbert multiplier cell. desirable.

By the way, when configuring this type of unbalanced/balanced conversion circuit, the following two points should be kept in mind. 1st
The point is that carrier leakage can be significantly reduced. To do this, it is necessary that both output levels of the unbalanced/balanced conversion circuit are equal and have a phase difference of exactly 180°.The second point of the 0th order is the linear output level of the modulated output of the Gilbert multiplier cell. The goal is to enable an increase in This means making effective use of the power supply voltage applied to the Gilbert multiplier cell, but in order to do so, the crest factor of the output waveform of the unbalanced/balanced conversion circuit must be reduced, and both output levels must be Turn on the double differential pair transistors (transistor pairs (1°2) and (3,4)l).
It is necessary to ensure that the level does not exceed the level required to turn it off.

However, in the past, for example, as shown in Figure 4,
The reality is that there is no double-balanced modulation circuit having an unbalanced/balanced conversion circuit that meets the above requirements.

FIG. 4 shows a phase modulation circuit described in Japanese Patent Application Laid-Open No. 60-163506, in which a differential amplifier circuit composed of a transistor pair (5, 6) constitutes an unbalanced/balanced conversion circuit.

A consideration of this conventional circuit is as follows.

That is, in the conventional circuit, the unbalanced/balanced conversion circuit consists of a single-stage emitter-coupled differential amplifier circuit, so the differential output level output from the unbalanced/balanced conversion circuit has sufficient balance. In order to ensure this, the gain of the differential amplifier circuit must be selected to be high.

In this case, the required level of the carrier signal input decreases, leading to problems such as mixing of interference signals and generation of thermal noise. In other words, when configuring an unbalanced/balanced conversion circuit with a single-stage emitter-coupled differential amplifier circuit,
It is necessary to ensure the balance of the differential output level in a low gain state and to obtain signals whose phases differ by exactly 180°. Therefore, it is possible to apply emitter current feedback to the differential amplifier circuit.

In this case, the gain of the differential amplifier circuit is reduced and the frequency characteristics are improved, but the output signal level on the in-phase side is lower than the output signal level on the opposite-phase side by the amount that is output via the emitter resistor. This results in a level difference between the two outputs, resulting in an increase in carrier leakage. Note that, as described above, since the differential amplifier circuit does not have flat frequency characteristics, it is necessary to reset the input signal level to an appropriate input signal level each time there is a change in the carrier wave frequency. In addition, it is desirable that the unbalanced/balanced conversion circuit can be integrated with the Gilbert multiplier cell.
In the conventional circuit, no consideration is given to the second point mentioned above.

The present invention has been made in view of these conventional problems, and its purpose is to increase the linear output level of the modulated output regardless of whether the carrier wave input to the Gilbert multiplier cell is balanced or unbalanced. It is an object of the present invention to provide a double-balanced modulation circuit which can further reduce carrier leakage even when the carrier input is unbalanced, and which can be easily integrated into an integrated circuit.

(Means for Solving the Problems) In order to achieve the above object, the double balanced modulation circuit of the present invention has the following configuration.

That is, the double-balanced modulation circuit of the present invention has a first input terminal pair; a second input terminal pair; an output terminal pair; emitters of the first and second transistors; A signal applied to the first pair of input terminals is inputted to each emitter-to-emitter connection point where the emitters of the transistors are connected together as a first input pair, and the bases of the first and fourth transistors are connected to each other, A connection point between the bases of the second and third transistors is configured to form a second input pair, and the collectors of the first and third transistors are connected to each other, and the bases of the second and third transistors are connected to each other. a double-balanced differential amplifier circuit in which the collectors of four transistors are connected to each other, and each collector-collector connection point is connected to the output terminal pair as an output pair; the second input terminal pair and the second input terminal pair; a conversion circuit interposed between a pair of inputs; and the conversion circuit includes fifth and sixth transistors forming a differential amplifier circuit, and the fifth and sixth transistors are configured to include:
A signal applied to the second pair of input terminals is directly or indirectly inputted to each base, and a connection between the respective collector bases is provided via first and second emitter follower transistors. An impedance element is provided between the connection point and the reference potential point to appropriately lower the potential of the connection point, which is subjected to voltage feedback processing and whose respective collectors are connected via separate resistors, from the reference potential. connected, and each collector output is connected to the third
and a fourth emitter follower transistor, respectively, to the second input pair.

Furthermore, in the double-balanced modulation circuit of the present invention, in the conversion circuit, a second differential amplifier circuit is provided between the second input terminal pair and the differential amplifier circuit, and the second differential amplifier The seventh and eighth transistors constituting the circuit are characterized in that their respective emitters have current feedback resistors, and their respective bases are connected to the voltage supply point of the same bleeder circuit through separate resistors. shall be.

(Function) Next, the function of the double balanced modulation circuit of the present invention having the above configuration will be explained.

A modulated signal, which is a balanced signal, is applied to the first pair of input terminals, and a carrier wave signal, which is either a balanced signal or an unbalanced signal, is applied to the second pair of input terminals. That is, in the second input terminal pair, if the carrier signal is an unbalanced signal, one of the terminals may be externally grounded to high frequency.

In the fifth and sixth transistors constituting the differential amplifier circuit included in the conversion circuit, voltage feedback processing is applied between the respective collector bases via the first and second emitter follower transistors, so that the differential amplifier circuit is The amplifier circuit can reduce the gain and flatten the frequency characteristics without impairing the balance of the differential output signal level.

In addition, since an impedance element is inserted between the connection point and the reference potential point to appropriately lower the potential of the connection point where each collector is connected via a different resistor from the reference potential, The output amplitude of the differential amplifier circuit is limited, and its crest factor is small. As is well known,
This type of double-balanced modulation circuit operates on a positive power supply;
There are some that operate with a negative power supply. Therefore, the above-mentioned "reference potential" is either (1) a power supply voltage in the case of a positive power supply, (2) O in the case of a negative power supply, or (2) a value formed in a circuit regardless of whether the power supply is positive or negative.

Further, the impedance element is a resistor, a diode, a diode-connected transistor, or the like.

Further, since each collector output is connected to the second input pair via the third and fourth emitter follower transistors, a large amplitude signal is applied to the second input terminal pair. The output signal of the differential amplifier circuit can be transmitted to the second input pair without causing distortion.

In this way, the modulated wave signal sent to the output terminal pair has little carrier leakage, that is, a good carrier wave suppression ratio, little thermal noise and interference signals, and a large dynamic range.

In the conversion circuit, when a second differential amplifier circuit is provided between the second input terminal pair and the differential amplifier circuit, the balance of the differential output signal of the differential amplifier circuit is further ensured. Therefore, the modulated signal sent to the output terminal pair becomes even better.

As explained above, according to the double balanced modulation circuit of the present invention, the second input terminal pair to which either a balanced or unbalanced carrier signal is applied, and a double The conversion circuit interposed between the corresponding second input pair of the balanced differential amplifier circuit reduces the gain and flattens the frequency characteristics without impairing the balance of the output level, and limits the output amplitude. Since the crest factor is made small, it is possible to realize a double-balanced modulation circuit that has a large dynamic range, has a good carrier wave suppression ratio, generates little thermal noise, and is resistant to interference. In addition, since the conversion circuit has flat frequency characteristics and its output amplitude is limited, even if the carrier frequency changes, there is no need to reset the input signal level and it can be used at the same signal input level6. Since it can be constructed using transistor elements and resistors without including any components, it has various excellent effects such as being able to easily form an integral integrated circuit.

(Embodiments) Hereinafter, embodiments of the present invention will be described with reference to the drawings. 1st
The figure shows a double balanced modulation circuit according to an embodiment of the invention,
Note that parts equivalent to those in FIGS. 3 and 4 are given the same reference numerals.

This double-balanced modulation circuit includes a power supply terminal 106 to which a positive power supply is applied, and a first input terminal pair (106 to which a modulation signal is applied).
00, 101>, a second pair of input terminals (102, 103) to which a carrier wave signal with a constant envelope is applied, and a pair of output terminals (104, 105) to which a modulated wave signal is sent.
The double differential pair transistors (1 to 4) and differential transistors constituting the Gilbert multiplier cell described above
13.14), the first transistor 1 and the second
The connection points between the emitters of transistors 2, 3rd transistor, and 4th transistor are connected to transistors 13 and 1, respectively.
4 to the input terminal pair (100, 101), and the connection points between the collectors of the transistors 1 and 3, and the collectors of the transistors 2 and 4 are connected to the input terminal pair (100, 101) as the output pair. Output terminal pair (
104, 105), the bases of transistors 1 and 4, and the bases of transistors 2 and 3 are connected to each other (second input pair) and the input terminal pair (10
2, 103) and a conversion circuit according to the present invention having a differential transistor (5, 6) interposed therebetween.

The differential transistors (13, 14) in the Gilbert multiplier cell are subjected to emitter current feedback through resistors 35 and 36.

In addition, the constant current source circuit in the Gilbert multiplier cell and the conversion circuit in the preceding stage are transistors 15 and 15, respectively.
and a resistor 37, a transistor 16 and a resistor 42,
These bias voltages are connected to a diode-connected transistor 17 whose collector and base are shorted, a resistor 43, and a resistor 44.
is given by Note that this embodiment is a double balanced modulation circuit that operates with a positive power supply, but as is well known, when operating with a negative power supply, the constant power supply circuit is connected to the negative power supply and the power supply terminal 106 is grounded. It is.

The carrier signal is either balanced or unbalanced, and if it is an unbalanced signal, the carrier signal is connected to terminal 102, terminal 10.
3 will be externally grounded to high frequency. This carrier wave signal is transmitted through a pair of input terminals (102, 103) to differential transistors (5, 6) constituting a differential amplifier circuit.
) and are amplified by this differential amplifier circuit.

In this differential amplifier circuit, a transistor 7 and a resistor 40
Voltage feedback is applied between the collector bases of the differential transistors (5, 6) via the first emitter follower 1 to transistor consisting of the transistor 8 and the second emitter follower transistor consisting of the transistor 8 and the resistor 41, respectively. There is.

This voltage feedback allows the differential amplifier circuit to reduce its gain and flatten its frequency characteristics without impairing the balance of the output signal level. Voltage feedback can be achieved using only the resistors 40 and 41, but when the amount of feedback is increased, the resistance value becomes smaller and the base-collector voltage of the differential transistors (5, 6) becomes smaller.

In order to prevent this, emitter followers using transistors 7 and 8 are required.

Further, the differential transistors, that is, the fifth transistor 5 and the sixth transistor 6 each have independent collector load resistors 32 and 33, but the power supply side terminals of these collector load resistors 32 and 33 are common. A resistor 34 as an impedance element is inserted between the common connection point and the power supply terminal 106.The presence of this resistor 34 causes the output of the differential amplifier circuit to Maximum level is limited.

In other words, while maintaining consistency between the output DC center level of the differential amplifier circuit and the input DC center level of the next-stage double differential pair amplifier circuit, the resistance values of the resistors 32 and 33 are reduced, and the output The amplitude can be limited.

The output of this differential amplifier circuit is then passed through a third emitter follower transistor made up of a transistor 9 and a resistor 38, and a fourth emitter follower transistor made up of a transistor 10 and a resistor 39. Dynamic pair transistor (1 to 4)
connected to each base. Therefore, the transistor (1
The maximum value of the voltage applied to each base of 4) is determined by the product of the current value determined by the constant current source circuit composed of the transistor 16, the resistor 42, etc. and the resistance value of the resistor 34, and the value of the product of the transistor 9, the resistor 42, etc. The voltage is limited to a value lower than the power supply voltage applied to the power supply terminal 106 by the base-emitter voltage of 10.

The linear range of the Gilbert multiplier cell is limited by the current value of the constant current source circuit consisting of transistor 15 and resistor 37, the values of resistors 35 and 36, and the base-collector voltage of transistors 13 and 14. It is determined by a restriction that the voltage between the base and the collector of the transistors (1 to 4) is not reversed.

The carrier wave signal applied to the bases of the transistors (1 to 4) is limited in amplitude by reducing the values of the resistors 32 and 33, and its crest factor is reduced, and as mentioned above, its maximum Since the amplitude level is set to a low voltage level, a large output signal amplitude can be obtained by the resistors 30 and 31 under the restriction that the base-collector voltages of the transistors (1 to 4) are not reversed.

Here, it may be thought that the interstage emitter follower formed by transistors 9 and 10 could be replaced by the emitter follower formed by transistors 7 and 8, but it is possible to add a carrier wave signal with a low crest factor to the Gilbert multiplier cell. Because we are trying to get a large output by
A large signal is input to the differential amplifier circuit made up of differential transistors (5, 6). Therefore, there is a moment when transistors 7 and 8 are cut off.

During this cutoff period, the resistance is 40 from the base, and the resistance is 40
1, the in-phase output will be obtained.
This will cause distortion and result in a waveform with undulations.
In addition to transistors 7 and 8, an interstage emitter follower is required.

In the circuit shown in Figure 1, since voltage feedback is applied by transistors 7 and 8, the input terminal pair (10
The input impedance of the input terminal pair (100, 101) is low because the transistors 13 and 14 are subjected to emitter current feedback.

Next, FIG. 2 shows an embodiment of the pond of the present invention.

In this second embodiment, a differential amplifier circuit including seventh and eighth transistors (11, 12) is further provided before a differential amplifier circuit including differential transistors (5°6).

In this added differential amplifier circuit, emitter current feedback is applied by resistors 47 and 48, and the gain is small.
And the frequency characteristics are flat.

As the collector load, not only the resistors 45 and 46 but also the input impedance of the differential amplifier circuit formed by the differential transistors (5, 6) are connected as loads. The latter is because the impedance is reduced by the voltage ha3 generated by transistors 7 and 8.

This prevents deterioration of frequency characteristics due to the collector capacitance of transistors 11 and 12.

The differential amplifier circuit using the differential transistors (11, 12) is subjected to emitter current feedback by the resistors 47 and 48, so its output balance characteristics alone are not sufficient. Compared to the case where unbalanced/balanced conversion is performed using only the differential amplifier circuit according to 6), the overall balance characteristics are further improved.

The base voltage of all the transistors of the constant current source circuit including the transistor 18 that constitutes the constant current source circuit for the added differential amplifier circuit is the same as that of the transistor 17, the resistor 43,
The signal is provided by a bleeder circuit 44, and is connected to high frequency ground by a capacitor 90 via an input terminal 107.

The output impedance of the constant current source circuit as seen from the collector can be increased by lowering the impedance of the bleeder circuit connected to the base, but this requires a large current to flow through the bleeder circuit, which reduces power consumption and thermal design. It will be disadvantageous.

The high frequency grounding by the capacitor 90 can increase the high frequency output impedance of the constant current source circuit without these sacrifices. In a differential amplifier using a constant current source circuit,
Even without emitter current feedback, the emitter contact resistance exists and the conductance of the transistor is not infinite, so the gain on the in-phase output side is smaller than on the anti-phase output side. This effect can be reduced by increasing the output impedance of the constant current source circuit, so the capacitor 90 can reduce the amount of carrier leakage.

The base bias of the differential transistors (11, 12) is from the same bleeder resistors 52 and 53 to resistors 49 and 53, respectively.
It will be given after 50 years.

By selecting small values for the resistors 49 and 50, the voltage difference applied to the bases of the differential transistors (11, 12) has smaller variations than when separate bleeder resistors are provided.

In addition, the common connection point of resistors 49 and 50 is connected to input terminal 108.
Since the high frequency is bypassed by the capacitor 91 via the input terminals, the input impedance seen from the input terminal pair (102° and 103) is almost a low value determined by the resistors 49 and 50. This means that capacitor 90
, When the entire circuit other than 91 is configured as a monolithic IC'''C', there is a capacitance of a bonding pad between the input terminal pair (102, 103) and the high frequency ground, and the input terminal pair (10-2, It has been proven that the resistors 49 and 50 have the effect of suppressing the occurrence of peaking in frequency characteristics due to the series resonant circuit, which is caused by the presence of bonding inductance in the resistors 49 and 50.

(Effects of the Invention) As explained above, according to the double-balanced modulation circuit of the present invention, the second input terminal pair to which a balanced or unbalanced carrier signal is applied, and the Gilbert multiplier The conversion circuit interposed between the corresponding second input pair of the double-balanced differential amplifier circuit consisting of cells reduces the gain and flattens the frequency characteristics without impairing the balance of the output level, and also increases the output level. Since the amplitude is limited and the crest factor is reduced, a double-balanced modulation circuit with a large dynamic range, good carrier wave suppression ratio, low thermal noise generation, and resistance to interference is realized. can. In addition, the conversion circuit has flat frequency characteristics and its output amplitude is limited, so even if the carrier frequency changes,
There is no need to reset the input signal level and it can be used at the same signal input level.Furthermore, since it does not include a capacitor and can be configured with transistor elements and resistors, it has various excellent effects such as easy integrated integration. There is.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing one embodiment of the present invention, Fig. 2 is a circuit diagram showing another embodiment of the invention, Fig. 3 is a circuit diagram showing a Gilbert multiplier cell, and Fig. 4 is a circuit diagram showing a conventional Gilbert multiplier cell. FIG. 2 is a circuit diagram of a double-balanced modulation circuit. 1-18...transistor, 30-54...
...Resistor, 100.101...First input terminal pair, 102.103...Second input terminal pair, 104.105...Output terminal pair , 106
...Power terminal, 107.108...Input terminal. Agent Patent Attorney Yoshihiro Hachiman Gilbert Marnav ν・f Kiel Ratio 3 Figure

Claims (2)

[Claims] (1) A first input terminal pair; a second input terminal pair; an output terminal pair; the emitters of the first and second transistors are connected to each other, and the emitters of the third and fourth transistors are connected to each other. A connection point between the emitters serves as a first input pair, and a signal applied to the first pair of input terminals is inputted thereto, and a connection point between the bases of the first and fourth transistors, and a connection point between the bases of the second and third transistors. Each base-to-base connection point where the bases are connected together constitutes a second input pair, and the collectors of the first and third transistors are connected to each other, and the collectors of the second and fourth transistors are connected to each other. a double-balanced differential amplifier circuit in which connection points between the respective collectors are connected to the output terminal pair as an output pair; a conversion circuit interposed between the second input terminal pair and the second input pair; and; the conversion circuit has fifth and sixth transistors forming a differential amplifier circuit, and the bases of the fifth and sixth transistors are connected to the second input terminal pair. The applied signal is inputted directly or indirectly, and voltage feedback processing is performed between each collector base via the first and second emitter follower transistors, so that each collector An impedance element is inserted between the connection point and the reference potential point to appropriately lower the potential of the connection point connected via each different resistor from the reference potential, and each collector output is connected to a third impedance element. and a fourth emitter follower transistor, respectively, to the second input pair. (2) The conversion circuit includes a second differential amplifier circuit between the second input terminal pair and the differential amplifier circuit, and seventh and eighth differential amplifier circuits forming the second differential amplifier circuit. The transistors according to claim 1 are characterized in that each emitter has a current feedback resistor, and each base is connected to a voltage supply point of the same bleeder circuit through each separate resistor. ) The double-balanced modulation circuit described in section 2.