JPH02296408A - Differential amplifier circuit - Google Patents

Abstract

PURPOSE:To prevent deviation of the amplitude of a balanced output caused at the input of a high frequency signal by connecting a collector load of a 2nd differential amplifier circuit to an output of a common base transistor(TR) amplifier circuit represented in response to the input of a 1st differential amplifier circuit so as to be in the same phase. CONSTITUTION:Since a 2nd differential amplifier circuit equivalently receives an unbalanced input similar to a 1st differential amplifier circuit, there is a difference between output amplitudes of high frequency signals similar to the case of the 1st differential amplifier circuit as to a balanced output of TRs Q5, Q6. Since the TR Q5 is the signal input side in the 2nd differential amplifier circuit, the output amplitude at the TR Q6 is decreased at high frequencies. Thus, in order to cancel the deviation of the output amplitude caused in the 1st differential amplifier circuit, the collector output of the TR Q6 is synthesized with the collector output of a TR Q3 and the collector output of the TR Q5 is synthesized with a collector output of a TR Q4 respectively, then the deviation of the output amplitude of the balanced output even in a high frequency signal is prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a front-end differential amplifier circuit for the purpose of unbalanced-balanced conversion.

[Conventional technology]

In recent years, double-balanced differential amplifier circuits suitable for use in monolithic ICs have often been used as modulation/demodulation circuits for television tuners and radio transmitting/receiving devices. This double-balanced differential amplifier circuit has two balanced input terminals and assumes that the input signal is balanced human power.

However, since a high frequency signal usually results in an unbalanced input, a differential amplifier circuit is used as a convenient circuit for unbalance-balance in the manual stage of this double-balanced differential amplifier circuit. Since a relatively high level signal is input to this pre-differential amplifier circuit in order to improve the S/N ratio, the gain is low so that the differential amplifier circuit does not become saturated due to its own gain. It is hoped that An example of such a differential amplifier circuit is shown in FIG.

In the conventional example shown in FIG. 3, the emitters of transistors Ql and Q2 are connected to a constant current source 11 through resistors R1 and R2, which have normally equal resistance values, and the collectors of each are connected through load resistors R9 and RIO. are connected to the power supply voltage terminal VCC, and resistors R5, R6 and R7, R8 are connected to each other so that their respective bases are normally at the same predetermined voltage.
biased by Since the input signal is unbalanced, it is applied to the base of transistor Ql, which is the -4 input terminal, and is applied to the base of transistor Ql, which is the other input terminal.
The base of 2 is grounded at high frequency by capacitor C1. As a result, the output terminals of transistors Ql and Q2
Balanced signals with mutually opposite phases are output to the collectors of the two.

[Problem to be solved by the invention]

In such a differential amplifier circuit, it is effective to increase the values of resistors R1 and R2 in order to obtain a low gain, but the larger the values of resistors R1 and R2, the more Two output terminals OUT, O which are balanced outputs of
A shift occurs in the UT resistance and the 180 degree phase difference.

That is, since a transistor is generally used in the constant current source 11, the stray capacitance attached to the collector of the transistor is connected to the resistor R1.
and R2.

Therefore, while the signal applied to the input terminal IN is transmitted from the emitter of the transistor Ql to the emitter of the transistor Q2 through the resistors R1 and R2, part of the signal is lost due to this stray capacitance.

Since the value of stray capacitance is very small, this effect has no effect unless the input signal frequency is high, but if you increase the values of resistors R1 and R2 to obtain a low gain, it will affect the frequency actually used. come.

This situation is shown in FIG. There is a problem in that the difference in output amplitude between the two balanced output terminals has an adverse effect on the balanced input of the double balanced differential amplifier circuit connected to the next stage because it is detected as a common mode signal.

On the other hand, as a method for improving the shift in balanced output amplitude that occurs in this type of differential amplifier circuit, a differential amplifier circuit in which two stages of differential amplifier circuits are connected in series can be considered.

In other words, the above-mentioned deviation in the amplitude of the balanced output at high frequencies occurs because it is an unbalanced input, so if you use that output as a balanced input and then manually input it to the same type of differential amplifier circuit, the difference will be greater than if you directly input the unbalanced output. Output amplitude deviation is reduced. However, in order to cascade connect two stages of differential amplifier circuits of the same type, it is necessary to This requires an emitter follower and a level shift circuit, which has the problem of deteriorating frequency characteristics and increasing power consumption.

An object of the present invention is to provide a differential amplifier circuit that suppresses the shift in balanced amplitude without causing these problems.

[Means to solve the problem]

The differential amplifier circuit of the present invention includes a first differential amplifier circuit including first and second transistors, a common base transistor amplifier circuit including third and fourth transistors, and fifth and sixth transistors. The second differential amplifier circuit consists of a second differential amplifier circuit consisting of a transistor, and an emitter follower circuit consisting of a seventh transistor.

One input of the second differential amplifier circuit is connected to one load of the first differential amplifier circuit, the other input is connected to the emitter of the emitter follower circuit, and the other input of the second differential amplifier circuit is connected to the emitter of the emitter follower circuit. The collector load of the second differential amplifier circuit is connected to the output of the common base transistor amplifier circuit appearing corresponding to the input so that the collector load has the same polarity.

[Operation] In the above-described configuration, by combining the first and second two unbalanced input differential amplifier circuits, deviation in the amplitude of the balanced output that occurs when a high frequency signal is input is prevented.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 shows an embodiment of the present invention. In the first differential amplifier circuit consisting of the first and second transistors Ql and Q2, resistors R1 and R2 are provided between the constant current source 11 and the respective emitters in order to obtain a low gain. On the load side, a common base transistor amplification circuit consisting of third and fourth transistors Q3Q4 whose bases are connected to a predetermined potential of 8 is connected. Resistors R9 and RIO are the load resistances.

Fifth and sixth transistors Q5. Similarly to the first differential amplifier circuit, the second differential amplifier circuit composed of Q6 is provided with resistors R3 and R4 between the constant current source I2 and each emitter in order to provide a low gain. The base of the transistor Q5, which is one input of this second differential amplifier circuit, is
The bases of the transistor Q6, which is connected to the collector of the transistor Q1 which is the load of the first differential amplifier circuit and which is the other human power, are commonly connected to a predetermined potential of ■8, and the emitters are connected to a constant current of 1tt3. It is connected to the emitter of an emitter follower circuit consisting of a connected seventh transistor Q7. Furthermore, the collector of the transistor Q5, which is one output of the second differential amplifier circuit, is connected to the collector of the transistor Q6, and the collector of the transistor Q6, which is the other output, is similarly connected to the collector of the transistor Q3.

Next, the operation of the differential amplifier circuit having the above configuration will be explained.

When an input signal is applied to the base of transistor Q1,
The signal is transmitted to the collector side of transistor Q1,
Furthermore, it is input to the emitter of the common base transistor Q3 and appears as an output at its collector. On the other hand, the signal transmitted from the emitter of transistor Q1 is transmitted through resistors R1 and R
2 to the emitter and collector of the transistor Q2, and further to the emitter of the common base transistor Q4, and appears as an output of opposite polarity at the collector of the transistor Q4. At this time, a part of the high-frequency signal is lost due to the stray capacitance existing in parallel with the constant current source 11, so there is a difference between the output amplitude appearing at the collector of transistor Q3 and the output amplitude appearing at the collector of transistor Q4. What happens is the same as before.

Here, a second differential amplifier circuit, which has an unbalanced input similar to the first differential amplifier circuit and whose other input signal terminal is grounded at high frequency, is combined to eliminate the amplitude deviation that appears in each balanced output. It is possible to modify the difference in output amplitude by combining the signals so that they cancel each other out. Transistor Q5. Q
In the second differential amplifier circuit consisting of transistor Q1, one input signal is a signal appearing at the collector load of transistor Q1,
Since the other input is connected to the output of a low impedance emitter follower made of transistor Q7, it is under the same condition as being grounded in terms of high frequency. Furthermore, since the respective DC potentials are the emitter potentials of the transistors Q3 and Q7 whose bases are commonly connected, it is easy to set these to be equal.

In this way, the second differential amplifier circuit is equivalently unbalanced like the first differential amplifier circuit, so the transistor Q
5. Regarding the balanced output appearing at Q6, a difference in output amplitude occurs in the high frequency signal as in the first differential amplifier circuit. Second
In the differential amplifier circuit shown in FIG. 1, since the transistor Q5 side is the signal input side, the condition is such that the output amplitude appearing at the transistor Q6 becomes small at high frequencies. Therefore, in order to cancel out the output amplitude shift that occurs in the first differential amplifier circuit, the collector output of transistor Q6 is changed to the collector output of transistor Q3.
By combining the collector output of the transistor Q5 and the collector output of the transistor Q4, it is possible to prevent deviation in the output amplitude of the balanced output even in high frequency signals.

FIG. 2 shows a diagram showing the effects of the present invention. from now,
It can be seen that the deviation in the output amplitude of the balanced output in the high frequency signal is suppressed.

[Effects of the Invention] As explained above, the present invention can prevent deviations in the amplitude of the balanced output that occur when high-frequency signals are input by combining two unbalanced input differential amplifier circuits, thereby preventing adverse effects on the balanced input circuit in the subsequent stage. It is possible to obtain a differential amplifier circuit that does not give

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram of an embodiment of the differential amplifier circuit of the present invention, Fig. 2 is a frequency characteristic diagram showing the effects of the present invention, Fig. 3 is a circuit diagram of a conventional differential amplifier circuit, and Fig. 4 is a diagram showing frequency characteristics in a conventional circuit. Ql...first transistor, Q2...second transistor, Q3...third transistor, Q4...
Fourth transistor, Q5...Fifth transistor,
Q6...Sixth transistor, Ql...Seventh transistor, R1-RIO...Resistor, 11N13...
Constant current source, C1... capacitor. 11-13 Kando So No. 2 I! ! ``1 way waste collection fee)

Claims (1)

[Claims] 1, a first transistor consisting of a first transistor and a second transistor, the first and second signal input terminals of which are connected to their respective bases, and whose respective emitters are connected to a first constant current source via a resistor; a common base transistor amplifier circuit consisting of a differential amplifier circuit, third and fourth transistors connected to respective collector loads of the first differential amplifier circuit; a second differential amplifier circuit consisting of a fifth and a sixth transistor connected to a constant current source, a base connected to a common potential with the base potential of the third and fourth transistors, and an emitter connected to a common potential of the third and fourth transistors; It consists of an emitter follower circuit consisting of a seventh transistor connected to a constant current source, one input of the second differential amplifier circuit is connected to one load of the first differential amplifier circuit, and the other input is connected to one load of the first differential amplifier circuit. The input of is connected to the emitter of the emitter follower circuit, and the collector load of the second differential amplifier circuit is connected to the output of the common base transistor amplifier circuit that appears corresponding to the input of the first differential amplifier circuit. A differential amplifier circuit characterized in that the circuits are connected to have the same polarity.