JPH0620897A - Manufacture of epitaxial semiconductor wafer - Google Patents

Manufacture of epitaxial semiconductor wafer

Info

Publication number
JPH0620897A
JPH0620897A JP19759792A JP19759792A JPH0620897A JP H0620897 A JPH0620897 A JP H0620897A JP 19759792 A JP19759792 A JP 19759792A JP 19759792 A JP19759792 A JP 19759792A JP H0620897 A JPH0620897 A JP H0620897A
Authority
JP
Japan
Prior art keywords
thin film
substrate
epitaxial
semiconductor wafer
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP19759792A
Other languages
Japanese (ja)
Other versions
JP3220961B2 (en
Inventor
Hisashi Adachi
尚志 足立
Masataka Horai
正隆 宝来
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
KYUSHU ELECTRON METAL
KYUSHU ELECTRON METAL CO Ltd
Nippon Steel Corp
Original Assignee
KYUSHU ELECTRON METAL
KYUSHU ELECTRON METAL CO Ltd
Sumitomo Sitix Corp
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Filing date
Publication date
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Application filed by KYUSHU ELECTRON METAL, KYUSHU ELECTRON METAL CO Ltd, Sumitomo Sitix Corp filed Critical KYUSHU ELECTRON METAL
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Application granted granted Critical
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Links

Abstract

PURPOSE:To provide a method of manufacturing a silicon epitaxial thin film of high quality preventing oxygen deposits from growing. CONSTITUTION:A P<+> substrate of high oxygen concentration is thermally treated in a hydrogen-containing atmosphere at temperatures of over 1000 deg.C for 3 minutes or more before a silicon thin film is made to grow through a vapor growth method, whereby the surface defects of the wafer substrate are eliminated. A silicon epitaxial thin film of high quality can be formed by the use of a high oxygen concentration P<+> substrate which is not usually used for a device such as a D-RAM or a power MOS or the like, and the thin film is very high in gettering power to heavy metal contaminant.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、デバイス・プロセス
中において、特に重金属汚染に対して特性劣化の度合い
が低く、高歩留でのLSI製造を可能にしたエピタキシ
ャル半導体ウエーハの製造方法に係り、重金属汚染に対
して強力なゲッタリング能を有するが、高酸素濃度で酸
素析出物の成長が著しく、従来、使用されることのなか
った比抵抗が1/10Ω・cm以下のボロンドープ基板
を特定の熱処理を施してから気相成長させることによ
り、高品質のシリコンエピタキシャル薄膜を成膜できる
エピタキシャル半導体ウエーハの製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing an epitaxial semiconductor wafer, which has a low degree of characteristic deterioration particularly during heavy metal contamination during a device process and enables LSI manufacturing at a high yield. Although it has a strong gettering ability against heavy metal contamination, the growth of oxygen precipitates is remarkable at a high oxygen concentration, and a boron-doped substrate with a specific resistance of 1/10 Ω · cm or less, which has never been used before, is specified. The present invention relates to a method for manufacturing an epitaxial semiconductor wafer capable of forming a high-quality silicon epitaxial thin film by performing heat treatment and then vapor phase growth.

【0002】[0002]

【従来の技術】半導体シリコンウエーハにエピタキシャ
ル薄膜を成長させるプロセスは、通常、気相成長装置で
行われ、以下の如きプロセスからなる。まず、水素ガス
などの不活性ガス雰囲気内で所定の温度域まで昇温し、
引き続き塩化水素を含むガス等によるエッチングを数分
間行い、表面コンタミネーション除去及びウエーハ表面
の活性化を行った後、シラン系ガスを用いてウエーハ表
面にエピタキシャル薄膜を成長させるものである。
2. Description of the Related Art A process for growing an epitaxial thin film on a semiconductor silicon wafer is usually carried out in a vapor phase growth apparatus and comprises the following processes. First, raise the temperature to a predetermined temperature range in an atmosphere of an inert gas such as hydrogen gas,
Subsequently, etching with a gas containing hydrogen chloride or the like is performed for several minutes to remove surface contamination and activate the wafer surface, and then a silane-based gas is used to grow an epitaxial thin film on the wafer surface.

【0003】しかし、この塩化水素を含むガス等による
エッチングプロセスでは、表面コンタミネーションの除
去不足、及び結晶引上げ過程ですでに育成された微小欠
陥を完全に消滅させることができず、さらに塩化水素ガ
スの選択エッチング性によりウェーハ表面のピットを増
加させる傾向にある。従って、塩化水素系ガスエッチン
グ後にエピタキシャル薄膜を成長させる際、上記の欠陥
等を起点として薄膜内に積層欠陥、転位などの欠陥を発
生させる。
However, in this etching process using a gas containing hydrogen chloride or the like, surface contamination cannot be removed sufficiently and minute defects already grown in the crystal pulling process cannot be completely eliminated. The pits on the wafer surface tend to increase due to the selective etching property. Therefore, when an epitaxial thin film is grown after etching with hydrogen chloride gas, defects such as stacking faults and dislocations are generated in the thin film starting from the above defects and the like.

【0004】[0004]

【発明が解決しようとする課題】また、デバイスプロセ
ス工程内での重金属汚染によるデバイス特性の劣化要因
の低減方法としてイントリンシックゲッタリング処理を
用いることがある。一方、ボロン・ドープシリコン基板
のうち、比抵抗1/10Ω・cm以下の基板(以降P+
基板という)は、本来重金属汚染に対して強力なゲッタ
リング能を有することが知られており、D−RAM、パ
ワーMOS等のデバイスに使用されている。
Intrinsic gettering treatment may be used as a method of reducing the factor of deterioration of device characteristics due to heavy metal contamination in the device process step. On the other hand, among boron-doped silicon substrates, substrates having a specific resistance of 1/10 Ω · cm or less (hereinafter P +
Substrate) is originally known to have a strong gettering ability against heavy metal contamination, and is used for devices such as D-RAM and power MOS.

【0005】しかし、D−RAM、パワーMOS等のデ
バイスに使用されるP+基板の仕様品は、通常、酸素濃
度が13×1017atoms/cm3以下のものが用い
られる。これは、P+基板が他の基板と比較して非常に
酸素析出物が成長しやすいためであり、従って、従来の
エピタキシャルプロセスでは、薄膜成長中にP+基板表
面上に酸素析出物が成長し、それを起点として薄膜内に
積層欠陥、転位等の欠陥を発生させ、高品質エピタキシ
ャル・シリコン薄膜の製造ができないためである。
However, as a specification product of the P + substrate used for devices such as D-RAM and power MOS, an oxygen concentration of 13 × 10 17 atoms / cm 3 or less is usually used. This is because oxygen precipitates grow on the P + substrate much more easily than other substrates. Therefore, in the conventional epitaxial process, oxygen precipitates grow on the P + substrate surface during thin film growth. However, it is impossible to manufacture a high-quality epitaxial silicon thin film due to the generation of stacking faults, dislocations and other defects in the thin film.

【0006】この発明は、高酸素濃度P+基板を用いて
エピタキシャル薄膜の欠陥密度を低減化し、更に重金属
汚染に対して強力なゲッタリング能を有する高品質シリ
コン・エピタキシャル薄膜を成長できるエピタキシャル
半導体ウエーハの製造方法の提供を目的とする。
The present invention is an epitaxial semiconductor wafer capable of reducing the defect density of an epitaxial thin film by using a high oxygen concentration P + substrate and growing a high-quality silicon epitaxial thin film having a strong gettering ability against heavy metal contamination. An object of the present invention is to provide a manufacturing method of.

【0007】[0007]

【課題を解決するための手段】この発明は、高品質シリ
コン・エピタキシャル薄膜を成長できるエピタキシャル
半導体ウエーハの製造方法の提供を目的に種々検討した
結果、気相成長前に高温水素熱処理することにより、半
導体基板表面及びその近傍のエピタキシャル薄膜欠陥の
発生起点を消滅可能であることに着目し、特に、従来使
用されることのなかった高酸素濃度P+基板を用いてエ
ピタキシャル薄膜の欠陥密度を低減化でき、更に重金属
汚染に対して強力なゲッタリング能を有するエピタキシ
ャル半導体ウエーハを提供できることを知見し、この発
明を完成した。
The present invention has been variously studied for the purpose of providing a method for producing an epitaxial semiconductor wafer capable of growing a high-quality silicon epitaxial thin film, and as a result, high-temperature hydrogen heat treatment before vapor phase growth Focusing on the fact that the starting point of the epitaxial thin film defect on the surface of the semiconductor substrate and its vicinity can be eliminated, in particular, the defect density of the epitaxial thin film is reduced by using a high oxygen concentration P + substrate which has never been used before. It was found that an epitaxial semiconductor wafer having a strong gettering ability against heavy metal contamination can be provided, and the present invention has been completed.

【0008】すなわちこの発明は、半導体ウエーハの表
面にシリコン薄膜を気相成長させるエピタキシャル半導
体ウエーハの製造方法において、比抵抗1/10Ω・c
m以下のP+基板、特に従来使用対象外の高酸素濃度P+
基板、酸素濃度が13×1017atoms/cm3以上
のP+基板を、水素を含む雰囲気内で熱処理を施した
後、前記のウエーハ表面にシリコン薄膜を気相成長させ
ることを特徴とするエピタキシャル半導体ウエーハの製
造方法である。
That is, the present invention provides a method for manufacturing an epitaxial semiconductor wafer in which a silicon thin film is vapor-deposited on the surface of the semiconductor wafer, with a specific resistance of 1/10 Ω · c.
P + substrate of m or less, especially high oxygen concentration P + which is not conventionally used
A substrate, a P + substrate having an oxygen concentration of 13 × 10 17 atoms / cm 3 or more, is heat-treated in an atmosphere containing hydrogen, and then a silicon thin film is vapor-phase grown on the surface of the wafer. It is a method of manufacturing a semiconductor wafer.

【0009】また、この発明は、上記の構成において1
000℃以上の温度で3分間以上保持する熱処理条件を
特徴とするエピタキシャル半導体ウエーハの製造方法で
ある。
Further, according to the present invention, there is provided 1
It is a method for manufacturing an epitaxial semiconductor wafer, which is characterized by heat treatment conditions of holding at a temperature of 000 ° C. or higher for 3 minutes or longer.

【0010】この発明において水素を含む雰囲気内での
熱処理条件は、薄膜欠陥密度を0.1個/cm2以下と
するには1000℃以上の高温が必要であり、好ましく
は1000℃〜1200℃である。また、熱処理時間は
上記の効果を得るには少なくとも3分間以上が必要であ
り、更に、上記の熱処理温度までの昇温速度やその雰囲
気は、通常のエピタキシャル条件でよい。この発明にお
いて熱処理雰囲気は、水素100%が望ましいが、A
r,Heなどの不活性ガスとH2ガスの混合雰囲気でも
よい。
In the present invention, the heat treatment conditions in an atmosphere containing hydrogen require a high temperature of 1000 ° C. or higher to obtain a thin film defect density of 0.1 defects / cm 2 or lower, preferably 1000 ° C. to 1200 ° C. Is. Further, the heat treatment time needs to be at least 3 minutes or more to obtain the above effect, and the temperature rising rate up to the heat treatment temperature and the atmosphere thereof may be the usual epitaxial conditions. In the present invention, the heat treatment atmosphere is preferably 100% hydrogen.
A mixed atmosphere of an inert gas such as r or He and H 2 gas may be used.

【0011】[0011]

【作用】この発明は、半導体シリコンウエーハ上にシリ
コン薄膜を気相成長させるプロセスの前工程として高温
水素アニール処理を導入することにより、半導体基板表
面及びその近傍のエピタキシャル薄膜欠陥の発生起点を
消滅させることを特徴としている。すなわち、シリコン
基板内の微小欠陥を、水素による還元作用により縮小ま
たは消滅させることにより、エピタキシャル薄膜欠陥密
度を0.1個/cm3以下の高品質エピタキシャル薄膜
を形成可能にしたものである。
The present invention eliminates the origin of epitaxial thin film defects on the surface of the semiconductor substrate and in the vicinity thereof by introducing a high temperature hydrogen annealing treatment as a pre-step of the process of vapor-depositing a silicon thin film on a semiconductor silicon wafer. It is characterized by that. That is, it is possible to form a high quality epitaxial thin film having an epitaxial thin film defect density of 0.1 defects / cm 3 or less by reducing or eliminating minute defects in the silicon substrate by the reducing action of hydrogen.

【0012】[0012]

【実施例】実施例1 試料には、CZシリコン単結晶ウエーハ、比抵抗1/5
0Ω以下P+基板を使用した。酸素濃度により以下の如
く、3水準に振りわけた。 サンプルA…11〜12×1017atoms/cm3 サンプルB…15〜16×1017atoms/cm3 サンプルC…17×1017atoms/cm3以上 上記サンプルA、B、Cを1150℃×2hrの条件で
酸素、窒素混合ガス雰囲気の熱処理を施した後、選択エ
ッチングを実施し、バルク中の微小欠陥密度を調査し
た。図1にその結果を示す。サンプルB、Cでは微小欠
陥密度が106×107個/cm2に成長しているが、サ
ンプルAでは微小欠陥の発生はみられなかった。一方、
表面の微小欠陥密度は、サンプルB、Cでは102個/
cm2以上であることがわかる。
EXAMPLES Example 1 As a sample, a CZ silicon single crystal wafer, a specific resistance of ⅕
A P + substrate of 0 Ω or less was used. Depending on the oxygen concentration, it was divided into three levels as follows. Sample A ... 11 to 12 × 10 17 atoms / cm 3 Sample B ... 15 to 16 × 10 17 atoms / cm 3 Sample C ... 17 × 10 17 atoms / cm 3 or more 1150 ° C. × 2 hr for the above samples A, B and C After performing heat treatment in a mixed gas atmosphere of oxygen and nitrogen under the conditions described above, selective etching was performed to investigate the density of microdefects in the bulk. The result is shown in FIG. In Samples B and C, the density of microdefects grew to 10 6 × 10 7 / cm 2 , but in Sample A, the generation of microdefects was not observed. on the other hand,
The surface micro-defect density is 10 2 for samples B and C /
It can be seen that it is at least cm 2 .

【0013】従って、高酸素濃度P+基板は、従来のエ
ピタキシャル薄膜プロセスでは基板表面に微小欠陥が成
長し、薄膜形成時にその欠陥を起点としてエピタキシャ
ル薄膜内に欠陥を発生させることが理解できる。
Therefore, it can be understood that in the high oxygen concentration P + substrate, minute defects grow on the surface of the substrate in the conventional epitaxial thin film process, and defects are generated in the epitaxial thin film starting from the defects during thin film formation.

【0014】実施例2 実施例1におけるサンプルBを使用し、気相成長装置内
で水素100%の雰囲気中で、処理温度を900℃、1
000℃、1100℃、1200℃の種々の温度とし、
それぞれ10分間の熱処理を行った。その後、引き続い
て塩化水素ガスでウエーハエッチングを行い、さらにト
リクロロシランガスにて気相成長薄膜形成を行った。得
られたエピタキシャルウエーハを選択エッチングし、微
小欠陥密度を測定した。この発明による水素雰囲気中で
の高温熱処理の温度依存性を図2に示す。すなわち、同
一処理時間ではこの発明による水素雰囲気での熱処理温
度が高温であるほど、欠陥抑制効果が高いことがわか
る。
Example 2 Using the sample B of Example 1, the treatment temperature was 900 ° C. in an atmosphere of 100% hydrogen in a vapor phase growth apparatus, and 1
Various temperatures of 000 ° C, 1100 ° C, 1200 ° C,
Each was heat-treated for 10 minutes. After that, wafer etching was subsequently performed with hydrogen chloride gas, and vapor phase growth thin film formation was further performed with trichlorosilane gas. The obtained epitaxial wafer was selectively etched, and the microdefect density was measured. FIG. 2 shows the temperature dependence of the high temperature heat treatment in the hydrogen atmosphere according to the present invention. That is, it can be seen that the higher the heat treatment temperature in the hydrogen atmosphere according to the present invention is, the higher the defect suppressing effect is at the same processing time.

【0015】次に、この発明による水素雰囲気での熱処
理温度を1100℃に固定し、処理時間を種々変化させ
た後、薄膜形成を行い、薄膜内の欠陥密度を測定した。
図3に処理時間と薄膜内の微小欠陥密度の関係で示す如
く、同一処理温度では、処理時間が長いほど欠陥抑制効
果が高いことがわかる。
Next, the heat treatment temperature in a hydrogen atmosphere according to the present invention was fixed at 1100 ° C., the treatment time was variously changed, and then a thin film was formed, and the defect density in the thin film was measured.
As shown in the relationship between the processing time and the minute defect density in the thin film in FIG. 3, at the same processing temperature, the longer the processing time is, the higher the defect suppressing effect is.

【0016】実施例3 ゲッタリング能力を調査するため、実施例1のサンプル
A及びBをこの発明による水素雰囲気での熱処理する前
に、Ni定量汚染を実施した。なお、定量汚染は、10
10〜1013atoms/cm3標準溶液を用い、スピン
コート汚染にて試料を作製した。その後、水素100%
の雰囲気中で、1100℃×10分間のこの発明による
水素雰囲気での熱処理を施し、引き続きエピタキシャル
薄膜形成を行った。エピタキシャル薄膜形成後の酸素誘
起積層欠陥(OSF)を観察するため、1000℃×1
6時間の酸素雰囲気中で熱処理を行い、選択エッチング
により欠陥密度を測定した。図4に示す如く、サンプル
Bでは1013atoms/cm2のNi汚染でもOSF
の発生は観察できない。一方、サンプルAでは1011
toms/cm2程度の汚染域からOSFの発生が見ら
れる。
Example 3 To investigate the gettering ability, Ni quantitative contamination was carried out before heat treating the samples A and B of Example 1 in a hydrogen atmosphere according to the present invention. In addition, quantitative pollution is 10
A sample was prepared by spin coating contamination using a standard solution of 10 to 10 13 atoms / cm 3 . Then 100% hydrogen
In this atmosphere, heat treatment was performed in a hydrogen atmosphere according to the present invention at 1100 ° C. for 10 minutes, and then an epitaxial thin film was formed. To observe the oxygen-induced stacking fault (OSF) after forming the epitaxial thin film, 1000 ° C. × 1
Heat treatment was performed in an oxygen atmosphere for 6 hours, and the defect density was measured by selective etching. As shown in FIG. 4, in the case of Sample B, even if 10 13 atoms / cm 2 of Ni is contaminated, the OSF
Can not be observed. On the other hand, in sample A, 10 11 a
Occurrence of OSF can be seen from the contaminated area of about toms / cm 2 .

【0017】すなわち、この発明による水素雰囲気中で
の高温熱処理は、1000℃で3分間以上、好ましくは
5分間以上の熱処理により、高酸素濃度P+基板上に低
密度欠陥エピタキシャル薄膜形成を可能にし、かつ、強
力なゲッタリング能力を有する高品質エピタキシャル薄
膜の形成を実現できることがわかる。
That is, the high temperature heat treatment in a hydrogen atmosphere according to the present invention enables the formation of a low density defect epitaxial thin film on a high oxygen concentration P + substrate by heat treatment at 1000 ° C. for 3 minutes or longer, preferably 5 minutes or longer. It can be seen that it is possible to realize the formation of a high quality epitaxial thin film having a strong gettering ability.

【0018】[0018]

【発明の効果】この発明は、高酸素濃度P+基板をシリ
コン薄膜の気相成長前に水素を含む雰囲気内で熱処理、
例えば1000℃以上で3分間以上保持する処理を施す
ことにより、ウエーハ基板表面の欠陥を消滅させること
ができるため、その後の気相成長薄膜形成にて薄膜内の
欠陥密度が0.1個/cm2以下と極めて高品質のシリ
コンエピタキシャル薄膜を成膜できる。従って、重金属
汚染に対して強力なゲッタリング能を有するが、高酸素
濃度で酸素析出物が成長が著しく使用されることのなか
った高酸素濃度P+基板を、D−RAM、POW−MO
S等のデバイスに使用可能となし、かつ極めて高品質の
シリコンエピタキシャル薄膜を成膜したエピタキシャル
半導体ウエーハを提供できる。
According to the present invention, a high oxygen concentration P + substrate is heat-treated in an atmosphere containing hydrogen before vapor phase growth of a silicon thin film,
For example, since the defects on the surface of the wafer substrate can be eliminated by performing the process of holding at 1000 ° C. or higher for 3 minutes or more, the defect density in the thin film in the subsequent vapor phase growth thin film formation is 0.1 / cm. It is possible to form a silicon epitaxial thin film of extremely high quality of 2 or less. Therefore, a high oxygen concentration P + substrate, which has a strong gettering ability against heavy metal contamination, but has not been used for the growth of oxygen precipitates at a high oxygen concentration, was used as a D-RAM, POW-MO.
It is possible to provide an epitaxial semiconductor wafer which is not usable for devices such as S and which has an extremely high quality silicon epitaxial thin film formed thereon.

【図面の簡単な説明】[Brief description of drawings]

【図1】酸素濃度と微小欠陥密度との関係を示すグラフ
である。
FIG. 1 is a graph showing the relationship between oxygen concentration and minute defect density.

【図2】アニール温度とシリコン薄膜の微小欠陥密度と
の関係を示すグラフである。
FIG. 2 is a graph showing the relationship between the annealing temperature and the micro defect density of a silicon thin film.

【図3】アニール時間とシリコン薄膜の微小欠陥密度と
の関係を示すグラフである。
FIG. 3 is a graph showing the relationship between the annealing time and the micro defect density of a silicon thin film.

【図4】表面Ni汚染濃度とOSF欠陥密度との関係を
示すグラフである。
FIG. 4 is a graph showing the relationship between surface Ni contamination concentration and OSF defect density.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 半導体ウエーハの表面にシリコン薄膜を
気相成長させるエピタキシャル半導体ウエーハの製造方
法において、比抵抗が1/10Ω・cm以下のボロンド
ープ基板を水素を含む雰囲気内で熱処理を施した後、前
記ウエーハ表面にシリコン薄膜を気相成長させることを
特徴とするエピタキシャル半導体ウエーハの製造方法。
1. A method for manufacturing an epitaxial semiconductor wafer in which a silicon thin film is vapor-phase grown on a surface of a semiconductor wafer, wherein a boron-doped substrate having a specific resistance of 1/10 Ω · cm or less is heat-treated in an atmosphere containing hydrogen, A method for manufacturing an epitaxial semiconductor wafer, which comprises vapor-depositing a silicon thin film on the surface of the wafer.
JP19759792A 1992-06-30 1992-06-30 Manufacturing method of epitaxial semiconductor wafer Expired - Lifetime JP3220961B2 (en)

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JP19759792A JP3220961B2 (en) 1992-06-30 1992-06-30 Manufacturing method of epitaxial semiconductor wafer

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Application Number Priority Date Filing Date Title
JP19759792A JP3220961B2 (en) 1992-06-30 1992-06-30 Manufacturing method of epitaxial semiconductor wafer

Publications (2)

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JPH0620897A true JPH0620897A (en) 1994-01-28
JP3220961B2 JP3220961B2 (en) 2001-10-22

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Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009252920A (en) * 2008-04-04 2009-10-29 Sumco Corp Epitaxial silicon wafer, and method of manufacturing the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009252920A (en) * 2008-04-04 2009-10-29 Sumco Corp Epitaxial silicon wafer, and method of manufacturing the same

Also Published As

Publication number Publication date
JP3220961B2 (en) 2001-10-22

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