JPH0620138B2 - Method of manufacturing thin film MOS structure semiconductor device - Google Patents

Description

Description: FIELD OF THE INVENTION The present invention relates to a method for manufacturing a thin film MOS structure semiconductor device, and more specifically, to a TFT ((Thin Film Transistor;
It relates to an element isolation process of a thin film transistor).

2. Description of the Related Art Isolation of elements of a thin film MOS semiconductor device is basically performed in the following steps.

As shown in FIG. 2, a Si film such as polysilicon is formed on the insulating substrate 1, the Si film between the active regions is removed by photolithography technique, and an island 2'is formed. If the gate oxide film 3 is formed by oxidation, each active element can be electrically separated. Then, a gate electrode material is formed on the gate oxide film, patterned into a desired shape by photolithography, a gate electrode 4 is formed, and thereafter, a MOS structure element is formed by a normal MOS process.

This manufacturing method is characterized by a simple processing method and a small number of steps, but has the following drawbacks.

The first is that the gate oxide film becomes thin at the point where the side surface of the Si island contacts the underlying insulating substrate (point A in FIG. 2). When the device is used, there is a high risk that the gate oxide film near point A will cause dielectric breakdown.

The second reason is that there is a large step on the surface of the element, which may cause a disconnection or short circuit of the wiring in the subsequent steps, and the accuracy of photolithography is reduced.

As a technique for flattening the element surface, as shown in FIG. 3, after forming a Si island 2'on an insulating substrate 1 '(FIG. 3a), SiO ₂ 3'is formed by a CVD method or a sputtering method. Is deposited over the thickness of the Si island 2 ', a resist 4'is applied on the Si island 2'to flatten the surface (Fig. 3b), and then dry etching is performed (Fig. 3c), which is a so-called etch back method. . This inter-element separation method can obtain surface flatness, but has the following drawbacks.

The first is that the SiO ₂ film deposited on the step by the CVD method or the sputtering method is the following document by the CVD method (Muramoto, Nakajima; The Institute of Electronics and Communication Engineers Vol.66, No.7,1983). In the sputter method, the following literature (T. Serikawa and T. Yachi: J. Electrochem. So
c.vol.128, P918, 1981),
A rough film of SiO ₂ adheres to the side wall of the step. This rough film quality portion is likely to cause defects in the subsequent etching and diffusion steps.

The second factor is that in the case of deposited SiO ₂ , there are many factors that change the device characteristics such as leakage current related to the level at the interface with the Si film as compared with the case of a thermal oxide film. Therefore, in order to eliminate defects such as dielectric breakdown of the gate insulating film, step shape, uneven film quality of the deposited SiO ₂ film, and instability of interface state, Si wafer MOS LS is generally used.
It is manufactured by the element isolation method (coplanar process) according to the LOCOS method adopted in the process I.

On the insulating substrate 1 shown in FIG.
The Si film 2 is deposited. After forming a thin SiO ₂ layer 5 by the thermal oxidation method, silicon nitride 6 and SiO ₂ are sequentially deposited by the CVD method.

The underlying SiO ₂ layer 5 is for preventing troubles caused by contact between the Si film 2 and the silicon nitride 6, such as reaction between the Si film 2 and the silicon nitride 6. As shown in FIG. 4b, the SiO ₂ 7 on the surface is first partially removed by the photolithography technique (FIG. 4c), and the silicon nitride 6, SiO ₂ 5, Si film 2 is used as a mask. Are sequentially removed by etching to obtain the structure shown in FIG.

Next, the point of this process is to remove the SiO ₂ film 7 and leave the Si film at about half the thickness at this time. Next, when thermal oxidation is performed, the Si film 2 ″ in the portion not covered with silicon nitride is completely oxidized to have a thickness twice that of FIG. 4e.
It becomes the structure shown in. Silicon nitride 6 and Si below
When O ₂ 5 is removed, a flat element isolation structure in which the SiO ₂ 9 and the upper surface of the Si island 2'are continuous is obtained as shown in FIG.

After that, a gate oxide film 3'is again formed on the Si island (Fig. 4g), the gate electrode material 4 is deposited thereon (Fig. 4h), and patterning is performed by photolithography technique to form the gate electrode 8 ′ Is formed (8 is a resist) (FIG. 4, i, j), and thereafter a MOS type element is formed by a normal process to finally form the structure of FIG. 4k and the process is completed.

The conventional element isolation method described above has a large number of steps, requires a long process time, and has a problem that the controllability of etching is poor and flatness is poor because about half the thickness of the Si film is left during etching. It has the drawback that fluctuations occur. The reason why the process time is long is as follows.

(B) It is necessary to deposit silicon nitride as a mask for selective oxidation.

(B) Since this silicon nitride is used, it is necessary to make the silicon nitride a Sangertian structure in the SiO ₂ layer.

(C) It is necessary to remove the deposited SiO ₂ and silicon nitride.

It is due to.

OBJECT OF THE INVENTION The present invention proposes to solve the above drawbacks,
It is an object of the present invention to provide a method for forming element isolation of a thin film type semiconductor device having a flattening effect in which local gate breakdown is prevented by a combination of simple steps and in a short time. .

SUMMARY OF THE INVENTION In order to achieve the above-mentioned object, the present invention provides a step of forming a first Si film of polysilicon or the like on an insulating substrate and a step of forming the Si film only in an element formation region by photolithography. Is left as an island and the others are etched away, and after forming this Si island, a step of further depositing a Si film such as a second polysilicon which is thinner than the first Si film thickness on the entire surface, and this second Of the deposited Si film such as polysilicon by thermal oxidation to completely change it to SiO _2; the step of removing SiO ₂ on the island surface by the first Si film by the photoetching method or the etching method; A thin film type MOS structure element including a step of forming a gate oxide film on the island surface and a step of depositing a gate electrode material on the gate oxide film and patterning the gate electrode to form a gate electrode. There is provided a method for producing separated.

A second Si film such as polysilicon is deposited on the first Si film by element isolation having the same performance as that of the conventional selective oxidation method using silicon nitride, which requires various complicated steps.
It is an advantage of the present invention that it can be formed by a simple and short process of simply oxidizing.

Embodiment An embodiment of the present invention will be described with reference to the drawings.

It is needless to say that the embodiment is merely an example, and various modifications and improvements can be made without departing from the spirit of the present invention.

In addition, although the semiconductor element of MOS structure is explained,
It is obvious that the element isolation according to the present invention is effective as an isolation method between active elements such as bipolar elements and passive elements such as capacitors and resistors.

1A to 1J show an embodiment (process chart) of a method for manufacturing a semiconductor device of the present invention.

On the insulating substrate (made of quartz) 1 shown in FIG. 1a, a polysilicon film 2 and 2000 liters were deposited by the CVD method. Next, using the photolithography technique, the portions other than the element formation region of the polysilicon film are removed by plasma etching using CCl ₂ F ₂ .
A polysilicon island 2'structure shown in FIG. 1b was formed. After the resist was ashed and removed in an oxygen atmosphere at 600 ° C., a second polysilicon 2 ″ was again deposited on this surface to a thickness of about 800 Å by the CVD method (FIG. 1c).
When the second polysilicon film 2 ″ was completely oxidized by the wet thermal oxidation method at 00 ° C. for 60 minutes and converted into the SiO ₂ layer 9, the polysilicon island 2 ′ forming the element was separated by the thermal oxide film. element isolation structure is as formed as shown in Figure 1 d. the thickness of the SiO ₂ 9 between the polysilicon island about 1500
It is Å. In this thermal oxidation step, there is no hindrance to excess, that is, even if the oxidation progresses to the first polysilicon film 2 ', there is a wide range of allowable conditions in the element isolation step, and this is a highly reproducible process. .

In this embodiment, this is followed by the polysilicon island 2 '.
The upper SiO ₂ was masked with a photoresist 8 using a photolithography technique using a normal positive resist, and was removed by etching with a buffered hydrofluoric acid solution to obtain the structure shown in FIGS. 4e and 4f, followed by 900 ° C. A 1000 Å gate oxide film 3 was formed by a wet thermal oxidation method for 20 minutes (Fig. 1g).

After that, polysilicon is deposited as the gate electrode material 4 according to a normal process, and after patterning, a source and a drain are formed.
10 is formed by an ion implantation method (FIGS. 1 h and 1 i), and then an interlayer insulating film 11 is deposited with a sputtering SiO ₂ and connected with an Al electrode 12 through a through hole, and finally FIG. A thin film type MOS structure semiconductor device having the structure shown in FIG.

In the embodiment of the present invention described above, the method of removing SiO ₂ on the polysilicon island by hydrofluoric acid type wet etching using the simplest photoresist has been shown. In this method, as can be seen in FIG.
SiO ₂ resulting from oxidation of polysilicon remains, and the structure is not completely flat. However, since this step is as thin as 1500 Å or less, it does not affect the element characteristics such as the wet etching and the smoothing of the corner during gate oxidation, such as disconnection of the gate electrode. Moreover, it is possible to control this step by the deposited film thickness of the second polysilicon. When flattening is more essential as a measure for increasing the density, the second polysilicon should be formed so that the film thickness of the second polysilicon after oxidation becomes equal to or larger than the film thickness of the first polysilicon island. Is deposited, and then a photoresist is applied over the entire surface to a thickness sufficient to obtain a flat surface. The oxide film can form a flat element isolation.

EFFECTS OF THE INVENTION As described above, according to the present invention, there is an advantage that element isolation of a thin film type semiconductor device can be formed as a flat structure having excellent insulation resistance by using a simple and highly reproducible process. is there.

Further, there is an advantage that the number of steps required for element isolation can be reduced by 40% or more as compared with the conventional method.

[Brief description of drawings]

1A to 1J are process diagrams showing a method of manufacturing a thin film type MOS structure semiconductor device according to an embodiment of the present invention. 2A, 2B, 3A to 3C and 4A to 4K are process drawings for explaining a conventional method for manufacturing a thin film MOS semiconductor device. 1 ... Insulating substrate 2 ... Poly film such as polysilicon (Si film on substrate) 2 '... Separated Si film 2 "... Si film deposited on top of first Si film 3 ... Gate oxidation Film 4 ...... Gate electrode (material) 5 …… Underlying SiO ₂ film 6 …… Nitride Si film 7 …… Mask SiO ₂ film 8 …… Photoresist 9 …… Polysilicon oxide for element isolation SiO ₂ 10 …… Source and drain 11 …… Interlayer SiO ₂ 12 …… Al electrode

Claims (3)

[Claims] 1. (a) forming a first Si film on an insulating substrate; (b) selectively removing the Si film to form an element formation region in an island shape; (c) the above A step of depositing a second Si film over the entire surface where the element formation region is separated into islands, and (d) then completely oxidizing the second Si film to oxidize the Si islands in the element formation region. A step of forming an element isolation region having a structure embedded in the object, (e) a step of selectively removing oxides on the Si island, and (f) a gate insulation of the MOS structure semiconductor device on the Si island. A method of manufacturing a thin film type MOS structure semiconductor device, comprising: a step of forming a film; and (g) a step of forming a gate electrode on the gate insulating film. 2. A thin film type wherein the step of selectively removing oxides on a Si island according to claim 1 uses an etching method by photolithography technology.
Manufacturing method of MOS structure semiconductor device. 3. A method of manufacturing a thin film type MOS structure semiconductor device, wherein the step of selectively removing oxides on a Si island according to claim 1 uses an etching method.