JPH06175879A - Dummy fault setting system - Google Patents

Abstract

PURPOSE:To exactly and accurately, namely, synchronously set a dummy fault by setting the dummy fault corresponding to a dummy fault parameter by starting a dummy fault processing program at the time of normal interruption to a communication control part and the like. CONSTITUTION:The device of a dummy fault setting object is provided with an empty area 10 for writing a dummy fault processing program 11 and a dummy fault parameter 12 and an interruption area 8 for writing a branching instruction to this dummy fault program 11. The dummy fault processing program 11 and the dummy fault parameter 12 are written in the empty area 8, the branching instruction to this dummy fault processing program 11 is written in the interruption area 7, the dummy fault processing program 11 is activated by the branching instruction wirtten in this interruption area 8 when any interruption is generated, the instruction is wirtten back to the original instruction, and this activated dummy fault processing program 11 sets the dummy fault to the device according to the dummy fault parameter 12.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pseudo failure setting method for setting a pseudo failure in a device, and a pseudo failure setting method for setting a pseudo failure in hardware operating under an OS. .

[0002]

2. Description of the Related Art Generally, a non-stop communication control processing device loads a communication control program into the device and realizes an input / output operation mainly for communication control by accessing a processor module (PM). At this time, in order to confirm the switching operation when a failure occurs in the device, it is necessary to generate a pseudo failure and check the switching.

Conventionally, when a pseudo fault is set for a device while a communication control program is operating under the OS, it is forced by a hardware clip from the outside or by executing a diagnostic command. I was setting a pseudo fault in the device.

[0004]

SUMMARY OF THE INVENTION In the former method of setting a pseudo fault by a manual hardware clip,
Not only is it difficult to accurately set a pseudo fault in hardware, but there is also a problem in that recent high-integrated circuits have a risk of circuit breakdown.

In the latter method of forcibly setting a pseudo fault in a device by executing a diagnostic command, the state of the communication control program is ignored and the pseudo fault is set, so that the communication control program malfunctions. There is a problem that the confirmation corresponding to the original failure event may not be possible.

The present invention solves these problems.
Write the suspiciousness processing program and suspiciousness parameter in the empty area of the communication control section, and write a branch instruction to the suspiciousness processing program in the interrupt area to set a pseudo failure, for example when a normal interruption to the communication control section occurs. The purpose is to start the suspiciousness processing program, set a pseudo failure corresponding to the suspicion parameter, and enable the pseudo failure to be set accurately and precisely in synchronization.

[0007]

[Means for Solving the Problems] Means for solving the problems will be described with reference to FIG. In FIG. 1, an empty area 1
0 is the doubt processing program 11 and the doubt parameter 12
Is an area for writing the BSP (bootstrap program), for example.

The suspected failure processing program 11 sets a pseudo failure in the device according to the suspected failure parameter 12. The suspicious failure parameter 12 indicates a pseudo failure to be set in the device.

The interrupt area 8 is a suspicious trouble processing program 11
This area is used to write a branch instruction to.

[0010]

According to the present invention, as shown in FIG. 1, a suspicious trouble processing program 11 and a suspicious trouble parameter 12 are written in the empty area 10 and a branch instruction to the suspicious trouble processing program 11 is written in the interrupt area 8 to cause an interrupt. When the error occurs, the branch instruction written in the interrupt area 8 activates the suspicious trouble processing program 11, and the activated suspicious trouble processing program 11 writes the branch instruction back to the original instruction and the pseudo failure according to the suspicion failure parameter 12. Is set in the device. At this time, the empty area 10 is the empty area 10 of the BSP (bootstrap program).

In addition, with the pseudo fault set in the device,
When a processing request is issued to the device by an interrupt or the like, log information of the state in which the set pseudo fault has occurred is collected and the device is tested.

Therefore, an empty area (for example, an empty area of the bootstrap program) 10 of the device (for example, the communication controller) 10
To write the suspicious trouble processing program 11 and the suspicious trouble parameter 12 to the interrupt area 8 and to write a branch instruction in the interrupt area 8 to start the suspicious trouble processing program 11 at the time of a normal interrupt to the apparatus and set a pseudo fault according to the suspicious trouble parameter 12. This makes it possible to set a pseudo fault accurately and accurately. Further, it becomes possible to collect the log information of the pseudo fault generated by the set pseudo fault and test the device.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the construction and operation of an embodiment of the present invention will be described in detail with reference to FIGS.

FIG. 1 shows a block diagram of an embodiment of the present invention.
FIG. 1A shows a configuration diagram. In FIG. 1A, a processor module (PM) 1 performs various controls according to programs.

The main memory 2 stores programs and data. Main memory 2 here
In, the program that operates as the pseudo fault occurrence control unit 3 is stored.

The pseudo fault occurrence control unit 3 writes the suspicious trouble processing program 11 and the suspicious trouble parameter 12 in the empty area of the BSP 9 of the communication control unit 4 which is the target device for setting the pseudo fault, and the communication control unit 4 For example, a branch instruction to the doubt processing program 11 is written in the interrupt area 8 of FIG.

The communication control unit 4 is a device to which the pseudo fault of the present invention is set, and includes an I / O bus control adapter 5,
The logic unit 6 and the communication scanner 13 are included.

I / O bus control adapter (IOBC-A)
Reference numeral 5 controls the I / O bus and controls the exchange of data with the processor module 1. The logic unit (CCU) 6 executes a program.

The communication control program 7 is a program for controlling communication. The interrupt area 8 is an area that branches when an interrupt occurs, and is specifically a head area of an area (for example, address 100) of level 3 interrupt processing for the communication control program 7 in the communication control unit 4. . According to the present invention, a branch instruction (2 bytes) to the suspicious trouble processing program 11 is written in the interrupt area 8 and automatically when a level 3 interrupt to the communication control program 7 of the communication control unit 4 occurs. It is set to branch to the doubt processing program 11.

BSP9 is a bootstrap program. In the empty area 10 of this BSP 9, the doubt processing program 11 and the doubt parameter 12 according to the present invention are written.

The empty area 10 is the empty area of the BSP 9 here. The suspicion / disability processing program 11 has a suspicion / disability parameter 1
According to 2, the pseudo obstacle is set. For example, the pseudo fault is set, reset, or set only once according to the suspicious fault code in FIG. As the pseudo fault, IOBC-A, CCU, CS, etc. are set, and for example, an IO bus parity error, an IOBC-A bus error, etc. are set.

The suspected failure parameter 12 is a parameter for generating a pseudo failure, and the suspected failure parameter 12 is set as shown in FIG. Communication Scanner (CS)
Reference numeral 13 controls the line.

FIG. 1B shows an example of the suspicious parameter.
This suspicion parameter consists of 2 bytes and is set as shown. Bit0 of Byte0, 1: Set OP code, 00: NOP (No operation) 01: SET (Set pseudo fault) 10: RESET (Reset pseudo fault) 11: SET / RESET (1 pseudo fault once) Reset with only) Bit2 of Byte0 to 7: Set suspicion code.

Byte 1 to Byte 1 to 7: Control of the number of suspicious trouble occurrences (setting the number of suspicious trouble occurrences). As described above, the OP code, the suspicious trouble code, and the number of suspicious trouble occurrences are set in the suspicious trouble parameter 12, and the suspicious trouble processing program 11 started by the interrupt sets the pseudo obstacle according to the suspicious trouble parameter 12.

Next, the operation of the configuration of FIG. 1 will be described in detail according to the order shown in the flowchart of FIG. In FIG. 2, S1 loads the suspicious trouble occurrence control unit 3 into the PM ((a) in FIG. 1). This writes (loads) the suspicious trouble occurrence control unit 3, which is a program, into the main memory 2 of the processor module 1 from the floppy disk of FIG. 3 described later.

In step S2, the suspicious trouble occurrence control unit 3 is activated.
This starts the suspicious trouble occurrence control unit 3 in a conversation with the operator. In S3, the suspicious failure occurrence control unit 3 writes the suspicious failure processing program 11 in the empty area 10 of the BSP 9 ((a) in FIG. 1).

In S4, the suspicion and trouble occurrence control unit 3 writes the suspicion and trouble parameter 11 into the empty area 10 of the BSP 9 ((a) in FIG. 1).
of). S5 holds the instruction 2 bytes at the head of the L3 interrupt area 8. This is the interrupt area 8 of level 3 in FIG.
The first instruction 2 bytes (for example, address 100) (2 bytes of the branch instruction) is held.

In step S6, a 2-byte branch instruction is directly written in the L3 interrupt area in the OS (communication control program) ((a) in FIG. 1). This writes 2 bytes of a branch instruction to the suspicion processing program 11 in the level 3 interrupt area 8 to the communication control program 7 in FIG. This allows
When a normal interrupt occurs, the written branch instruction activates the doubt processing program 11 to transfer control.

In step S7, when normal interrupt processing between the PM and CCM (communication control unit 4) occurs, L3 is set in the CCM.
Interrupt occurs. In S8, when the L3 interrupt is generated in S7, the branch instruction stored in the interrupt area 8 is executed, and the suspected fault processing program 11 at the branch destination is activated. The L3 interrupt is also generated by the interval timer interrupt. Here, since control is passed to the suspicious failure processing program 11 with a normal L3 interrupt, a pseudo failure can be set as a normal interrupt process as described later.

In step S9, the held 2-byte instruction is restored. This is because the original 2-byte instruction is returned to the interrupt area 8 and the branch instruction to the suspicious trouble processing program 11 is returned to the original instruction (returned to the original at the end of the pseudo obstacle setting). ).

In step S10, the suspicious parameter 12 is analyzed and O
The operation according to the P code is performed. For example: ・ Setting of suspicion ("S" with OP code 01 in (b) of Fig. 1)
In the case of "ET")-Cancellation of the suspicion (OP code 10 in Fig. 1 (b) is "R"
In case of “ETSET”)

As described above, after the pseudo fault occurrence control unit 3 is loaded from the floppy disk or the like into the main memory 2 of the PM 1 and activated (in FIG. 1A), the pseudo fault occurrence control unit 3 causes the suspected fault processing program to be executed. 11 and the suspicious failure parameter 12 are stored in the empty area 10 of the BSP 9 in the communication control unit 4, and a branch instruction to the suspicious failure processing program 11 is written in the interrupt area 8 ((a) in FIG.
). Then, the suspicious trouble processing program 11 started by the branch instruction set in the interrupt area 8 when the interrupt occurs sets a pseudo fault according to the suspicious trouble parameter 12.

FIG. 3 shows a system configuration diagram of the present invention.
This shows the actual configuration of the configuration shown in FIG. In FIG. 3, PM1 is a processor module that retrieves and executes a program stored in the main memory 2.

The main memory 2 includes a pseudo fault occurrence control unit 3
It stores programs that operate as.
The CCM (# 1) 4 and the CCM (# 2) 4 are the communication control unit 4
Which is a target device for setting a pseudo fault according to the present invention, which performs communication control, and includes IOBC-A5, CCU6,
It is composed of MS 14, CS 13, and the like.

The IOBC-A5 is an IO bus control adapter 5 and controls the connection with the PM1. C
The CU 6 is the logic unit 6 and executes the program in the MS 14.

The MS 14 is a main memory and stores programs such as a communication control program and BSP. The BSP is a bootstrap program, which is used to execute a communication control program when the power is turned on.
14 is a program to be loaded.

The empty area 10 is an empty area of the area prepared for storing the BSP. The suspicion processing program 11 writes in the empty area 10 of the BSP, and CCM (#
1) 4, the pseudo fault is set in the CCM (# 2) 4 according to the suspected fault parameter 12.

The suspiciousness parameter 12 is the empty area 10 of the BSP.
And instruct the suspicious failure processing program 11 to set a pseudo failure according to this (see (b) of FIG. 1).

The CS 13 is a communication scanner 13,
It controls the line. CC (# 1) 15, CC
(# 2) 15 is a line connection unit for connecting to a line.

The SFM 16 is an operator interface controller, which controls access to the floppy disk 17 and uses the screen on the console display 18 to talk with the operator. Here, in response to an instruction from the operator, the pseudo failure occurrence control program is copied from the floppy disk to the main memory 2
To the pseudo-failure occurrence control program (suspicious failure occurrence control unit 3) to write the suspected failure processing program 11 and the suspected failure parameter 12 in the empty area 10 of the BSP. For example, a branch instruction to the processing program 11 is written in the interrupt area 8.

Based on the above configuration, the operator causes the pseudo faults to be set to, for example, IOBC-A, CCU, MS, and CS by the following procedure.

(1) The operator gives an instruction from the console display 18, retrieves the pseudo failure occurrence control program from the floppy disk, writes it in the main memory 2, and starts it.

(2) The operator uses the pseudo fault occurrence control program (pseudo fault occurrence control unit 3) started in (1).
Speaking with, the suspected trouble processing program 11 and the suspected trouble parameter 12 are written in the empty area 10 of the BSP of the MS 14 of the CCM 4.

(3) The operator talks with the pseudo fault occurrence control unit 3 and writes a branch instruction to the suspicious fault processing program 11 in the interrupt area 8 of the CCM 4. By the above, the operation for setting the pseudo obstacle by the operator is completed.

(4) When a normal interrupt is generated in the CCM 4, the branch instruction written in the interrupt area 8 transfers control to the suspicious trouble processing program 11, so that the pseudo processing program 11 follows the CCM 4 according to the suspicious trouble parameter 12.
A specified pseudo-failure, such as the IO bus parity error or IOBC-A bus error described above, is set in a specified portion of the area and the original instruction is written back to the interrupt area 8.

(5) Corresponding to the setting of the pseudo fault in (4), an error occurs and the CCM 4 is disconnected, for example, and the log information is collected while switching to the spare CCM 4.

Therefore, in response to the operator instructing the setting of the pseudo fault by the pseudo parameter, the predicted CC
It becomes possible to read out that the switching of M4 has occurred and that the information to that effect has been collected in the log information, and to perform a test such as CCM4.

[0048]

As described above, according to the present invention,
At the time of a normal interrupt to the device, write a suspicious trouble processing program 11 and a suspicious trouble parameter 12 in an empty region 10 of the device (for example, a communication control unit) and a branch instruction in the interrupt region 8. Since the configuration is adopted in which the suspicious trouble processing program 11 is activated and the pseudo obstacle is set according to the suspicious trouble parameter 12, the pseudo obstacle can be set accurately and accurately. As a result, (1) Compared with the conventional hardware clip or setting a pseudo fault due to execution of a diagnostic instruction that does not consider the state of the communication control program, it is safe and accurate, especially in response to a normal interrupt. Can be set and generated.

(2) Since no special tool is required to set the pseudo obstacle, the test work can be simplified and the test with high uniformity can be realized. (3) From the viewpoint of the operator, that is, the person who executes the test, the pseudo fault can be set by program control without considering the state of the communication control program, so the pseudo fault setting is completed simply by checking the message from the program. You can know.

(4) A branch instruction to the suspicious trouble processing program 11 is set in the interrupt area 8, and this branch instruction activates the suspicious trouble program 11 to set a pseudo fault at the time of a normal interrupt, and then the interrupt is executed. Since the original instruction is written back to the area 8, it is possible to generate a pseudo failure without affecting the operating OS and communication control.

(5) The suspected trouble processing program 11 and the suspected trouble parameter 12 are written in an empty area 10 of a BSP (bootstrap program) different from the area where the communication control program 7 is stored or used. Therefore, the pseudo fault can be set without being affected by or affected by the communication control program 7.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an embodiment of the present invention.

FIG. 2 is a flowchart explaining the operation of the present invention.

FIG. 3 is a system configuration diagram of the present invention.

[Explanation of symbols]

 1: Processor module (PM) 2: Main memory 3: Pseudo fault occurrence control unit 4: Communication control unit (CCM) 5: IO bus control adapter (IOBC-A) 6: Logic unit (CCU) 7: Communication control program 8 : Interrupt area 9: BSP (bootstrap program) 10: Empty area 11: Suspicious trouble processing program 12: Suspicious trouble parameter 13: Communication scanner (CS) 14: MS (main memory) 15: CC (line connection part) 16: SFM (Operator interface control unit) 17: Floppy disk 18: Console display

Claims (3)

[Claims] 1. A pseudo failure setting method for setting a pseudo failure in a device, comprising a suspected failure processing program (11) and a suspected failure parameter (1).
An empty area (10) for writing 2) and an interrupt area (8) for writing a branch instruction to this suspicion processing program (11) are provided in the device for which suspiciousness is set, and the vacant area (8) is suspected. A processing program (11) and a suspicious trouble parameter (12) are written, and a branch instruction to the suspicious trouble processing program (11) is written in the interrupt area (8), and when an interrupt occurs, this interrupt area (8) is written. According to the written branch instruction, the above-mentioned suspicion processing program (1
1) is started and the original instruction is written back, and the started suspicious trouble processing program (11) is the suspicious trouble parameter (12).
Pseudo-fault setting method characterized in that a pseudo-fault is configured to be set in the device according to. 2. The pseudo failure setting method according to claim 1, wherein the empty area (10) is an empty area (10) of a bootstrap program. 3. When a processing request due to an interrupt or the like occurs in the device with the pseudo fault set in the device,
The pseudo fault setting method according to claim 1 or 2, wherein the log information in a state in which the set pseudo fault has occurred is configured to be tested.