JPS63305445A - Data writing system at power break - Google Patents

Data writing system at power break

Info

Publication number
JPS63305445A
JPS63305445A JP62142485A JP14248587A JPS63305445A JP S63305445 A JPS63305445 A JP S63305445A JP 62142485 A JP62142485 A JP 62142485A JP 14248587 A JP14248587 A JP 14248587A JP S63305445 A JPS63305445 A JP S63305445A
Authority
JP
Japan
Prior art keywords
data
cache memory
power break
power supply
supply control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62142485A
Other languages
Japanese (ja)
Inventor
Hiroyuki Goto
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62142485A priority Critical patent/JPS63305445A/en
Publication of JPS63305445A publication Critical patent/JPS63305445A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To surely attain consistency between data in an auxiliary storage device and data in a cache memory by sending a signal for permitting the power break when a control means checks the completion of data transfer from the cache memory.
CONSTITUTION: When power break is informed from a power supply control means 7, the control means 5 starts processing (write-back processing) for writing unupdated data stored in the cache memory 6 in the auxiliary storage device 9. After checking whether all the data in the cache memory 6 are written in the device 9 or not by detecting that all queues newly formed for write-back processing disappear based on the queues stored as a table, the sending of a power break permission signal to a power supply control part is instructed by a power supply control means 7. Consequently, consistency between the data in the device 9 and the data in the memory 6 can be surely obtained.
COPYRIGHT: (C)1988,JPO&Japio
JP62142485A 1987-06-08 1987-06-08 Data writing system at power break Pending JPS63305445A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62142485A JPS63305445A (en) 1987-06-08 1987-06-08 Data writing system at power break

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62142485A JPS63305445A (en) 1987-06-08 1987-06-08 Data writing system at power break

Publications (1)

Publication Number Publication Date
JPS63305445A true JPS63305445A (en) 1988-12-13

Family

ID=15316419

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62142485A Pending JPS63305445A (en) 1987-06-08 1987-06-08 Data writing system at power break

Country Status (1)

Country Link
JP (1) JPS63305445A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0574531A1 (en) * 1991-03-05 1993-12-22 Zitel Corporation Cache memory system and method of operating the cache memory system
JPH06250938A (en) * 1991-08-29 1994-09-09 American Teleph & Telegr Co <Att> Circuit for performing test of ram array and control and its method
US5615353A (en) * 1991-03-05 1997-03-25 Zitel Corporation Method for operating a cache memory using a LRU table and access flags
US6052789A (en) * 1994-03-02 2000-04-18 Packard Bell Nec, Inc. Power management architecture for a reconfigurable write-back cache
JP2007334906A (en) * 2003-05-22 2007-12-27 Canon Inc Image processor, disk protection method therefor, and control program for executing disk protection method
JP2016202203A (en) * 2015-04-15 2016-12-08 オリンパス株式会社 Power source management system

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61210453A (en) * 1985-03-15 1986-09-18 Canon Inc Data memory device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61210453A (en) * 1985-03-15 1986-09-18 Canon Inc Data memory device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0574531A1 (en) * 1991-03-05 1993-12-22 Zitel Corporation Cache memory system and method of operating the cache memory system
EP0574531A4 (en) * 1991-03-05 1995-03-08 Zitel Corp Cache memory system and method of operating the cache memory system.
US5615353A (en) * 1991-03-05 1997-03-25 Zitel Corporation Method for operating a cache memory using a LRU table and access flags
JPH06250938A (en) * 1991-08-29 1994-09-09 American Teleph & Telegr Co <Att> Circuit for performing test of ram array and control and its method
US6052789A (en) * 1994-03-02 2000-04-18 Packard Bell Nec, Inc. Power management architecture for a reconfigurable write-back cache
JP2007334906A (en) * 2003-05-22 2007-12-27 Canon Inc Image processor, disk protection method therefor, and control program for executing disk protection method
JP2016202203A (en) * 2015-04-15 2016-12-08 オリンパス株式会社 Power source management system

Similar Documents

Publication Publication Date Title
JPH04214290A (en) Semiconductor memory device
JPS58102381A (en) Buffer memory
JPH02224054A (en) Execution method for computer system and multiprocessor system minimum unit operation
JPH02141845A (en) Method for reading data block from main memory by central processing unit in multiprocessor system
JPH04245352A (en) Storage device control method and storage device subsystem
JPS6263350A (en) Information processor equipped with cache memory
JPH04233049A (en) Computer system having selectable cache subsystem
JPH0322162A (en) Command interface for data processing system
JPH03184144A (en) Method and device for control of cache
TW343305B (en) Cache control system
JPH01263760A (en) Data transfer control method and its circuit for coprocessor
JPS59135563A (en) Computer system having disk cache device
JPS6111865A (en) Memory access control system
JPH02120960A (en) Method for transferring data and method for reducing period of data transfer cycle
JPH03199977A (en) Rate device
JPH01108653A (en) Memory content protection circuit
JPS63220342A (en) Block access system
JPS5995660A (en) Data processor
JPS5680872A (en) Buffer memory control system
JPH04233644A (en) Method for protecting data medium from illegal use
JPH03119461A (en) Access control circuit device
JPH04123243A (en) Data writing device
JPS54146555A (en) Data transfer system between processors
JPH02214937A (en) Data processor
JPS6159692A (en) Memory card system