JPH06151709A - Capacitor - Google Patents

Abstract

PURPOSE:To provide a capacitor of large capacitance without using new dielectric material, without increase in chip area and without decrease in breakdown strength of a jointly provided semiconductor element. CONSTITUTION:In the capacitor, having a dielectric formed between a pair of electrodes, which are provided in a semiconductor substrate 2, the insulating film 4, provided on the surface of the groove 3 formed on one side of a semiconductor substrate, is a dielectric and the electrode, consisting of impurity diffusion region and provided on the inside of the groove by impurity diffusion, and the electrode 6 provided on the surface of the insulating film 4 are a pair of electrodes.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a capacitor built in a semiconductor substrate.

[0002]

2. Description of the Related Art In the case of an IC or the like, a capacitor is built in a semiconductor substrate together with a semiconductor element such as a transistor. FIG. 11 shows a conventional capacitor provided on a semiconductor substrate. The capacitor 70 has a structure in which a dielectric is provided between a pair of electrodes, and an insulating film 72 provided on the surface of an n-type semiconductor substrate 71 is a dielectric, and a p ⁺ -type impurity diffusion region sandwiched between the insulating films 72 is formed. 73 and the polysilicon layer 74 form a pair of electrodes. On the semiconductor substrate, semiconductor elements such as transistors are also provided outside the drawing.

However, it is difficult to increase the capacity of the capacitor 70. A large-capacity capacitor is required when an analog circuit is integrated into an IC, but this is difficult. Although it is conceivable to reduce the thickness of the insulating film 72 in order to increase the capacitance of the capacitor, if the thickness is decreased, the breakdown voltage of the semiconductor element using the insulating film will decrease. Since a capacitor provided on a semiconductor substrate is usually provided together with another semiconductor element, it is meaningless if the withstand voltage of the semiconductor element is lowered even if the capacity can be increased.

Further, it is possible to increase the capacity by changing the material of the insulating film to one having a large relative dielectric constant, but in the present situation, there is no material having a high relative dielectric constant and usable in the same manner as the conventional insulating film. is there. Of course, if the area of the insulating film is increased, the capacity can be increased. However, in this case, the chip area is increased, the cost is increased, and the integration is impeded, which is not realistic.

[0005]

SUMMARY OF THE INVENTION In view of the above circumstances, the present invention is a capacitor capable of increasing the capacity without increasing the chip area and lowering the withstand voltage of the semiconductor device attached thereto, and of course without using a new dielectric material. The challenge is to provide.

[0006]

To solve the above problems, a capacitor provided on a semiconductor substrate according to the present invention has a structure in which a dielectric is provided between a pair of electrodes. The insulating film provided on the inner surface of the groove formed on one side is the dielectric, and the insulating film is formed by diffusing impurities in the inner surface of the groove, An electrode provided on the surface of the film is a capacitor (hereinafter,
(Referred to as "capacitor of the first invention") or a structure in which a pn junction is provided between a pair of electrodes, and diffusing impurities into an inner surface portion of a groove formed on one side of the semiconductor substrate. The pn junction of the opposite conductivity type impurity diffusion region provided by is a pn junction between the pair of electrodes, and has the same conductivity as the electrode contacting the surface of the impurity diffusion region and the substrate on the other side of the semiconductor substrate. A capacitor in which the electrodes contacting the surface of the semiconductor region of the mold are the pair of electrodes (hereinafter, "capacitor of the second invention").
Is said).

In the capacitor of the present invention, an impurity diffusion region of the same conductivity type as that of the impurity diffusion region formed by diffusing the impurity from the other side of the semiconductor substrate to reach the impurity diffusion region is provided. The form in which the electrode contacting the surface of the impurity diffusion region of the same conductivity type is also provided on the other side of the semiconductor substrate is very useful.

The semiconductor substrate on which the capacitor of the present invention is provided is usually provided with a semiconductor element such as a transistor. That is, the capacitor of the present invention serves as a capacitor as an element of an IC (integrated circuit), and the groove provided on the semiconductor substrate is the back surface of the semiconductor element formation region, and the number of grooves is at least one. It may be good or many. Both ends of the groove may be connected to form a ring, or both ends may not be connected.

[0009]

In the capacitor of the first invention, the insulating film on the surface in the groove formed on one side of the semiconductor substrate is a dielectric. The insulating film for the side-by-side semiconductor element and the insulating film of the dielectric can be separated with the groove forming side of the semiconductor substrate as the back surface. As a result, even if the insulating film for the dielectric is thinned to increase the capacity of the capacitor, the thickness of the insulating film for the semiconductor element is not thinned, and the breakdown voltage of the semiconductor element is not lowered. Further, if the groove and the impurity diffusion region for the electrode are formed by utilizing the back surface below the semiconductor element formation region, the increase of the chip area can be avoided. Although it is necessary to reach the impurity diffusion region of the same conductivity type by diffusing the impurities from the surface of the semiconductor substrate for extraction to the electrode impurity diffusion region.
Since the diffusion distance is short as much as the groove is dug, it is easy to form the impurity diffusion region of the same conductivity type. Conventional 10
It is not impossible to reduce the area with a capacity of up to 100 times. Of course, the material of the insulating film for the dielectric may be the same as the conventional one.

The capacitor according to the second aspect of the present invention utilizes the capacitance of the pn junction and does not use an insulating film, so there is no concern about the breakdown voltage of the semiconductor element provided side by side. By forming the groove on the semiconductor substrate on the lower back surface of the formation area of the side-by-side semiconductor element, widening the impurity diffusion region by using the entire side and bottom surfaces of the groove will not increase the chip area. A large area pn junction can be formed and a large capacity can be achieved. Needless to say, no new dielectric material is required.

An impurity diffusion region of the same conductivity type as that of the impurity diffusion region formed by diffusing the impurity so as to reach the impurity diffusion region from the other side of the semiconductor substrate is provided. When the electrode contacting the surface of the region is also provided on the other side of the semiconductor substrate, wiring can be connected to both electrodes of the capacitor on the surface side of the semiconductor substrate, which makes the capacitor easy to use.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The capacitors of the embodiments will be described in detail below with reference to the drawings. -Example 1- FIG. 1 shows a capacitor provided on a semiconductor substrate according to an example of the first invention.

The capacitor 1 is a capacitor having a dielectric provided between a pair of electrodes. In the capacitor 1, the insulating film 4 provided on the front surface of the groove 3 provided on the back surface of the n-type semiconductor substrate 2 is a dielectric. Then, the left and right p ⁺ -type impurity diffusion regions (connected outside the drawing) provided by diffusing impurities in the inner surface of the groove 3
5 is one electrode, the electrode 6 provided on the surface of the insulating film 4 is the other electrode, and the insulating film 4 as a dielectric is provided between both electrodes to form a capacitor.

A p ⁺ type impurity diffusion region 7 is formed at the same time as the impurity diffusion region 5, and further, by diffusing an impurity from the surface of the semiconductor substrate 2, the p ⁺ type impurity diffusion region reaching the impurity diffusion region 5 is formed. Region 8 and p ⁺ type impurity diffusion region 9 reaching impurity diffusion region 7 are formed. The electrode 10 is contacted with the impurity diffusion region 8 through the insulating film 11, and the electrode 6 is connected to the insulating film 3
The electrode 12 is in contact with the impurity diffusion region 7, the electrode 12 is in contact with the impurity diffusion region 9, and the electrodes 6 and 10 are connected through the impurity diffusion regions 7 and 9. That is, both electrodes of the capacitor 1 are drawn out to the front surface side of the semiconductor substrate 2, and wiring connection is very easy.

In the semiconductor substrate 1, the impurity diffusion regions 8 and 9 are only partially formed, and most of the groove 3 is vacant, and a semiconductor element such as a transistor is provided in the semiconductor substrate 1 for integration. It can be made into a chemical composition. Subsequently, a method of manufacturing the capacitor 1 will be described. As shown in FIG. 3, thermal oxidation films 40 and 41 having a thickness of 5000 Å are formed on both surfaces of the n-type silicon semiconductor substrate 2 having no element by thermal oxidation.
To form. In the figure, the upper side (thermal oxide film 40 side) is finally the back surface.

Then, as shown in FIG. 4, part of the thermal oxide film 40 is removed by patterning by a photolithography process and an RIE process to open a window 42, and KO at about 80 ° C.
Anisotropic etching is performed by immersing in an etchant such as an aqueous solution of H to dig down the location where the thermal oxide film is removed.
A groove 3 having an angle of 5 ° is formed. Then, as shown in FIG. 5, a thermal oxide film 44 of 3000 Å is formed on the entire surface again, and as shown in FIG.
Part of the thermal oxide film 44 is removed by patterning in the E step to open the window 45, and as shown in FIG. 7, 3EI5 ions of boron are implanted at 50 KeV using the remaining thermal oxide film as a mask. After the ion implantation, as shown in FIG. 8, the thermal oxide film on the back surface is removed and a thermal oxide film 3 having a thickness of 500 Å is formed again. At this time, ion-implanted p ⁺ -type impurity diffusion regions are formed.

Next, as shown in FIG. 9, part of the insulating film (thermal oxide film) 11 on the front surface side of the semiconductor substrate 2 is removed by patterning by the photolithography process and the RIE process, and the window 48 is opened and left. With an insulating film as a mask
Then, 3EI5 ions of boron are implanted. After the ion implantation, the p ⁺ -type region is connected to the impurity diffusion region 5 and the impurity diffusion region 9 as shown in FIG. The capacitor 1 of FIG. 1 can be obtained by forming the electrodes, removing the electrode contact portions of the insulating films 3 and 11 in the photolithography process and the RIE process, and then providing the electrodes 6, 10 and 12 through the aluminum electrode forming process. When semiconductor devices are provided side by side, the semiconductor devices are formed in parallel with or before or after the formation of the capacitors to form an integrated structure.

Embodiment 2 FIG. 2 shows a capacitor provided on a semiconductor substrate according to an embodiment of the second invention. The capacitor 21 is
A capacitor having a structure in which a pn junction is provided between a pair of electrodes. The capacitor 21 is an n-type semiconductor substrate 2
2 is a p ⁺ -type impurity diffusion region 24 provided by diffusing impurities in the inner surface portion of the groove 23 provided in the back surface of
The depletion layer 25 that can form a pn junction is used as one electrode, and the electrode 26 that contacts the surface of the impurity diffusion region 24 is used as one electrode, and is insulated from the surface of the n ⁺ -type impurity diffusion region 27 on the surface side of the semiconductor substrate 22. The electrode 28 contacting through the film 30 is used as the other electrode, and the pn junction of the impurity diffusion region 24 is provided between both electrodes to form a capacitor.

On the other hand, by diffusing the impurities from the surface of the semiconductor substrate 22, p ⁺ reaching the impurity diffusion region 24.
Type impurity diffusion regions 31 are formed, and the electrodes 33 are in contact with the impurity diffusion regions 31 through the insulating film 30.
It is connected through 31. That is, the capacitor 21
Both electrodes are drawn out to the front surface side of the semiconductor substrate 22 and wiring connection is very easy.

In the semiconductor substrate 22, the impurity diffusion regions 27 and 31 are only partially formed, and the groove 2
The upper part of 3 is largely empty, and an integrated semiconductor element such as a transistor can be provided here to form an integrated structure. Further, if the groove 23 has a wavy shape with unevenness on the bottom surface, the pn junction surface has unevenness, and the area is widened, which is advantageous in increasing the capacitance.

[0021]

EFFECTS OF THE INVENTION The capacitors of the first and second inventions make good use of the groove formed on one side of the semiconductor substrate without using a new dielectric material, thereby increasing the chip area and the breakdown voltage of the semiconductor element to be installed. This is a very useful structure because it has a structure in which the capacity can be increased without lowering the capacity. Further, when the electrode provided on the groove forming side of the semiconductor substrate is drawn out to the opposite side, the wiring becomes easier and the usefulness becomes higher.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a main part configuration of a capacitor according to a first embodiment.

FIG. 2 is a cross-sectional view showing the configuration of a main part of a capacitor according to a second embodiment.

FIG. 3 is a cross-sectional view showing a thermal oxide film forming step in manufacturing the capacitor of Example 1.

FIG. 4 is a cross-sectional view showing a groove forming step in manufacturing the capacitor according to the first embodiment.

FIG. 5 is a cross-sectional view showing a step of forming a thermal oxide film in a groove in manufacturing the capacitor of Example 1.

FIG. 6 is a cross-sectional view showing an ion implantation mask forming step in the production of the capacitor according to the first embodiment.

FIG. 7 is a cross-sectional view showing an ion implantation step in manufacturing the capacitor of Example 1.

FIG. 8 is a cross-sectional view showing a dielectric insulating film forming step in the production of the capacitor according to the first embodiment.

FIG. 9 is a cross-sectional view showing an ion implantation step in manufacturing the capacitor according to the first embodiment.

FIG. 10 is a cross-sectional view showing an impurity diffusion step in manufacturing the capacitor according to the first embodiment.

FIG. 11 is a cross-sectional view showing a configuration of a main part of a conventional capacitor.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Capacitor 2 Semiconductor substrate 3 Groove 4 Insulating film 5 Impurity diffusion region 6 Electrode 7 Impurity diffusion region 8 Impurity diffusion region

Claims (3)

[Claims] 1. A capacitor provided on a semiconductor substrate having a structure in which a dielectric is provided between a pair of electrodes, the capacitor being provided on a surface inside a groove formed on one side of the semiconductor substrate. The insulating film is the dielectric, and an electrode formed of an impurity diffusion region provided by diffusing impurities in the inner surface of the groove and an electrode provided on the surface of the insulating film are the pair of electrodes. Capacitor characterized by that. 2. In a capacitor provided on a semiconductor substrate, wherein a pn junction is provided between a pair of electrodes, impurities are diffused into an inner surface portion of a groove formed on one side of the semiconductor substrate. The pn junction of the impurity diffusion region of the opposite conductivity type provided by the above is a pn junction between the pair of electrodes, and an electrode that contacts the surface of the impurity diffusion region and a substrate on the other side of the semiconductor substrate. A capacitor, wherein the electrode contacting the surface of the semiconductor region of the same conductivity type is the pair of electrodes. 3. An impurity diffusion region of the same conductivity type as that of the impurity diffusion region formed by diffusing impurities so as to reach the impurity diffusion region from the other side of the semiconductor substrate is provided. 3. The capacitor according to claim 1, wherein an electrode contacting the surface of the impurity diffusion region is also provided on the other side of the semiconductor substrate.