JPH06140737A - Circuit board - Google Patents

Abstract

PURPOSE:To improve the capacitance precision of a capacitor part formed in a unified body on a circuit board. CONSTITUTION:A multilayered circuit board consists of a ceramic board, an organic material insulating layer 3 formed on the ceramic board, and a capacitor part 4 formed in the organic material insulating layer 3. The capacitor part 4 has a lower electrode 11 formed on a sheet 3a composed of the organic material insulator forming the organic matelial insulating layer 3, by a thin film method.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board, and more particularly to a circuit board integrally having a capacitor section.

[0002]

2. Description of the Related Art As a circuit board used for a hybrid integrated circuit or the like for electronic equipment, there is known a circuit board integrally provided with a capacitor in order to prevent a semiconductor element from malfunctioning due to noise. As a circuit board of this type, Japanese Patent Laid-Open No.
No. 270396 shows a ceramic multilayer circuit board having a capacitor portion formed inside. This circuit board is manufactured by stacking and integrally firing a number of ceramic green sheets including a ceramic green sheet having a capacitor electrode pattern formed by a thick film method.

Further, Japanese Patent Laid-Open No. 3-63237 discloses a circuit board having a capacitor portion including a capacitor electrode formed by a thin film method such as sputtering or vacuum deposition on the surface of a ceramic substrate.

[0004]

The capacitor portion included in the conventional circuit board is difficult to set to a desired capacitance value. This is because it is difficult to accurately form a capacitor electrode pattern by the thick film method in the multilayer circuit board disclosed in Japanese Patent Laid-Open No. 3-270396, and the capacitor electrode pattern by the thick film method has a shrinkage factor during firing. It is believed that this is due to the large variation. On the other hand, JP-A-3-6
In the circuit board of No. 3237, it is considered that the thickness of the capacitor electrode and the thickness of the dielectric layer are likely to be non-uniform because the capacitor electrode is formed on the ceramic substrate whose surface is not smooth by the thin film method.

An object of the present invention is to improve the capacitance accuracy of the capacitor portion integrally formed on the circuit board.

[0006]

A circuit board according to the present invention comprises an insulating substrate, an organic insulating layer formed on the insulating substrate, and a capacitor section. The capacitor section has a capacitor electrode formed on the organic insulating layer by a thin film method.

[0007]

In the circuit board according to the present invention, the capacitor electrode of the capacitor section is formed on the organic insulating layer having a smooth surface. This capacitor electrode can be uniformly formed because the surface of the organic insulating layer is smooth, so that the capacitor portion has high capacitance accuracy.

[0008]

1 shows a multilayer circuit board 1 as an embodiment of the present invention. In the figure, the multilayer circuit board 1 is mainly composed of a ceramic substrate 2, an organic insulating layer 3 formed on the ceramic substrate 2, and a capacitor section 4 provided in the organic insulating layer 3.

The ceramic substrate 2 is made of an aluminum oxide sintered body, a mullite sintered body, an aluminum nitride sintered body, a glass ceramic sintered body, or the like. , Powders of silica, calcia, magnesia and the like are mixed with an organic solvent and a solvent to form a slurry, and the slurry is formed into a sheet by a doctor blade method, a calendar roll method or the like, and a plurality of sheets 2a, 2b, 2c is obtained, and thereafter, the respective sheets 2a, 2b, 2c are laminated on top of each other, fired at a high temperature (about 1600 ° C.), and sintered to be integrated.

An internal wiring layer 5 is formed in the ceramic substrate 2. The internal wiring layer 5 includes the sheets 2a and 2
A predetermined internal wiring pattern shape is formed between b and 2c. 2 shows only a part of the internal wiring layer 5,
Details are omitted. Such internal wiring layers 5 are connected to each other by conductive through holes 5a penetrating the sheets 2b and 2c in the thickness direction. The internal wiring layer 5 is made of a conductive material such as tungsten, molybdenum, or manganese.

A first thin film wiring layer 6 is formed in a predetermined pattern on the surface of the ceramic substrate 2. This first
The thin film wiring layer 6 is connected to the internal wiring layer 5 via a conductive through hole 5b penetrating in the thickness direction of the sheet 2a. The organic insulating layer 3 is a three-layer sheet 3 made of a resin such as polyimide, benzocyclobutene or Teflon.
a, 3b, 3c are integrated. Each sheet 3
A second thin film wiring layer 7, a third thin film wiring layer 8 and a fourth thin film wiring layer 9 are formed in a predetermined pattern on a, 3b and 3c. Each of the thin film wiring layers 7, 8 and 9 partially penetrates the sheets 3a, 3b and 3c on which they are formed, and is connected to each other and to the first thin film wiring layer 6. Each of the above-mentioned thin film wiring layers 6, 7, 8 and 9 comprises a base layer made of copper and a chrome layer formed on both main surfaces of the base layer.
It is a layered structure. A thin film resistance portion 10 is formed on the upper surface of a part of the third thin film wiring layer 8.

As shown in FIG. 2, the capacitor section 4 is mainly composed of a lower electrode 11, an upper electrode 12, and a dielectric layer 13 made of tantalum pentoxide arranged between the electrodes 11 and 12. ing. The lower electrode 11 is a part of the second thin film wiring layer 7, and is formed on the sheet 3a. The lower electrode 11 is made of copper having a chromium layer 14 formed on both surfaces except the contact surface with the dielectric layer 13, and is connected to the first thin film wiring layer 6. The upper electrode 12 is made of copper having a chromium layer 14 formed on the surface opposite to the contact surface with the dielectric layer 13, and is connected to the third thin film wiring layer 8. The chromium layer 14 is formed on the lower electrode 11, the upper electrode 12 and the sheet 3
It is for enhancing the adhesiveness between a and the sheet 3b.

Next, a method of manufacturing the multilayer circuit board 1 will be described. First, the ceramic substrate 2 is prepared. The ceramic substrate 2 is formed from a plurality of (three in this embodiment) ceramic green sheets. After forming through holes for forming the through holes 5a and 5b in the ceramic green sheet, a paste made of the above-mentioned conductor material is printed on a predetermined internal wiring layer 5 pattern by a screen printing method. The same paste is also filled in the through holes.
Next, the ceramic green sheets are laminated in a predetermined order to form a laminated body, which is fired at an appropriate temperature. As a result, the ceramic substrate 2 including the internal wiring layer 5 is obtained.

Next, the organic insulating layer 3 is formed on the ceramic substrate 2. Here, first, a chromium layer and a copper layer are formed in this order on the upper surface of the ceramic substrate 2 by a thin film method such as vapor deposition and sputtering. Subsequently, a series of processes of applying a photosensitive resist, developing and etching are performed to form the first thin film wiring layer 6 having a desired pattern. Then the first
A photosensitive resin paste such as photosensitive polyimide is applied on the ceramic substrate 2 on which the thin film wiring layer 6 is formed by a spin coating method, and a series of baking, exposing, developing and baking processes are performed. This is further fired in a furnace in a nitrogen atmosphere set to about 400 ° C. to form the first layer 30 (FIG. 2) of the sheet 3a. Further, a photosensitive resin paste is applied on the first layer 30 by a spin coating method, and a series of treatments of baking, exposure, development and baking are performed. When this is fired in the same furnace, the second layer 31 (FIG. 2) of the sheet 3a is formed. As a result, the sheet 3a is formed on the ceramic substrate 2. Since the sheet 3a is made of a photosensitive resin paste applied by the spin coating method, the surface roughness is in the range of 0.02 to 0.05 μm and the surface is smooth. In the manufacturing process of such a sheet 3a, the first
In order to secure the connection between the thin film wiring layer 6 and the second thin film wiring layer 7, a through hole having a diameter of about 300 μm is formed in the first layer 30, and a through hole having a diameter of about 200 μm is formed in the second layer 31.

Next, a chromium thin film layer having a thickness of 0.1 μm and a copper thin film layer having a thickness of about 2 μm are formed in this order on the sheet 3a by a sputtering method, and a series of photosensitive resist coating, development and etching are performed on the film. By performing the processing, the second thin film wiring layer 7 and the lower electrode 11 are formed. Here, since the lower electrode 11 is formed on the sheet 3a having a smooth surface, the film thickness becomes uniform.

Next, a tantalum pentoxide layer having a thickness of about 0.1 μm is formed on the sheet 3a by a sputtering method.
Then, a photosensitive resist film is formed on the tantalum pentoxide layer, and the tantalum pentoxide layer except the tantalum pentoxide layer on the lower electrode 11 is etched by ion milling. As a result, the dielectric layer 13 is formed on the lower electrode 11.

Next, the thickness is about 2 by the sputtering method.
A copper thin film layer having a thickness of μm and a chromium thin film layer having a thickness of 0.1 μm are formed in this order. Then, the film forming layer on the dielectric layer 13 is protected by a photosensitive resist film, and the other film forming layers are removed using a potassium ferricyanide-based etching solution and an ammonium persulfate-based etching solution in this order. As a result, the upper electrode 12 is formed on the dielectric layer 13 and the capacitor section 4 is formed.

Sheets 3b, 3c of the organic insulating layer 3 and the third
The thin film wiring layer 8 and the fourth thin film wiring layer 9 are formed by the same method as described above. The thin film resistance portion 10 is formed by forming a tantalum-silicon thin film having a thickness of about 0.1 μm on the third thin film wiring layer 8 by a sputtering method. Fourth
A nickel plating layer and a gold plating layer are formed in this order on the thin film wiring layer 9 by an electroless plating method. As a result, the multilayer circuit board 1 on which the semiconductor element can be surface-mounted is completed.

In this embodiment, since the lower electrode 11 of the capacitor section 4 is formed uniformly, it is easy to set the capacitance of the capacitor section 4 to a desired value. Moreover, since the thickness of the dielectric layer 13 (distance between electrodes) can be set as small as 0.01 to 1.0 μm because the thickness of the lower electrode 11 is uniform, the capacitor unit 4 is required even if the electrode area is reduced. It is easy to set a large capacity.

[Other Embodiments] (a) Although the capacitor section 4 is provided in the organic insulating layer 3 in the above-described embodiment, the present invention is the same when the capacitor section 4 is provided on the uppermost surface of the organic insulating layer 3. Can be carried out. (B) In the above embodiment, the lower electrode 11 of the capacitor unit 4
The upper electrode 12 and the upper electrode 12 are formed of a copper thin film layer having a chromium thin film layer on both ends, but these electrodes 11 and 12 may be formed using other materials. For example, it may be a single-layer or multi-layer thin film conductor layer of a metal such as aluminum, tungsten, nickel or nickel-chromium. Further, although tantalum pentoxide was used for the dielectric layer 13 of the capacitor part 4, it is composed of at least two kinds of elements selected from barium, lead, zirconium, titanium, tungsten and the like having a large relative permittivity instead of tantalum pentoxide. You may use the dielectric material which contains a complex oxide as a component.

[0021]

In the circuit board according to the present invention, since the capacitor electrode of the capacitor section is formed on the organic insulating layer having a smooth surface, the capacitance accuracy of the capacitor section is high.

[Brief description of drawings]

FIG. 1 is a vertical cross-sectional view of a multilayer circuit board according to an embodiment of the present invention.

FIG. 2 is an enlarged partial view of FIG.

[Explanation of symbols]

 1 Multilayer Circuit Board 2 Ceramic Substrate 3 Organic Insulation Layer 3a Sheet 4 Capacitor Section 11 Lower Electrode

Claims (1)

[Claims] 1. A circuit board comprising: an insulating substrate; an organic insulating layer formed on the insulating substrate; and a capacitor section having a capacitor electrode formed on the organic insulating layer by a thin film method.