KR19990023783A - Multilayer wiring board and its manufacturing method - Google Patents

Abstract

Compared with the prior art, it has been difficult to realize a multilayer wiring board which can be significantly downsized and a manufacturing method thereof.

A multilayer wiring board, comprising: a conductive layer having a desired pattern laminated on one side of an insulating substrate, a high dielectric layer formed of a high dielectric material formed on a predetermined electrode of the conductor layer; An electrode layer made of an electrode material laminated on the entire layer and an insulating layer made of an insulating material laminated on the one surface of the insulating substrate are formed so as not to be exposed. In the method for manufacturing a multilayer wiring board, a first step of laminating a conductor layer having a predetermined pattern on one surface side of an insulating substrate, and a film for forming a high dielectric layer made of a high dielectric material on a predetermined electrode of the conductor layer. A second step of laminating an electrode layer made of an electrode material on the high dielectric layer, and a fourth step of laminating an insulating layer made of an insulating material so that the electrode layer is not exposed on one surface of the insulating substrate. To have.

Description

Multilayer wiring board and its manufacturing method

BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to a multilayer wiring board and a method of manufacturing the same, and is suitable for application to, for example, a multilayer ceramic wiring board.

Conventionally, there exist some which were comprised as FIG. 1 as a multilayer ceramic wiring board.

In the multilayer ceramic wiring board 1 having such a structure, a conductor layer (wiring pattern) 3A to 3I having a desired pattern is formed on one surface of the glass ceramic substrates 2A to 2F, and the glass ceramic substrates 2A to 2F are formed. ) Is formed by baking a plurality of sheets by stacking them over the dielectric sheets 4A and 4B made of a dielectric material as necessary.

In this case, resistors 5A and 5B are formed by printing a resistive material on conductive conductors 3B to 3H so as to conduct conductive connection between predetermined electrodes, and dielectric sheets 4A and 4B are covered. The conductor layers 3B and 3C, 3F and 3G are formed with electrodes 3BX and 3CX, 3FX and 3GX so as to face through the dielectric sheets 4A and 4B, respectively, so that these electrodes 3BX and 3CX, 3FX and 3GX and The capacitors 6A and 6B formed of the dielectric sheets 4A and 4B are formed.

As a result, in this type of multilayer ceramic wiring board 1, the number of resistors and capacitors mounted on the surface of the multilayer ceramic wiring board 1 is as much as that of the resistors 5A and 5B and the capacitors 6A and 6B. It can reduce and it is comprised so that the said surface can be used effectively.

By the way, the capacitance of the capacitor is inversely proportional to the distance between the electrodes and directly proportional to the dielectric constant of the dielectric disposed between the electrodes.

However, in such a multilayer ceramic wiring board 1, alumina is used as the dielectric sheet 4A and 4B due to problems in handling of the dielectric sheets 4A and 4B, expansion coefficient and shrinkage ratio, and the like. [Mu] m] and a dielectric constant (about 5 to 6) are used, which causes a problem that a large capacity capacitor cannot be formed inside.

In fact, when the alumina thin plate having a thickness of 50 [μm] and a dielectric constant of 7 is used as the dielectric sheets 4A and 4B, the obtained capacitance is about 1.2 × 10 ⁻⁶ [F / m ² ] per unit area and can be used in small products. Since the practical area per one high dielectric capacitor is about 10 [mu] m to 10 [mm] square, the capacity per one high dielectric capacitor is about 0.0001 [pF] to 120 [pF].

For example, in a telephone, as a baseband circuit block (BB block) and a high frequency circuit block (RF block), the capacitor has a capacitance in the range of about 2 [pF] to 1000000 [pF], for example. As many as 100 are used, therefore, even if the multilayer ceramic wiring board 1 is used in such a telephone, only a small part of the necessary capacitor can be formed inside the multilayer ceramic wiring board 1, and thus the surface of the capacitor for mounting the capacitor is still present. There was a problem that required a large area.

On the other hand, in low-temperature-fired ceramic substrates, gold (Au), platinum (Pt), silver (Ag), or copper (Cu) is used as the conductor material, but gold or platinum-based materials have a high cost. In addition, silver has a problem of being susceptible to migration. On the other hand, a copper conductor material has an advantage in cost, but it is easy to oxidize, and thus there is a problem that it is difficult to form a resistor or a capacitor in the surface layer.

Therefore, for example, in a multilayer ceramic substrate, if a capacitor having a high capacity can be formed therein, the mounting area necessary for mounting the capacitor is reduced as much as the number of capacitors mounted on the surface thereof can be reduced or zero. If omitted, the multilayer ceramic wiring board as a whole can be downsized, and if copper can be used as the conductive material at this time, it is considered that the multilayer ceramic substrate can be manufactured at low cost.

SUMMARY OF THE INVENTION The present invention has been made in consideration of the above points, and is intended to propose a multilayer wiring board and a method of manufacturing the same which can be miniaturized significantly compared with the prior art.

1 is a cross-sectional view showing one configuration example of a conventional multilayer ceramic wiring board.

2 is a cross-sectional view showing the configuration of a multilayer ceramic wiring board according to the present embodiment.

3 is a cross-sectional view showing the configuration of a capacitor according to the present embodiment.

4 is a cross-sectional view used for explaining the manufacturing procedure of the multilayer ceramic wiring board according to the present embodiment.

5 is a cross-sectional view used for explaining the manufacturing procedure of the multilayer ceramic wiring board according to the present embodiment.

Explanation of symbols for main parts of drawings

10: multilayer ceramic wiring board 11A-11F: conductor layer

12A-12D glass ceramic substrate 13: insulating layer

14A to 14E: Through Hole 15A to 15C: Resistor

16 condenser 20 barrier metal layer

21: high dielectric layer 22: upper electrode layer

In order to solve this problem, in the present invention, a multi-layered wiring board includes a conductor layer having a desired pattern laminated on one surface side of an insulating substrate, and a high dielectric layer formed of a high dielectric material formed on a predetermined electrode of the conductor layer; And an electrode layer made of an electrode material laminated on the high dielectric layer, and an insulating layer made of laminated insulating material so as not to expose the electrode layer on one surface of the insulating substrate.

As a result, by selecting the high dielectric material and the thickness of the high dielectric layer forming the high dielectric layer, a capacitor having a large capacity and desired capacity composed of the electrode of the conductor layer, the high dielectric layer, and the electrode layer is formed inside the multilayer wiring board. Can be formed on.

In the present invention, in the method for manufacturing a wiring board, a first step of laminating a conductor layer having a predetermined pattern on one surface side of an insulating substrate, and a high dielectric layer made of a high dielectric material on the electrode of the conductor layer is provided. A second step of forming a film, a third step of laminating an electrode layer made of an electrode material on the high dielectric layer, and a fourth step of laminating an insulating layer made of an insulating material so that the electrode layer is not exposed on one surface of the insulating substrate. It was made to process with.

As a result, by selecting the high dielectric material and the thickness of the high dielectric layer forming the high dielectric layer, a multilayer wiring board having a large capacity made of the electrode of the conductor layer, the high dielectric layer, and the electrode layer and having a capacitor having a desired capacity Can be prepared.

EMBODIMENT OF THE INVENTION Next, one Embodiment of this invention is described in detail with reference to drawings.

(1) Configuration of the multilayer ceramic wiring board according to the present embodiment

In Fig. 2, reference numeral 10 denotes the multilayer ceramic wiring board according to the present embodiment as a whole, and a plurality of glass ceramic substrates 12A to 12D in which conductor layers 11A to 11E of desired patterns are formed on one surface side are laminated and fixed. At the same time, an insulating layer 13 made of an epoxy resin material is laminated on the surface of the topmost glass ceramic substrate 12A, and a conductive layer 11F having a desired pattern is formed on the insulating layer 13. It is.

In this case, conductive paths 14A to 14E for electrically connecting adjacent conductor layers 11A to 11F are formed at predetermined positions of the glass ceramic substrates 12A to 12D and the insulator layer 13, respectively. In the conductor layers 11A and 11B, resistors 15A to 15C are formed by printing a resistor material between predetermined electrodes.

In the conductor layer 11A formed on the topmost glass ceramic substrate 12A, a capacitor 16 is formed using a thin film forming process.

In fact, in this capacitor 16, as shown in Fig. 3, a barrier metal layer 20 for preventing diffusion of copper and oxygen is formed on the conductor layer 11A formed on the topmost glass ceramic substrate 12A. At the same time, a high dielectric layer 21 made of a high dielectric material is laminated on the barrier metal layer 20, and an upper electrode layer 22 made of an electrode material such as gold is formed on the high dielectric layer 21. It is comprised by laminating.

In this case, the high-k dielectric layer 21 may be tantalum oxide (relative dielectric constant 20-25), barium titanium oxide (BaTiO ₃ , relative dielectric constant 2000) or strontium titanium oxide (SrTiO ₃ , dielectric constant 150-200). Film of about 100 [kPa] to 5000 [kPa] on the barrier metal layer 20 using a technique such as printing, spin coating, sputtering or chemical vapor deposition (CVD). It is formed by supplying in thickness.

Accordingly, in the multilayer ceramic wiring board 10, a capacitor having a large capacity and a desired capacity is selected by selecting a high dielectric material for forming the high dielectric layer 21, a film thickness of the high dielectric layer 21, or the like. It is made to form on.

(2) Manufacturing procedure of the multilayer ceramic wiring board according to the present embodiment

Here, such a multilayer ceramic wiring board 10 can be manufactured according to the following procedure shown to FIG. 4 (A)-FIG. 5 (C).

That is, first, ceramic material powders such as alumina, borosilicate oxide and silicon oxide are mixed, mixed with water or alcohol, and then mixed evenly. Then, the resulting kneaded body is elongated to give a thin plate (for example, 20-200 [micrometer] in thickness, 5-200 [cm] in length and width) are formed.

Subsequently, the thin ceramic plates are heated to tens to hundreds of degrees (about 50 to 400 [deg.] C.) to evaporate most of the solvent to obtain glass ceramic substrates 12A to 12D as shown in FIG. After formation, as shown in FIG. 4B, one or both surfaces of the glass ceramic substrates 12A to 12D contain a conductive material made of a single substance or a compound of gold, copper, platinum, or tungsten. The conductor layers 11A-11E of a desired pattern are formed using a solution. In this case, each of the conductor layers 11A to 11E forms a wiring pattern having a line width of about 10 to 1000 [μm] and a thickness of about 0.1 to 50 [μm] by using a printing or spin coating method. It can form by heating to several hundred degrees (about 50-400 degreeC) and evaporating most of a solvent.

In this way, the number of sheets of glass ceramic substrates 12A to 12E in which the conductor layers 11A to 11E of the desired pattern are formed is fabricated as many as the desired number of layers.

Subsequently, as shown in Fig. 4C, holes are punched at predetermined positions of each of the ceramic substrates 12A to 12D produced as described above with a punch or the like. The conductive paths 14A to 14E for electrically connecting the predetermined conductor layers 11A to 11E are formed by filling the gaps with each other.

Then, after overlapping each of these ceramic substrates 12A to 12D in a positioning state, the ceramic substrates 12A to 12D are heated to several hundred degrees (400 to 1300 [deg.] C.) while pressing so as not to be displaced, and the solvent is evaporated. In addition, the multilayer ceramic wiring board 30 as shown in FIG. 4D is formed by curing the ceramic material, lowering the resistance value of the conductive material, and stabilizing the resistance value of the resistor thin film. The heat treatment is performed under a reducing atmosphere containing hydrogen or an inert atmosphere such as nitrogen.

In order to improve the characteristics of the top and bottom conductor layers 11A and 11E of the multilayer ceramic wiring board 30, gold, palladium or platinum may be used on these conductor layers 11A and 11E as necessary. A metal layer is formed.

Subsequently, as shown in Fig. 4E, tungsten, ruthenium, or tungsten is used on the top and / or bottom conductor layers 11A and 11E of the multilayer ceramic wiring board 30 by using a method such as printing, sputtering, or CVD. Ruthenium oxide and the like are deposited and subjected to a high temperature oxidation treatment (300-850 [deg.] C., heat treatment for about 0.1 to 180 minutes in an oxygen-containing atmosphere) to make the barrier metal layer 20 approximately 0.005 to 10 [mu] m. It is formed to the thickness of.

Subsequently, printing, spin coating, sputtering or CVD or the like is performed on the barrier metal layer 20 laminated on the predetermined electrode in the uppermost layer and / or lowermost conductive layer 11A, 11E of the multilayer ceramic wiring board 30. A high dielectric layer 21 made of a high dielectric material such as tantalum oxide or barium titanium oxide is formed. At this time, the thickness, dielectric constant, tan δ, breakdown voltage, and the like of the high-k dielectric layer 21 are selected to optimal values as required.

Subsequently, the multilayer ceramic wiring board 30 having the high dielectric layer 21 formed thereon is heat-treated for about 0.1 to 180 minutes in a predetermined atmosphere such as an oxygen atmosphere at 300 to 800 [° C]. After improving the electrical characteristics, as shown in Fig. 5A, the upper electrode 22 is formed on the high dielectric layer 21 using a desired electrode material such as gold. Thereby, the capacitor | condenser 16 can be obtained. At this time, if necessary, the resistor 15A is formed by supplying ruthene oxide or the like between predetermined electrodes of the conductor layers 11A and 11E formed on the uppermost layer or the lowermost layer of the multilayer ceramic wiring board 30.

In addition, in order to improve the electrical characteristics of the high-k dielectric layer 21 of the capacitor 16, heat treatment is performed at 200 to 500 [deg.] C for about 0.1 to 180 minutes, and then, if necessary, the capacity of the capacitor 16 and the resistor The resistance value of 15A is trimmed.

Subsequently, on the surface of one or both of the multilayer ceramic wiring boards 30, the polyimide or the like is printed by a method such as printing, spin coating or cladding at a thickness such that the upper electrode layer 22 of the capacitor 16 is not exposed. The insulating layer 13 which consists of insulating resin materials, such as an epoxy resin, is formed, and a through hole is formed in the predetermined position of the insulating layer 13 using a conventional method hereafter. At this time, for example, when a photosensitive polyimide or epoxy resin is employed as the material of the insulating layer 13, ultraviolet rays or the like are irradiated to a corresponding position and developed, and then the insulating layer ( Through hole can be formed by hardening 13).

Then, on the surface of the multilayer ceramic wiring board 30 in which the insulating layer 13 is laminated in this manner (that is, the surface of the insulating layer 13), a conductor layer 11F having a desired pattern using a method such as printing or plating. ), And at the same time, the conductive path 14A is formed by filling the through hole with a conductive material. Thereby, the multilayer ceramic wiring board 10 as shown in FIG. 5 (C) can be obtained.

(3) Operation and Effects of the Embodiment

In the above configuration, in the multilayer ceramic wiring board 10 according to this embodiment, the barrier metal is formed on the predetermined electrodes of the conductor layers 11A and 11E stacked on the uppermost and / or lowermost ceramic substrates 12A and 12D. The capacitor 16 is formed by stacking the layer 20, the high dielectric layer 21 made of a high dielectric material, and the upper electrode layer 22 sequentially.

Therefore, in this multilayer ceramic wiring board 10, the coefficient of thermal expansion and shrinkage as a material of the high dielectric layer 21 is so high that the high dielectric layer 21 of the capacitor 16 does not form one layer of the multilayer ceramic wiring board. It is possible to use a material having a desired high dielectric constant without considering this, and to form a high-k dielectric layer 21 having a thin film thickness by forming the high-k dielectric layer 21 using the thin film forming process, It is possible to form a capacitor 16 having a large capacity and a desired capacity.

In the multilayer ceramic wiring board 10, the barrier metal layer 20 made of tungsten or the like is formed on predetermined electrodes of the conductor layers 11A and 11E formed on the top and / or bottom ceramic substrates 12A and 12D. Since the copper is not used, for example, even when copper is used as the conductor material of the conductor layers 11A and 11E, diffusion of the copper and oxygen can be avoided by the barrier metal layer 20 in advance. Therefore, in this multilayer ceramic wiring board 10, copper can be used as a conductor material, and it can be constructed at such a low price.

In the multilayer ceramic wiring board 10, the capacitors 16 are formed by the thin film forming process, so that the capacitors 16 can be formed at low cost regardless of the number, so that the capacitors 16 can be sufficiently mounted. Can be.

In this multilayer ceramic wiring board 10, the capacity of the capacitor 16 incorporated as described above can be measured and evaluated during manufacturing. Therefore, the capacity of the capacitor 16 is adjusted by a mechanical method or the like, and the capacity value is adjusted to the required value. Can match.

In addition, in this multilayer ceramic wiring board 10, a large capacity capacitor 16 can be arranged very near the high frequency IC (Integrated Circuit), etc., so that the wiring lines therebetween can be shortened, Noise leakage can be suppressed. At this time, it is possible to control tan δ to be optimal by changing materials and processes.

According to the above structure, the barrier metal layer 20, the high dielectric layer 21 which consists of a high dielectric material, and the upper electrode layer 22 on the predetermined | prescribed electrode of the conductor layers 11A and 11E using the thin film formation process. The capacitor 16 is formed by stacking and successively, so that the capacitor 16 having a large capacity and a desired capacity can be formed. In this way, all the capacitors to be mounted on the multilayer ceramic wiring board 10 can be formed inside the multilayer ceramic wiring board 10, and the area for mounting the capacitors on the surface of the multilayer ceramic wiring board 10 by that much. By omitting the multi-layered ceramic wiring board, which can be significantly downsized as compared with the prior art, can be realized.

(4) Other Embodiment

In the above-described embodiment, the case where tungsten, ruthenium or ruthenium oxide RuOx (X = 0.05 to 2.0) or the like is applied as the material of the barrier metal layer 20 of the capacitor 16 has been described. Is not limited to this, and the main point is a material capable of preventing the diffusion of copper and oxygen. Other materials for the barrier metal layer 20 include Ir-Hf-Ox, PdRhO, PdRuO, and Ti / Ir-Hf-. Various materials, such as Ox, Ti / Ir-Hf-Ox / Pt, Ti / Ir-Hf-Ox / Ti / Pt, Ti / Ir-Hf-Ox / Ti / Ir, can be used. The barrier metal layer 20 may be formed into a multilayer thin film structure by combining thin films made of these materials.

In the above-described embodiment, the case where tantalum oxide, BaTiO ₃ , SrTiO ₃ (STO), or the like is applied as the material of the high dielectric layer 21 of the capacitor 16 has been described. The material of the high-k dielectric layer 21 is not limited thereto, and other materials include BaSrTiO ₃ (BST, relative dielectric constant 500 to 860), PdLaZrTiO ₃ (PLZT, relative dielectric constant 750 to 4000), PdTiO ₃ (relative dielectric constant 100 to 200), and the like. Several high dielectric constants can be applied. As the material of the high-k dielectric layer 21 of the capacitor 16, a perovskite structure dielectric material similar to the high-k dielectric material, such as PbZrTiO ₃ (PZT, relative dielectric constant 350 to 1000), may be used. You may also At this time, tan δ can also be selected as an optimal material and composition as necessary, and a plurality of compositions, thicknesses and areas can also be created or selected.

In addition, in the above-described embodiment, the case where the capacitor 16 according to the present invention is formed on the surface of the multilayer ceramic wiring board 30 has been described. However, the present invention is not limited to this, and the multilayer ceramic wiring board ( 30 may be formed inside.

In addition, in the above-described embodiment, the case where the present invention is applied to the multilayer ceramic wiring board 10 has been described. However, the present invention is not limited to this, and can be applied to various multilayer wiring boards.

In addition, in the embodiment described above, the case where the insulating layer 13 made of a resin material is formed on the surface of the glass ceramic substrate 12A of the outermost layer of the multilayer ceramic wiring board 30 will be described. However, the present invention is not limited to this, and various other materials can be used as the material of the insulating layer 13. In this case, when the capacitor 16 according to the present embodiment is formed inside the multilayer ceramic wiring board 30, the upper glass ceramic substrates 12A to 12D serve as an insulating layer.

In the above embodiment, after the barrier metal layer 20 is formed on the conductor layers 12A and 12E on the surface of the multilayer ceramic wiring board 30, the high dielectric layer 21 of the capacitor 16 is formed. Although the case where it was formed was demonstrated, this invention is not limited to this, When the conductor layer 12A is formed using the conductor material which does not oxidize well, you may abbreviate | omit the barrier metal layer 20. FIG.

As described above, according to the present invention, in the multilayer wiring board, a high dielectric layer composed of a conductor layer having a desired pattern laminated on one side of the insulating substrate, a high dielectric material formed on a predetermined electrode of the conductor layer, and intrinsic A high dielectric material and a high dielectric layer for forming a high dielectric layer by forming an electrode layer made of an electrode material laminated on the entire layer and an insulating layer made of an insulating material laminated on one surface of the insulating substrate so as not to expose the electrode layer. The capacitor of the conductor layer, the high dielectric layer, and the electrode layer can be formed inside the multilayer wiring board by selecting the thickness and the like. In this way, all the capacitors to be mounted on the multilayer wiring board can be formed therein, and the area for mounting the capacitors on the surface of the multilayer wiring board can be omitted by that amount, and the size of the capacitors can be significantly reduced as compared with the prior art. Multi-layered wiring board can be realized.

In the present invention, in the method for manufacturing a multilayer wiring board, a first step of laminating a conductor layer having a predetermined pattern on one surface side of an insulating substrate, and a high dielectric layer made of a high dielectric material on a predetermined electrode of the conductor layer. A second step of forming a film, a third step of stacking an electrode layer made of an electrode material on the high dielectric layer, and a step of laminating an insulating layer made of an insulating material so that the electrode layer is not exposed on one surface of the insulating substrate. In the process of step 4, a capacitor having a large capacity and desired capacity composed of the electrode of the conductor layer, the high dielectric layer, and the electrode layer is selected by selecting the high dielectric material and the thickness of the high dielectric layer forming the high dielectric layer. It is possible to manufacture a multilayer wiring board containing the. In this way, all the capacitors to be mounted on the multilayer wiring board can be formed therein, and the area for mounting the capacitors on the surface of the multilayer wiring board can be omitted by that amount, and the size of the capacitors can be significantly reduced compared to the conventional art. The manufacturing method of a multilayer wiring board can be realized.

Claims (4)

Substrate, A conductor layer laminated on one surface side of the substrate and forming a pattern; A high dielectric layer formed on an electrode portion of the conductor layer, An electrode layer laminated on the high dielectric layer; A cover layer formed on the substrate and laminated to cover the electrode layer; Multilayer wiring board, characterized in that consisting of. The method of claim 1, having a barrier metal layer on the conductor layer, And the high dielectric layer is laminated on the conductor layer through the barrier metal layer. Laminating a conductor layer on one side of the substrate and forming a pattern; Forming a high dielectric layer on an electrode portion of the conductor layer; Stacking and forming an electrode layer on the high dielectric layer; Forming a cover layer by laminating an insulating material on the substrate to cover the electrode layer; Method for producing a multilayer wiring board, characterized in that consisting of. Laminating a conductor layer on one side of the substrate and forming a pattern; Laminating a barrier metal layer made of a material for preventing oxidation on the conductor layer; Forming a high dielectric layer on the electrode portion of the conductor layer through the barrier metal layer; Stacking and forming an electrode layer on the high dielectric layer; Forming a cover layer by laminating an insulating material on the substrate to cover the electrode layer; Method for producing a multilayer wiring board, characterized in that consisting of.