JPH06132302A - Method of manufacture thin film transistor - Google Patents

Abstract

PURPOSE:To enable the high operational characteristics to be displayed by a method wherein an amorphous silicon thin film ions are implanted using an inorganic protective film as an implantation stopper to form low resistance semiconductor layers and then at least either one out of the film thickness or the outside dimension of the inorganic protective film is to be reduced. CONSTITUTION:The thin film transistor composed of a gate electrode 12, a gate insulating film 13, an amorphous silicon thin film, low resistance semiconductor layers 18a, 18b, an inorganic protective film 15, a source electrode 19 and a drain electrode 20 formed on an insulating substrate 11 is manufactured. At this time, the inorganic protective film 15 is formed into a shape on the amorphous silicon thin film to implant ion species containing impurity element ions in the amorphous silicon thin film using the inorganic protective film 15 as an implantation stopper for the formation of the low resistance semiconductor layers 18a, 18b. Later, at least either one out of the film thickness or the outside dimension of the inorganic protective film 15 is reduced. For example, the inorganic protective film 15 is etched away using a hydrofluoric acid base processing solution to remove a part of an ion implanting part 17a.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a thin film transistor used as an active element of an active matrix type liquid crystal display element.

[0002]

2. Description of the Related Art As a display device using a liquid crystal, a large-capacity and high-density active matrix type liquid crystal display device directed to a television display, a graphic display or the like has been developed and put into practical use. In such a display device, a semiconductor switch is used as a means for driving and controlling each pixel so that high-contrast display without crosstalk can be performed. As the semiconductor switch, a thin film transistor formed on a transparent insulating substrate is usually used because it can be used for transmissive display and can be easily enlarged. Among them, a thin film transistor using amorphous silicon is the most common because it can be formed on a large area substrate and can be processed at a low temperature.

The structure of a thin film transistor is roughly classified into a coplanar type or a staggered type depending on the relative positional relationship between the gate electrode, the semiconductor thin film layer, the source electrode and the drain electrode. In the case of an amorphous silicon thin film transistor formed on an insulating substrate, the latter, which has many useful surfaces in the manufacturing process, is often used. Above all, as shown in FIG. 6, the gate electrode 2 and the gate insulating film are formed on the insulating substrate 1. The reverse staggered type is generally used in which the film 3, the amorphous silicon thin film 4, the low resistance semiconductor layer 5, the source electrode 6 and the drain electrode 7 are formed in this order.

In particular, as shown in FIG. 6, an inorganic protective film 8 made of, for example, silicon nitride is formed between the amorphous silicon thin film 4 and the low resistance semiconductor layer 5 and processed into a predetermined shape. By doing so, a structure having a structure that improves the workability of the low resistance semiconductor layer 5 is also used.

Generally, in an active matrix type liquid crystal display device, two substrates each subjected to an alignment treatment by rubbing are arranged parallel to each other so that their alignment directions are 90 degrees. A twisted nematic (TN) type liquid crystal device in which a nematic type liquid crystal composition is sandwiched between the two is widely used.

By the way, in this type of amorphous silicon thin film transistor, as shown in FIG. 6, a low resistance semiconductor layer 5 is formed between the amorphous silicon thin film 4 and the source and drain electrodes 6 and 7. It is common. This low resistance semiconductor layer 5 plays a role of electrically connecting the amorphous silicon thin film 4 and the source and drain electrodes 6 and 7 in an ohmic state.
The low-resistance semiconductor layer is formed by plasma CVD using a gas containing an element that can serve as a donor for silicon, such as phosphorus, as a raw material, and is laminated on the amorphous silicon thin film, and FIG. As shown in the drawing, the resistance of the amorphous silicon thin film itself is lowered by a technique called so-called ion implantation in which an element that can serve as a donor to silicon, such as phosphorus, is ionically injected from the outside, and an ohmic contact layer with the upper source and drain electrodes is formed. The method of forming the is generally used. (For example, RUUD EI SCHROPPet.al. "On the Qualit
y of Contacts in a-Si: H Staggered Electrode Thin-F
ilm Transisters "IEEE TRANSACTIONS ON ELECTRON DEV
ICES, VOL.ED-32, NO.9, SEPTEMBER 1985)

As in the former case, the method of stacking the low resistance semiconductor layer on the upper portion of the amorphous semiconductor thin film by the CVD is a method that has been performed before. However, the plasma CVD method used for the film formation is This method involves many problems such as 1) generation of dust and (2) poor operating rate. On the other hand, in the ion implantation method, since the amorphous silicon thin film itself formed in the previous step is modified into a low resistance semiconductor layer by ion implantation, it does not theoretically include the problem found in the plasma CVD method. Further, ion implantation can be performed on the amorphous silicon thin film and can be performed in a self-aligned manner by using the inorganic protective film processed into a desired shape as a mask, which enables high performance and miniaturization of the thin film transistor.

[0008]

However, in the thin film transistor manufactured by the conventional ion implantation method as shown in FIG. 4, as compared with the structure shown in FIG. 6 in which CVD is used for forming the low resistance semiconductor layer, the thin film transistor is formed. The off voltage of the device may rise, which is a problem when the device is actually operated.

Therefore, as a result of the analysis by the present inventor of this cause, as shown in FIG. 4 (c), the conventional ion implantation method showed that the implantation of the ion species including the impurity ions into the amorphous silicon thin film was not conducted. Since it is performed in a self-aligned manner by using the inorganic protective film formed on the crystalline silicon thin film and processed into a desired shape as a mask, it is implanted into the source and drain regions of the amorphous silicon thin film in the implantation process. It was found that the same amount of ions was injected into the inorganic protective film as the cause. That is, a large amount of ions in the inorganic protective film affects the interface between the amorphous silicon thin film and the inorganic protective film.

The present invention was conceived as a ship in such conventional circumstances, and an amorphous silicon thin film transistor capable of obtaining high operating characteristics is obtained by reducing the amount of ionic species present in the inorganic protective film. It is intended to be provided.

[0011]

The present invention is a thin film transistor having a gate electrode, a gate insulating film, an amorphous silicon thin film, a low resistance semiconductor layer, an inorganic protective film, a source electrode and a drain electrode formed on an insulating substrate. Regarding the manufacturing method of, the step of forming and shaping an inorganic protective film on the amorphous silicon thin film, and using the inorganic protective film as an injection stopper,
A step of implanting an ion species containing impurity element ions into an amorphous silicon thin film to form a low resistance semiconductor layer, and reducing at least one of the thickness and the external dimension of the inorganic protective film after the low resistance semiconductor layer is formed. And the process.

[0012]

According to the present invention, after the low resistance semiconductor layer is formed by implanting the ionic species containing the impurity ionic species, at least the thickness, the outer dimension or both of the inorganic protective film is reduced so that the ions in the inorganic protective film are reduced. The injection part is partially removed. As a result, by reducing the amount of ionic species present in the inorganic protective film as compared with the conventional one, an amorphous silicon which can obtain high operating characteristics in which the transistor characteristics are not affected by the ionic species present in the inorganic protective film. A thin film transistor can be formed.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The details of the present invention will be described below with reference to the drawings.

FIG. 1 and FIG. 2 respectively show, as an embodiment of the present invention, at least the thickness of the inorganic protective film, the external dimensions, or both after the formation of the low-resistance semiconductor layer by the implantation of ion species containing impurity element ions. FIG. 6 is a schematic cross-sectional view shown for explaining the structure and the manufacturing method for reducing the amount. First, as shown in FIG. 2A, a gate electrode 12 is formed on an insulating substrate 11, and subsequently, as shown in FIG. 2B, a gate insulating film 13 is formed by plasma and atmospheric pressure so as to cover the gate electrode 12. Then, a silicon nitride film is formed on the gate electrode 12 with a film thickness of 4 by using monosilane as a raw material by a CVD method such as pressure reduction.
000 angstroms are formed. After that, FIG. 2 (c)
As shown in FIG. 5, for example, an amorphous silicon thin film 14 having a film thickness of 500 angstrom and an inorganic protective film 15 having a film thickness of 2000 angstrom are formed. Next, after processing the inorganic protective film 15 into a predetermined shape, an ion of an element that can serve as a donor,
For example, phosphorus ions are used as an acceleration voltage of 10 kV and a dose of 1E16.
/ Cm ² Inject. At this time, the above-mentioned inorganic protective film 15
Can serve as an implantation stopper during phosphorus ion implantation,
Ions are not implanted in the channel region 16 of the thin film transistor, and the aforementioned ion implantation is self-aligned. Further, when the ionic species are implanted into the amorphous silicon thin film 14, the same amount of ionic species as that implanted into the amorphous silicon thin film 14 is also implanted into the inorganic protective film 15, and The injection part 17a is formed. As a result, the source region 18a and the drain region 18b are formed together with the channel region 16 as the low resistance semiconductor layer 18 which is a low resistance semiconductor-made amorphous silicon thin film. After that, as shown in FIG. 2D, the inorganic protective film 15 is etched using, for example, a hydrofluoric acid-based treatment solution until the film thickness of the inorganic protective film 15 reaches, for example, 2000 angstroms.
A part of 7a is removed. At this time, the outer dimensions of the inorganic protective film 15 may be reduced due to side etching. Then, as shown in FIG. 2E, a source electrode 19 and a drain electrode 20 are formed by forming an electrode material that can serve as the source and drain electrodes, for example, Al to a film thickness of 3000 angstroms and processing the shape.
In this way, an array substrate having thin film transistors as shown in FIG. 1 is obtained. By combining this array substrate and a counter substrate on which counter electrodes and the like are formed, and by sandwiching liquid crystal in this gap, a desired active matrix is obtained. Type liquid crystal display device is obtained.

In order to explain the embodiment shown in FIGS. 1 and 2, FIG. 3 shows a low resistance semiconductor layer formed by implanting an ionic species including an impurity ionic species in a process of manufacturing an amorphous silicon thin film transistor. It is a conceptual schematic sectional view shown in order to explain the depth direction distribution of the implanted ion species when at least the thickness of the inorganic protective film is reduced.

FIG. 3A is a schematic sectional view of an amorphous silicon thin film transistor used for ion implantation.
FIG. 3B and FIG. 3C are conceptual views showing the distribution of implanted ion species in the depth direction with respect to AA ′ and BB ′ portions, respectively. As shown in FIG. 3C, at the time of ion implantation, ionic species containing impurity ions are implanted from the surface of the amorphous silicon thin film 14. On the other hand, FIG. 3B shows the depthwise distribution of the implanted ion species in the region of the inorganic protective film 15 that is implanted in the same manner as the ion implantation into the amorphous silicon thin film. Since the thickness of the inorganic protective film is reduced after the ion implantation is performed as indicated by the dotted line in b), the number of ions implanted in the amorphous silicon thin film 14 is very small compared to the amount of ions implanted. It can be seen that the ion-implanted portion 17b made of seeds as shown in FIG. 2D remains in the inorganic protective film 15.

FIG. 4 is a schematic cross-sectional view showing a method of manufacturing an amorphous silicon thin film transistor by an ion implantation method formed by a conventional manufacturing method, and FIG. 5 is a depth direction of implanted ion species in the case of ion implantation. It is a schematic sectional drawing shown in order to demonstrate distribution.

The conventional example shown in FIG. 4 is different from the embodiment shown in FIG. 2 in the following points. That is, as shown in FIG. 4C, the inorganic protective film 15 is formed on the amorphous silicon thin film layer 14.
As a film of the inorganic protective film 15 on the amorphous silicon thin film 14, for example, a silicon nitride film having a film thickness of 2000 angstrom is formed, processed into a desired shape, and ion species including, for example, phosphorus ions are injected as impurity ions. The source electrode 19 and the drain electrode 20 are formed by forming and shaping the electrode material that can be the source and drain electrodes without reducing the thickness.
Was being formed. Therefore, FIG. 4 (c) and FIG. 5 (b)
As shown in FIG. 5, the inorganic protective film 15 formed on the amorphous silicon thin film has an ion implantation portion 17a made of the same amount of ion species as that implanted into the amorphous silicon thin film 14.

Next, in the process of manufacturing an amorphous silicon thin film transistor, the effect of reducing at least the thickness of the inorganic protective film after forming the low resistance semiconductor layer by implanting the ion species containing the impurity ion species will be described. Therefore, the defect density in the film generated when ions were injected into the inorganic protective film was measured and compared with the defect density before the injection. In this experiment, a silicon nitride thin film was formed as an inorganic protective film used for forming the thin film transistor shown in FIG. 2 on a glass substrate, and phosphorus ions were used as impurity ions, for example, an accelerating voltage of 10 kV and a dose of 5.
E15 / cm ² The defect density was measured by measuring the spin density of the above sample by an electron spin resonance (ESR) method. The result of this experiment
Spin density is 4E17 spins / c before ion implantation
m ³ After the ion implantation under the above conditions, the spin density was 2E18 spins / cm ^3. Met. from this result,
Despite the ion implantation conditions that the acceleration voltage is relatively small and the dose amount is relatively small, the defect density represented by the spin density in the film is very large compared to before the phosphorus ion implantation. I understand. Therefore, it is expected that the inorganic protective film having a large number of defects is present on the channel region of the thin film transistor, and thus has a great adverse effect on the transistor characteristics.

In any of the inventions, the manufacturing method and structure of the amorphous silicon thin film transistor including the method of reducing the film thickness of the inorganic protective film are not limited to those described above, and the constituent requirements of the invention are not limited to those described above. Needless to say, even if various modifications are made within the range of satisfaction, they are included in the present invention. Further, it is needless to say that the ion implantation method and the type of implanted ions are also included in the present invention even if various modifications are made within a range satisfying the constituent requirements of the present invention, such as the presence or absence of mass spectrometry, the method, and the like. Yes.
Further, this technology can be applied not only to the active matrix type liquid crystal display device but also to the manufacture of various sensors.

[0021]

As described in detail above, according to the present invention, a low resistance semiconductor layer is formed in a source / drain region by forming a gate electrode, a gate insulating film and an amorphous silicon thin film on an insulating substrate. As, at least formed on the amorphous silicon thin film, using the shape-processed inorganic protective film as an injection stopper, having a modified amorphous silicon thin film itself by injection of ion species containing impurity element ions, Further, in an amorphous silicon thin film transistor in which a source electrode and a drain electrode are formed, and a switching effect is generated between the source electrode and the drain electrode due to a field effect due to the voltage applied to the gate electrode, a low ion implantation including impurity ion species is performed. After the formation of the resistance semiconductor layer, at least the step of reducing the film thickness, the outer dimension, or both of the inorganic protective film is included.
As a result, when the ion species including the impurity ions are implanted into the source and drain regions of the amorphous silicon thin film, the amount of the ion species that is implanted into the inorganic protective film into which the same amount of ions are implanted is reduced. Therefore, it is possible to form an amorphous silicon thin film transistor having high-performance transistor characteristics, in which the transistor characteristics are not affected by the ionic species present in the inorganic protective film.

[Brief description of drawings]

FIG. 1 is a schematic sectional view showing the structure of an embodiment of the present invention.

FIG. 2 is a schematic sectional view showing a manufacturing method according to an embodiment of the present invention.

FIG. 3 is a schematic cross-sectional view for explaining the distribution of implanted ion species in the depth direction in one embodiment of the present invention.

FIG. 4 is a schematic cross-sectional view for explaining a conventional method for manufacturing an amorphous silicon thin film transistor using an ion implantation technique for forming a low resistance semiconductor layer.

5 is a schematic cross-sectional view for explaining the distribution of implanted ion species in the depth direction in the embodiment shown in FIG.

FIG. 6 is a schematic cross-sectional view of a conventional amorphous silicon thin film transistor having a structure in which a low resistance semiconductor thin film is laminated on a low resistance semiconductor layer.

[Explanation of symbols]

 11 ... Insulating substrate 12 ... Gate electrode 13 ... Gate insulating film 14 ... Amorphous silicon thin film 15 ... Inorganic protective film 18 ... Low resistance semiconductor layer 19 ... Source electrode 20 ... Drain electrode

Claims (1)

[Claims] 1. A method of manufacturing a thin film transistor, which comprises forming a gate electrode, a gate insulating film, an amorphous silicon thin film, a low resistance semiconductor layer, an inorganic protective film, a source electrode and a drain electrode on an insulating substrate, wherein the amorphous Forming and shaping the inorganic protective film on a silicon thin film; and using the inorganic protective film as an implantation stopper, implanting an ion species containing impurity element ions into the amorphous silicon thin film to form the low resistance semiconductor layer. And a step of reducing at least one of the film thickness and the outer dimension of the inorganic protective film after forming the low resistance semiconductor layer.