JPH0612791B2 - Method for manufacturing multilayer wiring structure - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a method for manufacturing a semiconductor device having multilayer wiring, and more particularly to a method for manufacturing a multilayer wiring structure having fine contacts.

[Conventional technology]

Conventionally, as a technique for forming this kind of multilayer wiring structure, there is a pillar method using a polyimide resin film.

Briefly explaining the conventional pillar method, first, as shown in FIG. 2 (a), on a substrate 301 in which a barrier metal 303 having an etching rate different from that of an aluminum film is formed on a first aluminum wiring 302, A second aluminum film 304 is formed as shown in FIG. 2B, and a first aluminum wiring 30 to be described later is formed as shown in FIG.
Pillars 305 are formed by leaving the aluminum film 304 only in the portions where electrical conduction is established between 2 and 307. Next, the polyimide resin film 306 is spin-coated, and after the heat treatment step, the polyimide resin film is etched in oxygen plasma until the surface of the pillar 305 appears as shown in FIG. As shown in e), the second method
Of aluminum wiring 307 is formed.

[Problems to be solved by the invention]

However, in the conventional method described above, when the polyimide film 306 on the pillar 305 is etched until the pillar surface appears, the portion without the pillar 305 is also etched by the same thickness, so that the interlayer insulating property becomes non-uniform. As a result, there is a drawback that the yield is deteriorated. That is, in etching the polyimide film 306, even if the etching process is stopped, the etching reaction is not immediately stopped and progresses slightly to etching. Therefore, even when the surface of the pillar 305 appears, the etching is finished. The subsequent etching reduces the thickness of the polyimide film 306. In order to avoid this, it is necessary to stop the etching just before the pillar surface appears, but this may cause the pillar surface not to be exposed.

Further, if the etching rate is slowed down, it is possible to suppress the reduction in the film thickness of the polyimide film after the surface of the pillar 305 appears, but this increases the processing time for etching the polyimide film, resulting in extremely high manufacturing efficiency. It will be bad.

An object of the present invention is to solve the above problems and provide a method for manufacturing a multilayer wiring structure having a flat interlayer insulating film, thereby improving the manufacturing yield.

[Means for solving problems]

A method of manufacturing a multilayer wiring structure according to the present invention comprises a step of forming a first metal wiring on a main surface of a semiconductor substrate, a metal layer formed on the first metal wiring, and the metal layer being a photoresist. A step of selectively forming a columnar metal on the first metal wiring in order to establish electrical conduction with the second metal wiring by selective etching using the film; and a photoresist film on the columnar metal. In the state of remaining, an aromatic tetracarboxylic acid dianhydride represented by the following formula (1), a diamine represented by the formula (2), and an aminosilicon compound represented by the formula (3) are mixed and reacted. The step of forming a resin film on the entire surface by applying a solution containing the polyamic acid silicon type intermediate formed by the above to the entire surface and subjecting it to a heat treatment at a temperature of 150 ° C to 200 ° C. The resin film by etching A step of uniformly removing the resin film to the photoresist on the entire surface of the columnar metal under the conditions etching rate of the photoresist are equal appears, followed by the etching rate of the photoresist film,
A step of removing the photoresist film under the condition that the etching rate of the resin film is higher, and then removing the resin film by 300
It includes a step of heat treatment at a temperature of ℃ to 450 ℃ and a step of forming a second metal wiring.

In formulas (1) to (3), R ¹ represents a tetravalent carbocyclic aromatic group, and R ² represents an araliphatic group having 6 to 30 carbon atoms or a carbocyclic ring having 6 to 30 carbon atoms. The formula aromatic group, R ³ and R ⁴ are independently an alkyl group having 1 to 6 carbon atoms or a phenyl group, and K has a value of 1 ≦ K ≦ 3.

〔Example〕

Next, the present invention will be described in more detail with reference to the drawings. In this example, as an aminosilicon compound Of P-aminophenyltrimethoxysilane, diaminediphenylether as the diamine, and benzophenonetetracarboxylic dianhydride as the aromatic tetracarboxylic dianhydride. The molar concentration was 40%. Further, dimethylacetamide was used as the solvent, and the viscosity of this solution was 300 cm · poise.

[Embodiment 1] FIGS. 1A to 1H are process cross-sectional views in the case of forming a two-layer aluminum wiring structure according to the first embodiment of the present invention.

In FIG. 1 (a), a chemical vapor phase is formed on the surface of the element substrate 101 on which the semiconductor element active portion is formed and further the polysilicon electrodes 103 and 103 'are formed via the phosphorus glass film 102 by chemical vapor deposition. Phosphorus glass film 10 by growth
4 is formed, and the polysilicon electrode 10 is formed by publicly known lithography and dry etching as shown in FIG.
3, 103 'and openings 105, 105' for electrically connecting the first aluminum wirings 106, 106 'formed thereon are provided, and subsequently, an aluminum film having a thickness of about 1 .mu.m is formed by a sputtering method. Then, a titanium metal film having a thickness of about 0.2 μm is formed as a barrier metal by a sputtering method, and a Paria metal 107, 107 ′ is formed on the surface by photolithography and dry etching as shown in FIG. First aluminum wiring 10
6, 106 'are formed. Then, an aluminum film having a thickness of about 1 μm is formed by a sputtering method, and is subjected to photolinography and dry etching to form the first aluminum wirings 106 and 106 ′ and the first aluminum wirings 106 and 106 ′ thereon, as shown in FIG. Second aluminum wirings 111 and 11 to be formed
Pillars 108 having photoresists 109, 109 'on the upper surface for electrical connection with 1',
108 'is formed. Subsequently, a coating solution obtained by mixing and reacting an aminosilicon compound, a diamine, and an aromatic tetracarboxylic dianhydride is spin-coated at 2000 rpm for 30 seconds, and heat-treated at 200 ° C. for 30 minutes in a nitrogen gas atmosphere, As shown in FIG.
Form 0.

Next, reactive ion etching using a mixed gas of CF ₄ and O ₂ was used, the flow rate of CF ₄ was 50 SCCM, the flow rate of O ₂ was 10 SCCM, the chamber internal pressure was 5 pa, and the applied power was 50 W. And photoresist film 10
Etching rate with 9,109 'is about 1000Å / m
under the same conditions for 3 minutes as the photoresist film 109,
The uniform etching of 109 'and the resin film 110 was carried out ((f) of the same figure).

Subsequently, the flow rate of CF ₄ is 5 SCCM and the flow rate of O ₂ is 55 SCCM.
And the chamber inner pressure is 5 pa and the applied power is 50 W, the etching rate of the resin film 110 is 400 Å / m.
in, the resin film 110 and the photoresists 109 and 109 'are etched for 5 minutes under the condition that the etching rate of the photoresists 109 and 109' is 1500 l / min, and the photoresist 10 on the 108 and 108 'is etched.
The same figure (g) which removed 9,109 '.

Then, the resin film 110 is heated to 400 ° C. in a nitrogen gas atmosphere.
After applying a heat place for 1 hour, an aluminum film having a thickness of about 1 μm is formed by a sputtering method, and second aluminum wirings 111, 111 are formed by photolithography and dry etching as shown in FIG. By forming ', a two-layer aluminum wiring structure is formed.

Second Embodiment Next, as a second embodiment, an example in which the method for manufacturing the multilayer wiring structure described in the first embodiment is applied to a Bi-CMOS VLSI will be described. Bi-CMOS VLSI has three-layer Al wiring, and the wiring pitch is 2.5 μm for the first layer and 2.5 μm for the second layer.
3.5 μm, the third layer is 4.5 μm. An interlayer film between the first layer wiring and the second layer wiring and an interlayer film between the second layer wiring and the third layer wiring were formed by the manufacturing method shown in FIGS. 1 (a) to 1 (h).

In order to show the effectiveness of the present invention, a Bi-CMOS VLSI formed by the multilayer wiring forming method of the present invention and a Bi-CMOS VLSI formed by the conventional multilayer wiring forming method were prepared and compared. Table 1 shows the yield and the yield rate of these two Bi-CMOS VLSI devices after a reliability test for 2000 hours. It can be seen that the method of the manufacturing method according to the present invention is superior to the conventional method in terms of both the yield and the yield rate. This is based on the advantage of the present invention, that is, that the interlayer insulating property is uniform during pillar formation.

[Effects of the Invention] As described above, according to the present invention, the photoresist film is left on the pillar, and the polyimide film containing the SiO component is used for the interlayer film, and the etching rate of the photoresist and the polyimide is equal at first. By performing the etching under the conditions, then the etching rate of the photoresist is larger than that of the polyimide film, the polyimide film is rapidly etched until the photoresist is exposed, and after the photoresist is exposed. Since the photoresist film is etched quickly while the polyimide film is etched at low speed, even if the etching is stopped when the surface of the pillar is exposed, the amount of etching of the polyimide film is extremely small. It becomes possible to prevent the loss of the film. Therefore, it becomes possible to form a multilayer wiring structure having a high yield and excellent reliability, and a great effect can be obtained for high integration of the integrated circuit device.

[Brief description of drawings]

FIGS. 1A to 1H are process cross-sectional views in the case of forming a two-layer aluminum wiring structure according to the first embodiment of the present invention. 101 ... Element substrate, 102 ... Phosphor glass film, 10
3, 103 '... Polysilicon electrode, 104 ... Phosphor glass film, 105, 105' ... Opening, 106, 106 '
...... First aluminum wiring, 107, 107 '... Barrier metal, 108, 108' ... Pillar, 109, 10
9 '... Photoresist, 110 ... Resin film, 111,
111 '... Second aluminum wiring. FIGS. 2A to 2E are process cross-sectional views when forming a two-layer aluminum wiring structure by the conventional pillar method. 301: substrate, 302: first aluminum wiring,
303 ... Barrier metal, 304 ... Aluminum film,
305 ... pillar, 306 ... polyimide resin film, 30
7 ... Second aluminum wiring.

 ─────────────────────────────────────────────────── ─── Continued Front Page (72) Inventor Komaru Yoshikawa 5-33-1 Shiba, Minato-ku, Tokyo Inside NEC Corporation (56) Reference JP-A-61-87355 (JP, A) JP Sho 60-177652 (JP, A) JP 60-64451 (JP, A)

Claims (1)

[Claims] 1. A step of forming a first metal wiring on a main surface of a semiconductor substrate, a metal film is formed on the first metal wiring, and the metal film is selectively etched by using a photoresist. A step of selectively forming columnar metal on the first metal wiring by etching, and an aromatic tetracarboxylic acid represented by the following formula (1) while leaving the photoresist film on the columnar metal A solution containing a polyamic acid silicon type intermediate formed by mixing and reacting a dianhydride, a diamine represented by formula (2), and an aminosilicon compound represented by formula (3) is applied. , A step of forming a resin film on the entire surface by heat treatment at a temperature of 150 ° C. to 200 ° C., and then, under the condition that the etching rate of the resin film and the photoresist is equal by reactive ion etching. Etching the resin film until the photoresist surface appears, and then removing the photoresist film by etching the photoresist film under the condition that the etching rate is smaller than the etching rate of the resin film; 300 ℃ ~
A method of manufacturing a multilayer wiring structure, comprising: a step of heat treatment at a temperature of 400 ° C .; and a step of forming a second metal wiring on the resin film, the second metal wiring being in contact with the surface of the columnar metal. In formulas (1) to (3), R ¹ represents a tetravalent carbocyclic aromatic group, and R ² represents an araliphatic group having 6 to 30 carbon atoms or a carbocyclic ring having 6 to 30 carbon atoms. The formula aromatic group, R ³ and R ⁴ are independently an alkyl group having 1 to 6 carbon atoms or a phenyl group, and K has a value of 1 ≦ K ≦ 3.