JPH06125169A - Pre-soldering method - Google Patents

Pre-soldering method

Info

Publication number
JPH06125169A
JPH06125169A JP27330592A JP27330592A JPH06125169A JP H06125169 A JPH06125169 A JP H06125169A JP 27330592 A JP27330592 A JP 27330592A JP 27330592 A JP27330592 A JP 27330592A JP H06125169 A JPH06125169 A JP H06125169A
Authority
JP
Japan
Prior art keywords
solder
solder paste
paste
soldering method
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP27330592A
Other languages
Japanese (ja)
Inventor
Masayuki Ochiai
正行 落合
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP27330592A priority Critical patent/JPH06125169A/en
Publication of JPH06125169A publication Critical patent/JPH06125169A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/114Manufacturing methods by blanket deposition of the material of the bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/116Manufacturing methods by patterning a pre-deposited material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

PURPOSE:To form solder bumps of short pitch using a solder paste without selective coating by coating the whole face of a circuit board with a solder paste and by reflowing it in a vapor bath at a temperature below a boiling point of an organic flux. CONSTITUTION:The whole face of a circuit board 1 is screen-printed with a solder paste 3. Numeral 3a represents solder particles with the gaps filled with a flux vehicle. When this is reflowed, solder particles on bumps melt down to adhere on pad surfaces and turn into large liquid lumps 4a, while solder particles of the paste 3 which coat pad gaps melt down, but hardly joint each other and never enlarge. When a solder paste remaining on the circuit board is removed using a flux cleaner after temperature fall, a solder bump 4 can be formed on a pad without solder bridges.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明ははんだペーストを使用す
るはんだ付け処理に関わり、特に、ICチップや回路基
板等にはんだバンプを形成する類の予備はんだ法に関わ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a soldering process using a solder paste, and more particularly to a pre-soldering method of forming solder bumps on an IC chip, a circuit board or the like.

【0002】はんだペーストは、Pb-Snはんだのような
軟質蝋材の微粒をフラックスビヒクル(flux vehicle)に
混じてペースト状にしたもので、はんだ付けを行う個所
に適当量のはんだペーストを塗布し、加熱することによ
って蝋付けがなされるものである。複数個所のはんだ付
け処理を一時に行うことが可能という特徴を有し、次に
述べるバンプの形成にもしばしば利用される。なお、は
んだペーストを加熱して蝋材を溶融させる処理はリフロ
ーと呼ばれる。
The solder paste is made by mixing fine particles of a soft wax material such as Pb-Sn solder into a flux vehicle to form a paste, and applying an appropriate amount of the solder paste to a place to be soldered. It is brazed by heating. It has a feature that soldering processing can be performed at a plurality of points at a time, and it is often used for forming bumps described below. The process of heating the solder paste to melt the wax material is called reflow.

【0003】回路基板やチップキャリヤにICチップを
フェイスダウンにマウントする場合、双方のボンディン
グパッドに予めはんだを盛り上げておき(バンプを形
成)、バンプどうしが当接するようにICチップ等を載
置して基板を加熱すると、バンプが融合して両者が接続
される。バンプは、パッド面のみを露出した基板をはん
だ浴に浸漬して形成することができるが、はんだペース
トをパッドに付着させておき、リフローすることによっ
ても形成し得る。バンプ形成の場合も含め、はんだ付け
を行う個所に予めはんだを盛っておく処理は予備はんだ
と呼ばれている。
When mounting an IC chip face down on a circuit board or chip carrier, solder is built up in advance on both bonding pads (bumps are formed) and the IC chips and the like are placed so that the bumps come into contact with each other. When the substrate is heated by heating, the bumps are fused and the two are connected. The bump can be formed by immersing a substrate in which only the pad surface is exposed in a solder bath, but it can also be formed by attaching a solder paste to the pad and reflowing. A process in which solder is preliminarily placed in a place to be soldered, including the case of forming bumps, is called preliminary soldering.

【0004】更に上記リフローは、基板をパーフロロカ
ーボン等の蒸気で飽和させた気体雰囲気中に置く形で実
施されることがある。この種の飽和蒸気中に基板を持ち
込むと、蒸気の凝固潜熱によってはんだが溶融するが、
雰囲気温度以上に基板の温度が上がることはなく、過度
の昇温を回避することができる。また、はんだ浴に浸漬
する処理に対比させて言えば、このようなリフロー処理
は蒸気浴浸漬と呼び得るものであって、気相はんだ付け
法(Vapour Phase Soldering)と呼ばれることがある。
Further, the reflow may be carried out by placing the substrate in a gas atmosphere saturated with vapor such as perfluorocarbon. If you bring the board into this type of saturated steam, the solder will melt due to the latent heat of solidification of the steam,
The temperature of the substrate does not rise above the ambient temperature, and excessive temperature rise can be avoided. Further, in comparison with the process of dipping in a solder bath, such a reflow process can be called vapor bath dipping, and is sometimes called vapor phase soldering.

【0005】[0005]

【従来の技術】従来バンプ形成に用いられているはんだ
ペーストは、粒径数十μm或いはそれ以上のPb-Sn共晶
はんだの微粉を、ロジンや有機溶剤から成るフラックス
ビヒクルに混じたもので、スクリーン印刷によってこれ
を所定位置に選択的に塗布し、加熱処理してバンプを形
成している。選択塗布したはんだペーストが流動変形す
るのを避けるため、フラックスビヒクルには硬化ヒマシ
油のような粘性調整剤も加えられ、更に被処理金属面や
はんだ粒表面の酸化膜を除去する活性剤が加えられるの
が通常である。
2. Description of the Related Art A solder paste conventionally used for bump formation is a mixture of fine powder of Pb-Sn eutectic solder having a particle size of several tens of μm or more in a flux vehicle made of rosin or an organic solvent. This is selectively applied to a predetermined position by screen printing and heat-treated to form bumps. In order to avoid flow deformation of the selectively applied solder paste, a viscosity modifier such as hardened castor oil is also added to the flux vehicle, and an activator that removes the oxide film on the metal surface to be processed and the solder grain surface is also added. It is usually done.

【0006】[0006]

【発明が解決しようとする課題】上記のはんだペースト
は、専ら金属面に対する接着性改善の観点からフラック
スビヒクルやはんだ合金の材料が選定されているので、
一塊のはんだペーストから生じた融液は一連の液塊とな
るのが通常である。それ故、パッド面からはみ出しては
んだペーストが存在したり、はんだペーストの量が多す
ぎると、リフローの際にはんだブリッジが形成される等
の不都合が生じ易い。
In the above solder paste, the materials of the flux vehicle and the solder alloy are selected from the viewpoint of improving the adhesion to the metal surface.
The melt resulting from a lump of solder paste is usually a series of lumps of liquid. Therefore, if the solder paste is present outside the pad surface or if the amount of the solder paste is too large, it is easy to cause inconveniences such as formation of a solder bridge during reflow.

【0007】従って、はんだペーストを用いてバンプを
形成する場合には、パッド面に限定して且つ必要量のは
んだペーストを選択付着させることが必須となるが、そ
のためにスクリーン印刷のような選択塗布の処理が不可
欠であり、スループットの改善を妨げている。
Therefore, when the bumps are formed by using the solder paste, it is indispensable to selectively attach the necessary amount of the solder paste only to the pad surface. For that reason, selective application such as screen printing is required. Processing is essential and hinders improvement in throughput.

【0008】更に、近年回路基板に装着されるICが高
集積化し出力端子がショートピッチ化しているため、こ
れを受ける回路基板側の端子もショートピッチ化し、予
備はんだ処理のためのペースト選択塗布を高精度に行う
ことが必要となっている。換言すれば、ペースト選択塗
布の印刷精度の不足やペーストの流動変形に起因する隣
接端子間の短絡不良が発生し易くなっている。
Furthermore, since the ICs mounted on the circuit board have become highly integrated in recent years and the output terminals have a short pitch, the terminals on the side of the circuit board that receives the ICs have a short pitch, and selective paste application for pre-soldering is required. It is necessary to perform with high accuracy. In other words, short-circuiting defects between adjacent terminals are likely to occur due to insufficient printing accuracy in selective paste application and flow deformation of the paste.

【0009】本発明はかかる事態に対処するため、選択
塗布を行うことなく、はんだペーストを用いてショート
ピッチのはんだバンプを形成し得る予備はんだ法を提供
するものである。
In order to deal with such a situation, the present invention provides a preliminary soldering method capable of forming solder bumps having a short pitch by using a solder paste without performing selective coating.

【0010】[0010]

【課題を解決するための手段】この目的を達成するた
め、本発明のはんだ処理法は(a)組成が例えばIn-40%Pb
非共晶系合金であり、粒径が予備はんだ面相互間の最小
距離の1/5以下であるはんだ粉末と(b)予備はんだされる
金属面とはんだ融液の濡れを改善する樹脂(例えばロジ
ン)並びに該樹脂を溶解する有機溶剤(例えばシ゛エチレンク゛リコ
ールモノフ゛チルエーテル)とを包含して構成されるはんだペースト
を準備し、該はんだペーストを回路基板全面に塗布し、
該有機溶剤の沸点以下の温度で蒸気浴によるリフローを
行うことを特徴としている。
In order to achieve this object, the soldering method of the present invention comprises (a) a composition of, for example, In-40% Pb.
A non-eutectic alloy, the grain size is 1/5 or less of the minimum distance between the pre-solder surfaces and the solder powder and (b) a resin that improves the wetting of the metal surface and the solder melt to be pre-soldered (for example, Rosin) and an organic solvent that dissolves the resin (for example, polyethylene glycol monobutyl ether) is prepared, and the solder paste is applied to the entire surface of the circuit board,
It is characterized in that the reflow is performed in a steam bath at a temperature not higher than the boiling point of the organic solvent.

【0011】[0011]

【作用】本発明の予備はんだ法によれば、はんだペース
トを基板全面に塗布してリフローを行うことで、パッド
面だけにはんだが被着してバンプが形成される。本発明
者が新たに得た知見によれば、このような作用効果は次
の3条件が満たされることにより生ずる。 (1)はんだ融液の濡れ性が良すぎないこと。 (2)はんだ粉末の粒系が、予備はんだされる金属面の間
隔に較べて十分に小であること。 (3)フラックスビヒクル中の有機溶剤が、加熱によって
急速に失われることなく、リフロー処理を通じて十分な
量が残存すること。
According to the pre-soldering method of the present invention, the solder paste is applied to the entire surface of the substrate and reflowed, so that the solder is applied only to the pad surface to form bumps. According to the knowledge newly obtained by the present inventor, such an effect is produced by satisfying the following three conditions. (1) The wettability of the solder melt should not be too good. (2) The grain system of the solder powder is sufficiently small compared to the distance between the metal surfaces to be pre-soldered. (3) A sufficient amount of the organic solvent in the flux vehicle remains through the reflow process without being rapidly lost by heating.

【0012】これ等の条件が満たされると、リフロー処
理中にはんだ粒どうしが合体して大粒の融液に成長する
反応が極度に低速化するのに対し、パッド金属面では、
その面積が十分に大であることから、はんだ粒が付着し
て融液が金属面に拡がる速度はさほど低下することがな
いと推測される。
When these conditions are satisfied, the reaction of the solder particles coalescing and growing into a large-sized melt during the reflow process is extremely slowed down, whereas on the pad metal surface,
Since the area is sufficiently large, it is presumed that the speed at which the solder particles adhere and the melt spreads on the metal surface does not decrease so much.

【0013】はんだ粒が微細であることやリフロー時に
フラックス液が多量に存在することは、はんだ粒どうし
の合体を起こり難くするものである。本発明では、リフ
ロー温度を溶剤の沸点以下とすることで該処理中の十分
なフラックス量を確保している。更に、非共晶系のはん
だがSn-37Pbはんだ(共晶系)に較べて濡れ性が劣ること
も、半田粒どうしの合体を抑制するのに有効に作用して
いると考えられる。
The fine solder particles and the presence of a large amount of flux liquid during reflow make it difficult for the solder particles to coalesce. In the present invention, the reflow temperature is set to the boiling point of the solvent or lower to secure a sufficient amount of flux during the treatment. Further, the non-eutectic solder is inferior in wettability as compared with the Sn-37Pb solder (eutectic solder), which is considered to be effective in suppressing coalescence of the solder particles.

【0014】本発明の処理を実施した場合、はんだ粒ど
うしの合体が或る程度進行しても、はんだブリッジが形
成されていなければ、リフロー後のペースト除去処理で
除去される。それ故、パッドの間隔が大であればはんだ
粒が大きくてもブリッジが生じ難いのに対し、間隔が小
である場合にははんだ粒を細かくすることが必要とな
る。本発明者の得た知見によると、ブリッジの発生を避
けるには、はんだ粒径がバンプの間隔の1/5を越えない
ようにすべきであり、望ましくはこの値は1/6以下であ
る。
When the treatment of the present invention is carried out, even if the coalescence of the solder particles progresses to some extent, if the solder bridge is not formed, it is removed by the paste removing treatment after the reflow. Therefore, if the pad spacing is large, bridging is unlikely to occur even if the solder particles are large, whereas if the spacing is small, it is necessary to make the solder particles fine. According to the knowledge obtained by the present inventor, in order to avoid the occurrence of bridges, the solder grain size should not exceed 1/5 of the interval between bumps, and this value is preferably 1/6 or less. .

【0015】[0015]

【実施例】実施例で使用するはんだペーストは表1に示
される構成のものである。
EXAMPLES The solder paste used in the examples has the constitution shown in Table 1.

【0016】[0016]

【表1】 はんだ粉末は表面の酸化膜を除去したものを用い、上表
に明らかな通り、通常のはんだペーストに含まれる酸化
膜除去用活性剤は、本発明のはんだペーストには含まれ
ていない。また、上表中のジエチレングリコールモノブ
チルエーテルの沸点は230℃である。
[Table 1] As the solder powder, the one from which the oxide film on the surface is removed is used, and as is clear from the above table, the oxide film removing activator contained in the ordinary solder paste is not included in the solder paste of the present invention. The boiling point of diethylene glycol monobutyl ether in the above table is 230 ° C.

【0017】このはんだペーストを用いる実施例の工程
が図1に模式的に示されており、以下、同図を参照しな
がら説明する。先ず、(a)図に示すように、パッド2の
配置ピッチが300μmである回路基板1の全面に、上記
はんだペースト3を150μmの厚さにスクリーン印刷す
る。3aははんだ粒で、粒間はフラックスビヒクルで充填
されている。
The process of the embodiment using this solder paste is schematically shown in FIG. 1, and will be described below with reference to the same drawing. First, as shown in FIG. 3A, the solder paste 3 is screen-printed to a thickness of 150 μm on the entire surface of the circuit board 1 in which the pads 2 are arranged at a pitch of 300 μm. 3a is a solder grain, and the space between the grains is filled with a flux vehicle.

【0018】これをパーフロロカーボンの一種であるフ
ロリナート(商品名、住友3M社製)の215℃飽和蒸気中
でリフローすると、(b)図のように、パッド上のはんだ
粒は溶融してパッド面に付着し、大きな液塊4aとなるの
に対し、パッド間に塗布されたはんだペースト3の半田
粒は、溶融はするが合体は殆ど進行せず、大粒化するこ
とはない。
When this is reflowed in 215 ° C. saturated steam of Fluorinert (trade name, manufactured by Sumitomo 3M Co., Ltd.), which is a kind of perfluorocarbon, the solder particles on the pad melt and the pad surface as shown in FIG. While it becomes a large liquid mass 4a, the solder particles of the solder paste 3 applied between the pads melt, but the coalescence hardly progresses and the particles do not become large.

【0019】降温後にフラックス洗浄剤を用いて回路基
板上に残ったはんだペーストを除去するすると、(c)図
に示されるように、はんだブリッジが発生することな
く、パッド上にはんだバンプ4が形成されている。
When the solder paste remaining on the circuit board is removed using a flux cleaning agent after the temperature has dropped, solder bumps 4 are formed on the pads without the occurrence of solder bridges, as shown in FIG. Has been done.

【0020】[0020]

【発明の効果】以上説明したように、本発明の予備はん
だ法によれば、はんだペーストを選択的に塗布すること
なく、所望の個所のみにはんだを盛ることが可能であ
り、回路基板の予備はんだ処理のスループットが改善さ
れる。また、パッドや配線のピッチが微細化された基板
にも精度良く対応できるので、高集積ICを実装する回
路基板の予備はんだ処理に適用することが可能である。
As described above, according to the pre-soldering method of the present invention, it is possible to deposit the solder only on a desired portion without selectively applying the solder paste, and to spare the circuit board. The throughput of solder processing is improved. Further, since it is possible to accurately cope with a substrate having a fine pad or wiring pitch, it can be applied to a pre-soldering process of a circuit substrate on which a highly integrated IC is mounted.

【0021】更に、本発明に用いられる非共晶系はんだ
は共晶系はんだに較べて柔らかく、回路基板使用時の温
度変化に伴って生ずる歪には、はんだが塑性変形して対
応するため、応力の発生が少なく、破断や素子特性の変
化など好ましくない事態が回避されることになる。
Further, the non-eutectic solder used in the present invention is softer than the eutectic solder, and the solder is plastically deformed to cope with the strain caused by the temperature change when the circuit board is used. The occurrence of stress is small, and undesirable situations such as breakage and changes in element characteristics are avoided.

【図面の簡単な説明】[Brief description of drawings]

【図1】 実施例の工程を示す模式図FIG. 1 is a schematic diagram showing a process of an example.

【符号の説明】[Explanation of symbols]

1 基板 2 パッド 3 はんだペースト 3a はんだ粒 4 バンプ 4a はんだ液塊 1 Board 2 Pad 3 Solder paste 3a Solder grain 4 Bump 4a Solder liquid mass

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 FI 技術表示箇所 H01L 21/321 ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 5 Identification code Office reference number FI technical display location H01L 21/321

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】(a)非共晶組成を有し、粒径が予備はんだ
面相互間の最小距離の1/5以下である軟質蝋材の粉末、
及び(b)被蝋着金属面と該蝋材融液の濡れ性を強化する
樹脂並びに該樹脂を溶解する有機溶剤を包含するフラッ
クスビヒクルから成るはんだペーストを準備し、 該はんだペーストを基板全面に塗布し、該有機溶剤の沸
点以下の温度で蒸気浴中でリフローを行うことを特徴と
する予備はんだ法。
1. (a) A soft wax material powder having a non-eutectic composition and having a grain size of 1/5 or less of a minimum distance between pre-solder surfaces,
And (b) a solder paste comprising a flux vehicle containing a resin for enhancing the wettability of the metal surface to be brazed and the wax melt and an organic solvent dissolving the resin is prepared, and the solder paste is applied to the entire surface of the substrate. A preliminary soldering method, which comprises applying and reflowing in a steam bath at a temperature not higher than the boiling point of the organic solvent.
【請求項2】 請求項1の予備はんだ法で用いるはんだ
ペーストであって、 前記軟質蝋材の粉末がIn-40%Pb合金の粒径20μm以下の
粉末であり、前記フラックスビヒクルが67wt%のロジ
ン、32wt%のジエチレングリコールモノブチルエーテル
及び1wt%の硬化ヒマシ油から成るものであることを特徴
とするはんだペースト。
2. The solder paste used in the pre-soldering method according to claim 1, wherein the powder of the soft solder material is a powder of In-40% Pb alloy having a particle size of 20 μm or less, and the flux vehicle is 67 wt%. A solder paste comprising rosin, 32 wt% diethylene glycol monobutyl ether and 1 wt% hydrogenated castor oil.
【請求項3】 請求項1の予備はんだ法に於いて、請求
項2のはんだペーストを用い、前記蒸気浴中のリフロー
処理を、215℃のフロリナート飽和蒸気浴中で行うこと
を特徴とする予備はんだ法。
3. The preliminary soldering method according to claim 1, wherein the solder paste according to claim 2 is used to perform the reflow treatment in the steam bath in a 215 ° C. Fluorinert saturated steam bath. Soldering method.
JP27330592A 1992-10-13 1992-10-13 Pre-soldering method Withdrawn JPH06125169A (en)

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Publication Number Publication Date
JPH06125169A true JPH06125169A (en) 1994-05-06

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