JPH06120434A - Semiconductor device - Google Patents

Abstract

PURPOSE:To reduce the chip size of a semiconductor device that a lateral bipolar transistor and a bipolar transistor having the polarity opposite to that of the former are formed on the same semiconductor layer. CONSTITUTION:A semiconductor device has a lateral bipolar transistor (PNP transistor) Q11 and an NPN transistor Q12 having the polarity thereto on the same semiconductor layer 103. To isolate the both transistors by using commonly the base of the lateral PNP transistor Q11 and the collector of the NPN transistor on the same N-type diffusion layers 107, 108. The chip size is reduced by omitting the isolating diffusion layer. Also, the diffusion layers 107, 108 are arranged between the collector 106 of the lateral transistor Q11 and the base 109 of the NPN transistor and reduces hFE of a transistor.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device including a bipolar transistor.

[0002]

2. Description of the Related Art An example of a conventional semiconductor device having a bipolar transistor is shown in FIG. The figure (a) is a plan view,
(B) is the BB line sectional view. An N-type buried layer 202 is formed on a semiconductor substrate 201, and an N-type diffusion layer 203 is formed on this.
And the N-type diffusion layer 203 is formed on the P-type diffusion layer 20.
4, the element is separated from the diffusion layers 203A and 204B, and the lateral type PNP transistor Q21 and NP are respectively provided.
It forms an N-transistor Q22. That is, one N
The P type diffusion layer 205 as an emitter is formed on the type diffusion layer 203A.
Then, a P-type diffusion layer 206 as a collector surrounding this and an N-type diffusion layer 207 as a base are formed apart from the P-type diffusion layer 206, and these constitute a lateral PNP transistor Q21. In addition, the other N-type diffusion layer 203B
An N-type diffusion layer 208 as a collector, a P-type diffusion layer 209 as a base apart from the N-type diffusion layer 208, and the P-type diffusion layer 2
N-type diffusion layer 210 as an emitter is formed in 09,
These configure the NPN transistor Q22. Note that 211 is an insulating film, and 212 to 217 are respective electrodes.

[0003]

Such a conventional semiconductor device has a lateral PNP transistor Q21 and an NP.
For the N-type diffusion layers 203A and 203B forming the N-transistor Q22, a P-type diffusion layer 204 is formed around the N-type diffusion layers 203A and 203B in order to separate them from other circuits. Between the P-type diffusion layer 204
Need to be formed. The P-type diffusion layer 204
In order to form impurities by diffusing from the surface side of the substrate, a width dimension corresponding to the depth is required. Therefore, the width dimension of the P-type diffusion layer 204 becomes large and the semiconductor device height increases. There is a problem that it is disadvantageous in increasing the density and the chip size becomes large. An object of the present invention is to provide a semiconductor device capable of reducing the chip size while realizing the separation between the lateral type bipolar transistor and the bipolar transistor of the opposite polarity.

[0004]

According to the present invention, the base of a lateral type bipolar transistor and the collector of a bipolar transistor of the opposite polarity are formed of the same diffusion layer. This diffusion layer is arranged between the collector of the lateral type transistor and the base of the reverse polarity transistor.

[0005]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIG. 1 shows an embodiment of the present invention, (a) is a plan view,
(B) is the AA line sectional view. An N type buried layer 102 is formed on a semiconductor substrate 101, and an N type diffusion layer 10 is formed on the N type buried layer 102.
3 is formed and the periphery thereof is separated from other circuits by the P-type diffusion layer 104, and then the lateral PNP transistor Q11 and the NPN transistor Q12 are formed in the enclosed N-type diffusion layer 103. A P-type diffusion layer 105 as an emitter of the lateral PNP transistor Q11 is provided at one side position in the N-type diffusion layer 103, and a P-type diffusion layer 106 as a collector is provided so as to surround the emitter 105 in a donut shape. Is further provided, and an N-type diffusion layer 107 and an N-type diffusion layer 108 as a base are provided in a stacked state apart from the collector 106.

On the other hand, at the other side position of the N type diffusion layer, N
It forms the collector of the PN transistor Q12, which is part of the base of the lateral PNP transistor,
That is, the N-type diffusion layer 108 is used as it is. Also,
Separated from this collector, a P-type diffusion layer 109 serving as a base
And an N-type diffusion layer 110 as an emitter is further provided in the P-type diffusion layer 109. Then, openings are provided in the insulating film 111 formed on the surface of the N-type diffusion layer 103, and a metal electrode is formed in each opening to form an emitter electrode 112, a collector electrode 113, a base and collector electrode 114, a base electrode 115, The emitter electrode 116 is used. Here, the N-type diffusion layer 107 and the N-type diffusion layer 108 that share the base of the lateral PNP transistor Q11 and the collector of the NPN transistor Q12 are the P-type diffusion layer 106 and the NPN transistor Q12 serving as the collector of the lateral PNP transistor Q11. It is essential to dispose between the P-type diffusion layers 109 as the base of the.

Therefore, according to this structure, the N-type diffusion layers 107 and 108 forming the base of the lateral PNP transistor Q11 are also used as the collectors of the NPN transistor Q12.
Lateral PNP transistor Q1 by 7,108
1 and the NPN transistor Q12 can be separated. Since a P-type diffusion layer for separation is not required between both transistors, the element area can be reduced and the chip size can be reduced accordingly. In addition, the N-type diffusion layers 107 and 10
8 is a collector 1 of the lateral PNP transistor Q11
06 and the base 109 of the NPN transistor Q12, the h _{FE of the} parasitic PNP transistor can be reduced. The present invention is the same even when the lateral PNP transistor and the NPN transistor are integrally formed.

[0008]

As described above, according to the present invention, since the base of the lateral type bipolar transistor and the collector of the bipolar transistor having the opposite polarity are formed by the same diffusion layer, both diffusion layers are formed by this diffusion layer. Can be separated, a diffusion layer for separating the two transistors is not required, and the chip size of the semiconductor device can be reduced. Further, by disposing this diffusion layer between the collector of the lateral type bipolar transistor and the base of the bipolar transistor of opposite polarity, the parasitic PN
There is also an effect that the h _FE of the P transistor can be reduced.

[Brief description of drawings]

FIG. 1 shows an embodiment of the present invention, (a) is a plan view,
(B) is the AA line sectional view.

2A and 2B show a conventional example, FIG. 2A is a plan view, and FIG. 2B is a cross-sectional view taken along the line BB.

[Explanation of symbols]

 103 N-type diffusion layer 104 P-type diffusion layer 105 P-type diffusion layer (emitter) 106 P-type diffusion layer (collector) 107, 108 N-type diffusion layer (base, collector) 109 P-type diffusion layer (base) 110 N-type diffusion Layer (emitter)

Claims (2)

[Claims] 1. A lateral-type bipolar transistor and a bipolar transistor having a polarity opposite to that of the lateral-type bipolar transistor are formed in the same semiconductor layer, and the base of the lateral-type transistor and the collector of the opposite-polarity transistor have the same diffusion. A semiconductor device comprising layers. 2. The semiconductor device according to claim 1, wherein the diffusion layer is provided between the collector of the lateral type transistor and the base of the reverse polarity transistor.