JPH06112804A - 出力信号発振および定常状態電流を最小化するための高速出力バッファ回路 - Google Patents

出力信号発振および定常状態電流を最小化するための高速出力バッファ回路

Info

Publication number
JPH06112804A
JPH06112804A JP5138206A JP13820693A JPH06112804A JP H06112804 A JPH06112804 A JP H06112804A JP 5138206 A JP5138206 A JP 5138206A JP 13820693 A JP13820693 A JP 13820693A JP H06112804 A JPH06112804 A JP H06112804A
Authority
JP
Japan
Prior art keywords
transistor
voltage
buffer circuit
transistors
output buffer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP5138206A
Other languages
English (en)
Japanese (ja)
Inventor
Qazi Mahmood
クァズィ・モームッド
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of JPH06112804A publication Critical patent/JPH06112804A/ja
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
    • H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
    • H03K17/163—Soft switching

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
JP5138206A 1992-06-12 1993-06-10 出力信号発振および定常状態電流を最小化するための高速出力バッファ回路 Withdrawn JPH06112804A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US897736 1992-06-12
US07/897,736 US5248906A (en) 1992-06-12 1992-06-12 High speed CMOS output buffer circuit minimizes output signal oscillation and steady state current

Publications (1)

Publication Number Publication Date
JPH06112804A true JPH06112804A (ja) 1994-04-22

Family

ID=25408339

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5138206A Withdrawn JPH06112804A (ja) 1992-06-12 1993-06-10 出力信号発振および定常状態電流を最小化するための高速出力バッファ回路

Country Status (4)

Country Link
US (1) US5248906A (OSRAM)
EP (1) EP0574184B1 (OSRAM)
JP (1) JPH06112804A (OSRAM)
DE (1) DE69313026T2 (OSRAM)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5345113A (en) * 1993-05-19 1994-09-06 Unisys Corporation Control module for reducing ringing in digital signals on a transmission line
US5367206A (en) * 1993-06-17 1994-11-22 Advanced Micro Devices, Inc. Output buffer circuit for a low voltage EPROM
US5727166A (en) * 1993-08-05 1998-03-10 Mitsubishi Semiconductor America, Inc. Buffer with drive characteristics controllable by software
US5585740A (en) * 1993-12-10 1996-12-17 Ncr Corporation CMOS low output voltage bus driver with controlled clamps
JP3189546B2 (ja) * 1993-12-28 2001-07-16 株式会社日立製作所 送受信回路
KR960013859B1 (ko) * 1994-02-07 1996-10-10 현대전자산업 주식회사 반도체 소자의 데이타 출력버퍼
EP0678983B1 (en) * 1994-04-22 1998-08-26 STMicroelectronics S.r.l. Output buffer current slew rate control integrated circuit
US5497105A (en) * 1994-06-30 1996-03-05 Vlsi Technology, Inc. Programmable output pad with circuitry for reducing ground bounce noise and power supply noise and method therefor
US5477172A (en) * 1994-12-12 1995-12-19 Advanced Micro Devices, Inc. Configurable input buffer dependent on supply voltage
US5537077A (en) * 1994-12-23 1996-07-16 Advanced Micro Devices, Inc. Power supply dependent method of controlling a charge pump
EP0717501A1 (en) * 1994-12-15 1996-06-19 Advanced Micro Devices, Inc. Programmable drive buffer
US5473263A (en) * 1994-12-19 1995-12-05 Advanced Micro Devices, Inc. Negative feedback to reduce voltage oscillation in CMOS output buffers
US5926651A (en) * 1995-07-28 1999-07-20 Intel Corporation Output buffer with current paths having different current carrying characteristics for providing programmable slew rate and signal strength
WO1997009811A1 (en) * 1995-09-06 1997-03-13 Advanced Micro Devices, Inc. Low jitter low power single ended driver
US5959481A (en) * 1997-02-18 1999-09-28 Rambus Inc. Bus driver circuit including a slew rate indicator circuit having a one shot circuit
US6037810A (en) 1997-08-26 2000-03-14 Advanced Mirco Devices, Inc. Electronic system having a multistage low noise output buffer system
US6700401B2 (en) * 2001-02-28 2004-03-02 Advanced Micro Devices, Inc. Reduced noise line drivers and method of operation
US7058823B2 (en) * 2001-02-28 2006-06-06 Advanced Micro Devices, Inc. Integrated circuit having programmable voltage level line drivers and method of operation
US6813673B2 (en) * 2001-04-30 2004-11-02 Advanced Micro Devices, Inc. Bus arbitrator supporting multiple isochronous streams in a split transactional unidirectional bus architecture and method of operation
US6912611B2 (en) * 2001-04-30 2005-06-28 Advanced Micro Devices, Inc. Split transactional unidirectional bus architecture and method of operation
US6785758B1 (en) 2001-06-01 2004-08-31 Advanced Micro Devices, Inc. System and method for machine specific register addressing in a split transactional unidirectional bus architecture
US6763415B1 (en) 2001-06-08 2004-07-13 Advanced Micro Devices, Inc. Speculative bus arbitrator and method of operation
US7713416B2 (en) * 2002-05-28 2010-05-11 Chemical Biosolids Inc. Process for transforming sludge into NPK type granulated fertilizer
US7411415B2 (en) * 2004-02-25 2008-08-12 Ashfaq Shaikh Bus termination scheme having concurrently powered-on transistors
US20060002482A1 (en) * 2004-06-30 2006-01-05 Clinton Walker Signal drive de-emphasis for memory bus
JP4847486B2 (ja) * 2008-03-25 2011-12-28 株式会社沖データ 駆動回路、ｌｅｄヘッドおよび画像形成装置
KR102148802B1 (ko) * 2014-02-27 2020-08-28 에스케이하이닉스 주식회사 드라이버 및 그를 포함하는 이미지 센싱 장치

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4622482A (en) * 1985-08-30 1986-11-11 Motorola, Inc. Slew rate limited driver circuit which minimizes crossover distortion
JPH01161916A (ja) * 1987-12-18 1989-06-26 Toshiba Corp 半導体集積回路
US4975598A (en) * 1988-12-21 1990-12-04 Intel Corporation Temperature, voltage, and process compensated output driver
JP2808678B2 (ja) * 1989-06-19 1998-10-08 日本電気株式会社 出力回路
US4975599A (en) * 1989-07-26 1990-12-04 International Business Machines Corporation Method and resulting devices for compensating for process variables in a CMOS device driver circuit
US4972101A (en) * 1989-09-19 1990-11-20 Digital Equipment Corporation Noise reduction in CMOS driver using capacitor discharge to generate a control voltage
JPH03256295A (ja) * 1990-03-06 1991-11-14 Nec Corp 増幅回路
JPH03259616A (ja) * 1990-03-09 1991-11-19 Mitsubishi Electric Corp 出力バッファ回路
US5017807A (en) * 1990-07-05 1991-05-21 At&T Bell Laboratories Output buffer having capacitive drive shunt for reduced noise
US5321319A (en) * 1992-06-08 1994-06-14 Advanced Micro Devices, Inc. High speed CMOS bus driver circuit that provides minimum output signal oscillation

Also Published As

Publication number Publication date
DE69313026T2 (de) 1998-03-26
EP0574184A2 (en) 1993-12-15
EP0574184A3 (OSRAM) 1994-02-23
US5248906A (en) 1993-09-28
DE69313026D1 (de) 1997-09-18
EP0574184B1 (en) 1997-08-13

Similar Documents

Publication Publication Date Title
JPH06112804A (ja) 出力信号発振および定常状態電流を最小化するための高速出力バッファ回路
US5321319A (en) High speed CMOS bus driver circuit that provides minimum output signal oscillation
EP0332301B1 (en) Time variant drive for use in integrated circuits
US6535020B1 (en) Output buffer with compensated slew rate and delay control
US5319252A (en) Load programmable output buffer
US5635861A (en) Off chip driver circuit
US5138194A (en) Controlled slew rate buffer
US6121789A (en) Output buffer with control circuitry
EP0575676B1 (en) Logic output driver
US20020149392A1 (en) Level adjustment circuit and data output circuit thereof
US7786761B2 (en) Output buffer device
US6064230A (en) Process compensated output driver with slew rate control
US5233238A (en) High power buffer with increased current stability
EP1014581B1 (en) Adjustable strength driver circuit and method of adjustment
US6184703B1 (en) Method and circuit for reducing output ground and power bounce noise
JPH04229714A (ja) バッファを有する集積回路
EP0799528B1 (en) Negative feedback to reduce voltage oscillation in cmos output buffers
US6160416A (en) Full CMOS slew rate controlled input/output buffer
EP1454414B1 (en) High-speed output circuit with low voltage capability
US20050162209A1 (en) High speed voltage level translator
US6856179B2 (en) CMOS buffer with reduced ground bounce
Shin et al. Slew-rate-controlled output driver having constant transition time over process, voltage, temperature, and output load variations
US6348814B1 (en) Constant edge output buffer circuit and method
JP3684210B2 (ja) Ｃｍｏｓ出力バッファー回路
JP3233891B2 (ja) 出力バッファ回路

Legal Events

Date Code Title Description
A300 Application deemed to be withdrawn because no request for examination was validly filed

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 20000905