JPH06105287A - Video signal recording and reproducing device - Google Patents

Abstract

PURPOSE:To faithfully reproduce a video signal at the time of recording by separating only a preliminarily added reference signal from the video signal read from a recording medium, and writing the video signal in a storage means. CONSTITUTION:A synchronizing signal separator circuit 10 separates a horizontal synchronizing signal from an Y +S signal inputted from a camera part, and a burst gate pulse generating circuit 20 outputs the pulse of a prescribed width at a prescribed timing delayed by a certain period of time. And also, the reference signal (burst signal) for a jitter correction outputted from a clock generating circuit 40, and the burst gate pulse are inputted to a burst gate circuit 30. Then, only when the burst gate pulse is turned ON, the reference signal is inputted to an adder 35, added to the Y+S signal, and the output is processed by an Y signal recording processing circuit 50, and recorded in a magnetic disk 70. Moreover, the written video signal is read based on a constant clock.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal recording / reproducing apparatus, and more particularly to a video signal recording / reproducing apparatus for recording a video signal on a recording medium such as a magnetic disk or reproducing the recorded video signal. Regarding

[0002]

2. Description of the Related Art Conventionally, there has been known a video signal recording / reproducing apparatus for recording a video signal on a recording medium such as a magnetic disk and reproducing the video signal recorded on the recording medium.
In a recording / reproducing apparatus using a magnetic disk or the like, a signal obtained by subjecting a luminance signal (including a synchronization signal) and a color difference signal to FM modulation or the like is recorded on the magnetic disk.

[0003]

As described above, in the case of recording / reproducing a video signal on / from a recording medium such as a magnetic disk, a drive device for rotating the disk may cause jitter. This fluctuation can occur both during signal recording and during signal reproduction.
For this reason, there is a problem that the signal at the time of recording is not faithfully reproduced. That is, there is a problem that fluctuation occurs in a reproduced video or an image flickers.

In view of the above circumstances, the present invention is a video signal recording / reproducing apparatus capable of faithfully reproducing a video signal at the time of recording, even if jitter occurs in the disk drive at the time of recording or reproducing the video signal. The purpose is to provide.

[0005]

To achieve the above object, in a video signal recording / reproducing apparatus of the present invention, a video signal including a sync signal is provided with a reference signal of a predetermined frequency and a predetermined reference signal corresponding to the sync signal. It is added to the period and recorded on the recording medium, and only the reference signal added in advance is separated from the video signal read from the recording medium, and based on this, the video signal is written in the storage means and then written in the storage means. It is configured to read the embedded video signal based on a constant clock. The reference signal is added over the entire period of the video signal or the entire period except the vertical synchronizing pulse period.

[0006]

The present invention will be described below based on the illustrated embodiments. FIG. 1 is a schematic block diagram of a video signal recording / reproducing apparatus 200 to which the present invention is applied.

In the video signal recording / reproducing apparatus 200 of the present invention, the luminance signal Y and the color difference signals RY and B- are used.
Y is recorded on the magnetic disk 70 via the signal recording processing circuit 50. The output from the signal recording processing circuit 50 is applied to the magnetic head 60 and recorded on the magnetic disk 70 which is rotated by a spindle motor 80 as a drive device. Note that FIG. 1 shows, as an example, a case where a Y + S signal obtained by adding the synchronization signal S to the luminance signal Y is recorded.

First, a Y + S signal is input to the sync signal separation circuit 10 from a camera unit (not shown). The sync signal separation circuit 10 separates the horizontal sync signal from the Y + S signal. The burst gate pulse generation circuit 20 outputs a pulse having a predetermined width (burst gate pulse) necessary for writing the reference signal at a predetermined timing delayed by a certain time from the separated horizontal synchronizing signal. Further, the sync signal is output from the sync signal separation circuit 10 to the clock generation circuit 40.
In the clock generation circuit 40, the clock timing is readjusted in synchronization with this synchronization signal. The burst gate circuit 30 outputs the clock generation circuit 40,
A reference signal (burst signal) for jitter correction and the above burst gate pulse are input. As the burst signal, for example, a sine wave having a frequency of 455/2 times the frequency of the horizontal synchronizing signal is used. Burst gate circuit 3
Reference numeral 0 is a circuit that allows a signal to pass only during a period when the burst gate pulse is ON. Therefore, the reference signal (burst signal) is input to the adder 35 only during a period when the burst gate pulse is ON. It The adder 35 adds the reference signal (burst signal) to the Y + S signal. The output from the adder 35 is subjected to processing such as FM modulation by the Y signal recording processing circuit 50 and recorded on the magnetic disk 70 by the magnetic head 60.

When reproducing the video signal recorded on the magnetic disk 70, the signal recorded by the magnetic head 60 is read and demodulated by the Y signal reproduction processing circuit 90, and the A / D converter 130, It is sent to the synchronization signal separation circuit 100 and the clock recovery PLL circuit 120. The sync signal separation circuit 100 separates the horizontal sync signal from the input Y + S signal. The burst gate pulse generation circuit 110 delays the separated horizontal synchronizing signal by a certain time, and outputs a predetermined time O necessary for extracting the burst signal.
A burst gate pulse of N is output. The clock reproduction PLL circuit 120 is the Y + recorded on the disk 70.
A clock is generated by extracting a burst signal from the Y + S signal based on the S signal and the burst gate pulse and synchronizing the burst clock frequency with the burst.
The clock generated here is a clock that is affected by jitter during recording / reproduction, and is not a constant frequency but a clock that fluctuates in synchronization with the read video signal. In other words, this clock contains jitter information.

The read video signal is A / D converter 13 based on the clock containing the jitter information.
It is A / D converted by 0 and recorded in the memory 140. Therefore, the video signal is written in the memory 140 based on the clock synchronized with the fluctuation of the video signal, and the influence of the jitter is absorbed at the time of writing to the memory.

The data once stored in the memory 140 is
The constant frequency output from the clock generation circuit 160 is used as a clock to read from the memory 140, and the D / A
It is converted into an analog signal by the converter 150, is combined with the synchronization signal generated by the synchronization signal generation circuit 170 based on the clock similarly output from the clock generation circuit 160, and is output to a display device or the like not shown.

FIG. 2 shows a burst gate pulse generation circuit 2
It is a block diagram showing the composition of the 1st example of 0. Further, FIG. 3 is a timing chart showing an output waveform of the burst gate pulse generation circuit of the first embodiment shown in FIG.

When the horizontal synchronizing signal H-SYNC separated by the synchronizing signal separating circuit 10 is input to the burst gate pulse generating circuit 20, the horizontal synchronizing signal H-SYNC is generated.
Triggered by the rising edge of M
A pulse having a pulse width τ1 is output from M1. Next, the mono-multi-vibrator MM2 is triggered by the falling edge of the pulse output from the mono-multi-vibrator MM2.
Outputs a pulse with pulse width τ 2. The output from the mono multivibrator MM2 becomes a burst gate pulse. The burst signal output from the clock generation circuit 40 is input to the adder 35 by the burst gate circuit 30 for the period τ 2 of this burst gate pulse.
The burst signal and the Y + S signal are combined.

FIG. 4 shows Y + S to which a burst signal is added.
5 is a timing chart showing the relationship between signals and burst gate pulses. When the signal is reproduced, the burst gate pulse is generated at the same timing to extract the burst signal (described later).

FIG. 5 shows an example of the waveform of a video signal recorded / reproduced by the video signal recording / reproducing apparatus using the burst gate pulse generating circuit of the first embodiment. In the first embodiment, the burst signal is inserted at a position at a predetermined time interval from the rise of the horizontal synchronizing signal over the entire period of the video signal.

FIG. 6 shows a burst gate pulse generation circuit 2
It is a block diagram which shows the structure of the 2nd Example of No. 0. FIG. 7 is a timing chart showing the output waveform of the burst gate pulse generation circuit of the second embodiment shown in FIG.

In the second embodiment, as in the first embodiment, the horizontal sync signal H-SYNC separated by the sync signal separating circuit 10 is the burst gate pulse generating circuit 2.
When it is input to 0, the mono-multivibrator MM1 outputs a pulse having a pulse width .tau.1 triggered by the rise of the horizontal synchronizing signal H-SYNC. The pulse width τ from the mono multivibrator MM2 is triggered by the falling edge of the pulse output from the mono multivibrator MM1.
2 pulses are output. The output from the mono-multivibrator MM2 and the inverted signal of the vertical synchronization signal V-SYNC which is also separated by the synchronization signal separation circuit 10 are input to the AND gate 23. As a result, a burst gate pulse having a pulse width .tau.2 similar to that of the first embodiment can be obtained in the entire area of the video signal except the area where the vertical synchronizing signal V-SYNC exists. Similar to the first embodiment, the burst gate circuit 30 inputs the output from the clock generation circuit 40 to the adder 35 only during the burst gate pulse period .tau.2 to synthesize the burst signal and the Y + S signal.

FIG. 8 shows waveforms of video signals recorded / reproduced by a video signal recording / reproducing apparatus using the burst gate pulse generating circuit of the second embodiment. In this example, the burst signal is inserted at a predetermined time interval from the rise of the horizontal synchronizing signal over the entire period of the video signal except the vertical synchronizing pulse period.

FIG. 9 is a block diagram of the clock recovery PLL circuit 120. In the PLL circuit 120, the disk 7
The Y + S signal read from 0 and the burst gate pulse are input. Similar to the case of generating the burst gate pulse (by the sync signal separation circuit 10 and the last gate pulse generation circuit 20) at the time of recording, the sync signal S in the Y + S signal is separated by the sync signal separation circuit 100 and burst The gate pulse generation circuit 110 generates a burst gate pulse having a predetermined timing and a predetermined pulse width based on the synchronization signal. The timing of the burst gate pulse generated here is the same as that of the burst gate pulse at the time of recording shown in FIG.

A burst extraction circuit 121 extracts a burst component from the Y + S signal based on the burst gate pulse. This burst component and the output of the voltage controlled oscillator (VCO) 124 are input to the frequency divider 1 to the phase comparator 122.
By inputting the signal divided into 1 / N by 25, the phase comparator 122, the low-pass filter 123, the VC
A reproduced clock frequency output locked to the burst signal is obtained by the PLL loop (phase locked loop) including the O124 and the N frequency divider 125. When there is no burst signal output from the burst extraction circuit, the phase comparator 1
If the phases are compared by 22, the clocks will be greatly deviated. Therefore, in the present invention, the burst gate pulse is also input to the phase comparator 122 so that the phases are compared only when the burst is extracted.

In this way, since the writing to the memory 140 is performed based on the reproduction clock locked to the burst signal, the memory 140 stores the signal faithfully reproducing the video signal at the time of recording. become.

[0022]

As described above, according to the present invention, since the signal is written in the memory based on the clock corresponding to the fluctuation of the video signal, the video signal at the time of recording can be faithfully reproduced. It was

[Brief description of drawings]

FIG. 1 is a block diagram illustrating signal processing of a video signal recording / reproducing apparatus of the present invention.

FIG. 2 is a block diagram of a burst gate pulse generation circuit according to the first embodiment of the present invention.

FIG. 3 is a timing chart showing the operation of the burst gate pulse generation circuit of the first embodiment.

FIG. 4 is a timing chart showing a relationship between a burst gate pulse and a burst signal.

FIG. 5 is a burst insertion waveform according to the first embodiment.

FIG. 6 is a block diagram showing a burst gate pulse generation circuit of a second embodiment.

FIG. 7 is a timing chart showing the operation of the burst gate pulse generation circuit of the second embodiment.

FIG. 8 is a burst insertion waveform according to the second embodiment.

FIG. 9 is a block diagram of a clock recovery PLL circuit.

[Explanation of symbols]

 20 burst gate pulse generation circuit 110 burst gate pulse generation circuit 120 clock recovery PLL circuit 160 clock generation circuit

[Procedure amendment]

[Submission date] November 5, 1993

[Procedure Amendment 1]

[Document name to be amended] Statement

[Name of item to be corrected] Claim 5

[Correction method] Change

[Correction content]

[Procedure Amendment 2]

[Document name to be corrected] Drawing

[Correction target item name] Figure 8

[Correction method] Change

[Correction content]

[Figure 8]

Claims (5)

[Claims] 1. A signal adding means for adding a reference signal of a predetermined frequency to a video signal including a synchronization signal for a predetermined period corresponding to the synchronization signal, and a video signal to which the reference signal is added to a recording medium. Recording means for recording, reading means for reading the video signal recorded on the recording medium, to which the reference signal is added, and separating means for separating only the reference signal from the video signal to which the reference signal is added, Based on the reference signal separated by the separating means,
A video signal recording / reproducing apparatus comprising: a writing unit that writes the video signal in a storage unit; and a reading unit that reads the video signal written in the storage unit at a predetermined timing. 2. The video signal recording / reproducing apparatus according to claim 1, wherein the reference signal is added over the entire period of the video signal. 3. The video signal recording / reproducing apparatus according to claim 1, wherein the reference signal is added during the entire period of the video signal except the vertical synchronizing pulse period. 4. A signal adding means for adding a reference signal of a predetermined frequency to a video signal including a sync signal for a predetermined period in accordance with the sync signal, and a video signal to which the reference signal is added. And a video signal recording apparatus having: 5. A reading unit for reading a video signal recorded on a recording medium, the video signal added with a reference signal of a predetermined frequency for a predetermined period corresponding to a synchronization signal, and the video signal added with the reference signal. Separation means for separating only the reference signal, and based on the reference signal separated by the separation means,
A video signal reproducing apparatus comprising: a writing unit that writes the video signal in a storage unit; and a reading unit that reads the video signal written in the storage unit at a predetermined timing.